CoLinux gives
decent Linux performance, but your primary desktop has to be Windows.
Sure, but I'm certain that the poster in question needs the primary performing OS to be Linux. The other problem is that there isn't any certainty of complete compatibility with regular Linux.
Not everyone has the time to look at the source code. All they would need would be someone excited about what's happening to the source code to give one paragraph snippets of what's happening every once in a while, and maybe even create preview releases, though I wouldn't count on the latter part.
He's completely correct about E and all the cool stuff it does NOW, and will do. The problem is that the project lives its entire life on the CVS and dev-list. They need a PR person on the dev-team that will let people in on what's going on.
(These stories with a 'pseudoscientific bent' seem to reveal a creeping trend away from rational thinking on slashdot, which several years ago used to feel like one of the few good places on the Net where one could get away from that sort of gullible mainstream uninformed discourse:/ Is Slashdot now officially "mainstream"?)
No kidding.
Linguistic thought experiment: if you find something to be real that's often called "paranormal" and you can explain it, scientifically, is it still paranormal?
Their suit says that Kaleidescape must redesign its system to require the presence of the physical DVD disc in the drive during authentication and playback.
That doesn't matter. You're not Martin Taylor. I wouldn't be surprised if he said something similar, but nonetheless, you're not Martin Taylor. Let Martin Taylor speak for himself.
This RAM functions in the role of the L1 cache, but the fact that it is under the explicit control of the programmer means that it can be simpler than an L1 cache. The burden of managing the cache has been moved into software, with the result that the cache design has been greatly simplified. There is no tag RAM to search on each access, no prefetch, and none of the other overhead that accompanies a normal L1 cache. The SPEs also move the burden of branch prediction and code scheduling into software, much like a VLIW design.
Why? The reason for the instruction window was to simplify software development.
Of course, I like to play devil's advocate with myself, so I'll answer that question.
The purpose of the Cell processor is to enhance home appliances, which have a greater reliance upon low-latency than they do on precision, accuracy, and performane bandwidth. Thus, one can very safely say that the Cell processor will likely have little purpose in scientific calculations.
I just realized that I read the wrong article. I kept thinking, "That's strange, I see only one part of the article even mentioning Cell technology, and it seems to indicate no relationship to the POWER5 arch. Is the blurb wrong?"
No, it wasn't. Next time you submit a story, you really only need to submit the relevent links.
The blurb's title is misleading. The Cell processor is likely to have little to do with the POWER5 arch:
I asked if there's any relationship between POWER5 and the Cell architecture that IBM is working on with Sony. Pattnaik didn't seem to familiar with the details of Cell, and he said that there's no relationship between the two designs. He noted that if they shared some similar characteristics, then it isn't because the two teams are collaborating in any way.
As I fully expected, Pattnaik could not discuss a possible workstation-class derivative (read: Apple-oriented derivative) of the POWER5. He also made it clear that he is and has been focused on POWER5 servers only, and any hypothetical workstation-class derivative of the design would be for someone else to discuss.
I'm wondering about the feasibility of such a processor. This design seems to be rather heavily dependent upon the specific design of the OS (namely AIX in this case), and it seems to me that any OS that would want to take advantage of the POWER5 would need some heavy rewrites.
Of course, I could always be wrong on this issue, but I get the impression from the article that server oriented processors (namely Big Iron) and desktop processors are on a diverging path over at IBM. There may be some similarities, but I'm betting that there will be more differences than similarities in future processors.
Pattnaik said that if IBM were to publish the detailed monitoring information for end users to access, then the company would feel obliged to maintain backwards compatibility in future iterations, and so they'd be limited in the changes they could make to the scheme.
If I were IBM, I'd publish such specs anyway, alongside letting the press know very loudly and clearly that developers should stick to the recommended API if they want any guarantee of future compatibility. OTOH, I do understand their reasoning for doing this, and I don't completely blame them. Even if they did publish the register information with the very loud and clear warning, people would still complain about lack of backwards compatibility, something of which is meant to be incumbent upon the developer, and not IBM.
Slashdot Mirror
But the most powerful weapon of all, which sometimes even classifies as a WMD? The /. attack!!!!!
Sure, but I'm certain that the poster in question needs the primary performing OS to be Linux. The other problem is that there isn't any certainty of complete compatibility with regular Linux.
At least the NSA can relax now. The slashdotting is melting the server right now.
'Cause, y'know, it's, like, good, and stuff.
...match its background, like a chameleon.
Grrr...
Chameleons don't change their colors for this reason. It's a myth. Stop spreading it.
http://www.wsu.edu/DrUniverse/chamel.html
Is it just me or do BSD people dole out more insults to each other than the Linux community does to them?
Not only that, but most of the jokes I hear from Linux people are often in jest, and not serious in any manner.
I find this entirely ironic. I'd love to see de Raadt accept the award from Stallman personally. I would bet de Raadt's reaction would be memorable.
That said, this is awesome. de Raadt definitely deserves the award for all the hard work he's given to the community.
Thanks for clearing that up. For some time now, I've been using GIMP under the impression that it was a Photoshop emulator. How wrong I was...
Not everyone has the time to look at the source code. All they would need would be someone excited about what's happening to the source code to give one paragraph snippets of what's happening every once in a while, and maybe even create preview releases, though I wouldn't count on the latter part.
Shoot, this entire time I thought the mp3s were downloading me.
He's completely correct about E and all the cool stuff it does NOW, and will do. The problem is that the project lives its entire life on the CVS and dev-list. They need a PR person on the dev-team that will let people in on what's going on.
Hey, don't forget to report this to bugzilla: https://bugzilla.mozilla.org/ (not linked since they don't like /. links)
(These stories with a 'pseudoscientific bent' seem to reveal a creeping trend away from rational thinking on slashdot, which several years ago used to feel like one of the few good places on the Net where one could get away from that sort of gullible mainstream uninformed discourse :/ Is Slashdot now officially "mainstream"?)
No kidding.
Linguistic thought experiment: if you find something to be real that's often called "paranormal" and you can explain it, scientifically, is it still paranormal?
Cool. Ralph Wiggum became smart.
That's for software only. They lose money on every sale of hardware.
Their suit says that Kaleidescape must redesign its system to require the presence of the physical DVD disc in the drive during authentication and playback.
"I forgot my password. Can you reset it?"
"Sure, what's your password?"
That doesn't matter. You're not Martin Taylor. I wouldn't be surprised if he said something similar, but nonetheless, you're not Martin Taylor. Let Martin Taylor speak for himself.
This RAM functions in the role of the L1 cache, but the fact that it is under the explicit control of the programmer means that it can be simpler than an L1 cache. The burden of managing the cache has been moved into software, with the result that the cache design has been greatly simplified. There is no tag RAM to search on each access, no prefetch, and none of the other overhead that accompanies a normal L1 cache. The SPEs also move the burden of branch prediction and code scheduling into software, much like a VLIW design.
Why? The reason for the instruction window was to simplify software development.
Of course, I like to play devil's advocate with myself, so I'll answer that question.
The purpose of the Cell processor is to enhance home appliances, which have a greater reliance upon low-latency than they do on precision, accuracy, and performane bandwidth. Thus, one can very safely say that the Cell processor will likely have little purpose in scientific calculations.
Yeah, clicked the wrong link. I hate you, endersdouble, but I don't hate you enough to put you on my foes list.
/. blurbs be simpler? As if they're not already.
Oh, why can't
I commented on the wrong article.
Forget it. I read the wrong article.
I just realized that I read the wrong article. I kept thinking, "That's strange, I see only one part of the article even mentioning Cell technology, and it seems to indicate no relationship to the POWER5 arch. Is the blurb wrong?"
No, it wasn't. Next time you submit a story, you really only need to submit the relevent links.
Thanks. Bastard.
The blurb's title is misleading. The Cell processor is likely to have little to do with the POWER5 arch:
I asked if there's any relationship between POWER5 and the Cell architecture that IBM is working on with Sony. Pattnaik didn't seem to familiar with the details of Cell, and he said that there's no relationship between the two designs. He noted that if they shared some similar characteristics, then it isn't because the two teams are collaborating in any way.
As I fully expected, Pattnaik could not discuss a possible workstation-class derivative (read: Apple-oriented derivative) of the POWER5. He also made it clear that he is and has been focused on POWER5 servers only, and any hypothetical workstation-class derivative of the design would be for someone else to discuss.
I'm wondering about the feasibility of such a processor. This design seems to be rather heavily dependent upon the specific design of the OS (namely AIX in this case), and it seems to me that any OS that would want to take advantage of the POWER5 would need some heavy rewrites.
Of course, I could always be wrong on this issue, but I get the impression from the article that server oriented processors (namely Big Iron) and desktop processors are on a diverging path over at IBM. There may be some similarities, but I'm betting that there will be more differences than similarities in future processors.
Pattnaik said that if IBM were to publish the detailed monitoring information for end users to access, then the company would feel obliged to maintain backwards compatibility in future iterations, and so they'd be limited in the changes they could make to the scheme.
If I were IBM, I'd publish such specs anyway, alongside letting the press know very loudly and clearly that developers should stick to the recommended API if they want any guarantee of future compatibility. OTOH, I do understand their reasoning for doing this, and I don't completely blame them. Even if they did publish the register information with the very loud and clear warning, people would still complain about lack of backwards compatibility, something of which is meant to be incumbent upon the developer, and not IBM.