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One example, of course, is the Pentium FDIV failure. That was a hardware failure, "programmed" into the CPU by Intel's experts in solid-state hardware design.

Are you sure it was an error in silicon, and not merely a software bug in the microcode of the ALU?

4.2 The Underlying Cause After the quantized P-D plot (lookup table) was numerically generated as in Figure 4-1 , a script was written to download the entries into a hardware PLA (Programmable Lookup Array). An error was made in this script that resulted in a few lookup entries (belonging to the positive plane of the P-D plot) being omitted from the PLA. The 5 critical entries are shown in Figure 4-3 as the shaded regions. As a result of the omission, a divisor/remainder pair that hits these entries during the lookup phase of the SRT algorithm will incorrectly read a quotient digit value of 0 instead of +2. Subsequently, the iterative algorithm will return a quotient result with reduced precision.

Looks like a microcode bug to me... i.e. flawed software. Sure, below assembly language level, but still software.

Forget Light Peak, Intel has already demonstrated an on-chip CMOS laser and used it for optical links: press release here. I really don't know what the IBM guy meant with his claim.

He's sped up links between chips from something like one-third c to c.

Architecturally that reduces inter-chip latency by 66%, which does indeed open up a new overall speed range for applications that are bandwidth-limited by interconnects. But in no sense does it imply a 1000-fold increase in overall performance. It's only a 3X improvement in bandwidth of the physical layer of the interconnect to which the speedup applies.

It may allow architectures that pack in more computing units, since light beams don't interfere physically or electrically the way wires do. And light can carry multiple channels in the same beam if multiple frequency or phase or polarization accesses can be added. Those will further improve bandwidth and possibly allow a further increase in the number of computing units, which could help get to the 1000X number.

BTW, didn't Intel have an announcement on optical interconnects just a while ago? Yes. They did.

Gigabits not Bytes - http://techresearch.intel.com/ProjectDetails.aspx?Id=143

Anybody got a source for that? Other than an Apple-fanboy-page.

The LightPeak page at Intel Research doesn't even mention Apple at all, but do mention partners like Sony and several others.

Some tech sites, blogs and fanboy pages have been posting claims/rumours of Apple involvement, but with Intel not acknowledging this, and even promoting Sony and others as partners, it doesn't seem very likely.

I don't even think I can solder detailed enough or design home-made PCB with enough detail to accommodate a processor with this many pins and features.

I guarantee you can't, since it only comes in a BGA package. From the Intel datasheet:

"Single-package: A compact 37.5 x 37.5 mm, 0.8 mm ball pitch" and "1466 ball FCBGA".

Those pesky BGA's are impossible to hand-solder, but some very brave souls have had luck using a toaster oven to solder them down. I'm just now making the transition to SMD, and it's a real bear. I wonder if us tinkerers should start a 'death clock' for thru-hole components?

[Anonymous due to moderation of other comments]

Before you all speculate widely, try reviewing the actual product brief. http://download.intel.com/embedded/processors/prodbrief/324535.pdf . In which you will see this is an MCM with an Atom E6xx SoC die and an Altera FPGA die, interconnected by 1-2 PCIe x1 links. It has an amazing 1466 ball grid array package.

It's not clear to me what this level of packaging and integration achieves compared to mounting a (not integrated) E6xx BGA and a separate Altera or Xilinx FPGA BGA onto the main PCB, interconnected by PCIe x1 or perhaps even x4. Then you would get a broader choice of FPGAs -- and perhaps a simpler PCB escape for the two packages compared to one 1466 ball beast.

The advantages of this MCM as stated in the brief include:
* reduced board footprint
* lower component count
* simplified inventory control / manufacturing
* single-vendor support

True, but forgive me if I'm not over the moon. The dream of integrated FPGA fabric into a heterogeneous SoC (same die) includes a very low latency and possibly cache coherent interconect between the processor(s) and the FPGA. But here the FPGA is on the other side of a narrow PCIe link. It can't share the Atom SoC's memory hierarchy / DRAM channels very effectively. It is probably a very long latency round trip from x86 software control / registers and L1$ data, to some registers or function units in the FPGA, and back to the x86. So I think of this as more of a super-flexible Atom SoC platform than a dream reconfigurable computing platform.

It's a nice step but I look forward to so much more.

http://www.fpgacpu.org/usenet/fpgas_as_pc_coprocessors.html (1996): "... So as long as FPGAs are attached on relatively glacially slow I/O buses
-- including 32-bit 33 MHz PCI -- it seems unlikely they will be of much use in general purpose PC processor acceleration. ..."

http://edc.intel.com/Link.aspx?id=3961

350 user I/O pins. I think that could control a few Christmas lights. Or make a nifty message-passing bus for a parallel computer.

Wonder if anyone will make inexpensive boards with breakout IO?

This is a common error in considering taxes. Take for examples Nike and Intel. They both get Taxed in Oregon on property that not only includes the land but the equipment inside.

Nike makes shoes overseas and has just an inventory of shoes in the USA. Intel has a couple FABS. Each piece of fab equipment is a multi-million dollar piece of equipment. Without a tax break, (they still pay huge taxes, check their finance statement) they would not have any fabs in the USA. Along with the fabs the jobs would be lost. Along with the lost jobs would be lost income taxes.

Instead of exporting chips, the US would be importing them from China, Vietnam, Israel, etc like most other goods.

Intel does have the option to close in the USA.

It was only due to a tax break are they investing about 6 Billion on the new fab in Oregon.

Some refrences, sure
Oregon's new fab; http://www.oregonlive.com/business/index.ssf/2010/10/intels_new_hillsboro_factory_w.html

China's new research facility; http://www.intel.com/cd/corporate/icrc/apac/eng/170371.htm

Jobs in Vietnam; http://www.intel.com/jobs/vietnam/sites/hochiminhcity.htm

You can look up the rest yourself instead of stating corporations don't pay their fair share of taxes.

Here is what the Govener of Oregon says about the lack of taxes paid by Intel;
"The jobs a company like Intel produces and the revenues that they produce, pay for school teachers in Coos Bay and they pay for social services in Roseburg, so this is really a statewide importance, not just a local one," said John Southgate, Hillsboro Economic Development Director.

So much for not contributing to the state's infrastructure. That is a straw man argument. Intel invests heavily in education.

This is a common error in considering taxes. Take for examples Nike and Intel. They both get Taxed in Oregon on property that not only includes the land but the equipment inside.

Nike makes shoes overseas and has just an inventory of shoes in the USA. Intel has a couple FABS. Each piece of fab equipment is a multi-million dollar piece of equipment. Without a tax break, (they still pay huge taxes, check their finance statement) they would not have any fabs in the USA. Along with the fabs the jobs would be lost. Along with the lost jobs would be lost income taxes.

Instead of exporting chips, the US would be importing them from China, Vietnam, Israel, etc like most other goods.

Intel does have the option to close in the USA.

It was only due to a tax break are they investing about 6 Billion on the new fab in Oregon.

Some refrences, sure
Oregon's new fab; http://www.oregonlive.com/business/index.ssf/2010/10/intels_new_hillsboro_factory_w.html

China's new research facility; http://www.intel.com/cd/corporate/icrc/apac/eng/170371.htm

Jobs in Vietnam; http://www.intel.com/jobs/vietnam/sites/hochiminhcity.htm

You can look up the rest yourself instead of stating corporations don't pay their fair share of taxes.

Here is what the Govener of Oregon says about the lack of taxes paid by Intel;
"The jobs a company like Intel produces and the revenues that they produce, pay for school teachers in Coos Bay and they pay for social services in Roseburg, so this is really a statewide importance, not just a local one," said John Southgate, Hillsboro Economic Development Director.

So much for not contributing to the state's infrastructure. That is a straw man argument. Intel invests heavily in education.

And since when is essay writing all that valuable in say the techie world?

Are you kidding? It's especially valuable in the techie world -- a world that incessantly suffers from misunderstanding by the general public. Ask yourself how popular Linux would be today, if Linus had published a well-written series of introductory articles about it in the popular press, 20 years ago. Ask any small company: The technical writer is key to the success of the organization, because he/she introduces the product to the customer -- either directly, in the company documentation, or indirectly, by ghostwriting articles in the trade and popular press.

If you don't believe me, try the following. Take a collection of your peers. Ask them each to write a four-page article for the trade press presenting and explaining Moore's Law. Now compare their papers with Gordon Moore's original. Which one is easier to understand, and more persuasive? Which one do you think would still be remembered 45 years later?

Words matter.

everyone knows it's easy to slip backdoors into hardware, but hiding it is the hard part. every fabless chip maker does spot checks of their products and will find these backdoors. at the very least they will find that the shipping products aren't like the ones they designed with extra circuits.

As per this quite old story, hiding malicious circuitry is easy enough that there are serious concerns about it. A moment's thought will reassure you that Moore's law works against us. The intel i5 has 774 million transistors, enough that a significant number of them are simply 'rounded off' when talking about them. The intel 286 had 134,000 transistors, again likely rounded off. So even with back-of-the-envelope calculations a more-than-enough-for-bad-things 286 is capable of being 'lost in the noise' of a modern CPU.

But let's be fair, that is just a transistor count. How many would be required to perform a malicious function? Ideally they would be situated in specific spaces where data across a bus is a constant, perhaps in a cache or in one of the MULTITUDE of pipelines in a CPU/GPU. You need to match a specific pattern, and substitute a new one. One possibility is a LSFR that is checked against some serial bus over and over until the bitstream matches exactly. Based on some totally reliable random internet post, building an LSFR should cost far less than 1000 transistors. I have no electronics background, so that factor is probably off by at least an order of magnitude.

So are you gonna find 1000 transistors in the middle of a few hundred million?

What's worried me for some time are the various "remote maintenance" schemes built into network controllers. See, for example, Intel's "Active Management Technology". This is Intel's successor to the Intelligent Platform Management Interface. These have a protocol stack built into the network board, with connections to other parts of the system strong enough to power the machine on and off, patch the disk, and do other drastic system changes. AMT is easier to attack from a distance than IPMI; it uses SOAP, HTTP, and TCP (on ports 16992 through 16995, which had better be blocked at your firewall), while IPMI used its own specialized protocol over UDP.

All that prevents taking over a machine with this mechanism is that the network controller is supposed to ship with no keys loaded. A "backdoor" would simply consist of pre-loading some crypto keys at the factory, or somewhere else in the supply chain. Considering the amount of hostile junk that routinely shows up on new USB sticks, that probably wouldn't be hard to accomplish.

A true "hardware level" attack for IPMI or AMT would be to ship a network controller which had keys pre-installed and enabled, but reported that remote management was disabled. There would be no way to find such a "backdoor", short of grinding open the network controller chip and reverse engineering it with a scanning electron microscope. There are special purpose systems for doing exactly that, used for reverse engineering IC designs, but this is e difficult and expensive process.

With the finite number of read/writes to flash memory.

Spinning HDDs also have a limited life (5-10 yrs). I checked out life expectancies before buying my Intel X-25M earlier this year.

A quote from anadtech: "... Intel will guarantee that you can write 100GB of data to one of its MLC SSDs every day, for the next five years, and your data will remain intact."

This thread on Anandtech suggests lifetimes of 100s of years for home users.

Intel X-25m specs state 1.2 million hours Mean Time Before Failure (MTBF).

Of course I have a backup regime using rsync and CCClone and also store mail on external servers just in case - but I did this with the original HDD too ;-)

I don't want to be forced to part with a computer because it uses a proprietary flash storage system or be forced to purchase a proprietary replacement storage module. Things like iPods, smart phones, and PDAs are cheaper and easily replaced in whole, but I wouldn't want to face a replacement cost for a laptop.

X-25M and others(OCZ etc.) have standard SATA interface and form factor but yes, it would be a worry if the storage was soldered to the mobo.

Intel's netbook definition would exclude the 11.6 Air on the basis of size and sufficient CPU power for multitasking and HD video. The flash storage is certainly netbookish, but 64 gigs used to be a big hard drive.

I've had an 11.6-inch Acer for about a year now, running Ubuntu. I love it. Small enough to take, big enough to use. But I don't know what to call it except "perfect size." Nice for Apple that they are finally catching up. Too bad it costs two and a half times what I paid.

With CPU speeds like these, it almost seems like they just didn't want to say the word 'Atom'.

The fastest available Intel Atom is the D525 which is dual core. It gets 709 on PassMark.

An Intel Core 2 Duo U9400 1.4Ghz, on the same benchmark, gets 963.

For reference, an Intel Core i3 330UM @ 1.20GHz scores 1196 and an Intel Core2 Duo U9600 @ 1.60GHz scores 1129.

CPU speeds on these new Macbook Airs seem to be... rather pathetic

That's like asking for a big rig with a trailer to pull 1G on a skidpad or a Tesla Roadster to tow a big rig trailer.

Is the Air underpowered? Of course. But you find me an 11" form factor laptop that doesn't look like a giant brick and has a 2ghz+ i7. Not even the Dell Alienware M11x offers more than a 1.06ghz i7 or 1.3ghz Core 2.

With CPU speeds like these, it almost seems like they just didn't want to say the word 'Atom'.

The fastest available Intel Atom is the D525 which is dual core. It gets 709 on PassMark.

An Intel Core 2 Duo U9400 1.4Ghz, on the same benchmark, gets 963.

For reference, an Intel Core i3 330UM @ 1.20GHz scores 1196 and an Intel Core2 Duo U9600 @ 1.60GHz scores 1129.

CPU speeds on these new Macbook Airs seem to be... rather pathetic

That's like asking for a big rig with a trailer to pull 1G on a skidpad or a Tesla Roadster to tow a big rig trailer.

Is the Air underpowered? Of course. But you find me an 11" form factor laptop that doesn't look like a giant brick and has a 2ghz+ i7. Not even the Dell Alienware M11x offers more than a 1.06ghz i7 or 1.3ghz Core 2.

Bad blocks are inherent in NAND flash. SLC NAND Flash devices are more reliable (have fewer errors) and costly. MLC NAND Flash devices are less reliable (have more inherent errors) but are affordable and easily available. NAND Flash devices are known to progressively degrade until the number of bad blocks is too high to reliably store data. Inherent errors during manufacturing increase on usage (both read and write.) Most Flash Storage Devices will ultimately become too error-prone to store data. The industry might want to justify inherent errors (and gradually increasing errors) by calling it a fingerprint. They are still searching for techniques to make NAND Flash more reliable.

The article fails to provide mathematical basis to prove that two NAND flashes cannot have the same bad blocks on manufacturing or at some point of usage thereby obscuring identity. NAND flash controllers are designed to check and resolve errors using known algorithms. Most controllers allow hardware to hide errors while allowing OS device drivers to read the NAND flash medium. The Operating System and the NAND Flash Controller are at least two points were any such fingerprint can be compromised. The Filesystem adds another layer of abstraction. The number of "Real" bad blocks and remaps is usually stored on the NAND Flash. Altering the Bad Block Table is not difficult.

Hard Disks interestingly have similar failure rates and complex issues like Data remanence which have been studied. I wonder why no one proposed a signature scheme for using errors on Hard Drive Platters to identify them. Computer Forensics for Hard Drives has a longer track record of being studied. Marketing fud can be ignored.

We just got Dell OptiPlex 780's at work... the onboard NIC doesn't work in linux. Not in 32 bit Ubuntu or 64 bit Debian. Dell's site has no option for anything other then Windows 7, Vista, or XP.

BTW, have you ever tried to install Intel drivers on Linux? Their instructions read like they were made for redhat 6.
Not sure if this is the exact readme for the drivers, but I have been using linux since 1998 and haven't had to install drivers like this since... 1998.
http://downloadmirror.intel.com/15817/eng/README.txt
I got the drivers installed, they didn't load automatically on boot, and DHCP didn't work.

The information on Dell shows this as supported OS in the category of Other:
FreeDOS for (N-series), Ubuntu® Linux (China only)

That's because the Wall Street Journal, like so many others, confuses the meaning of the visualizations. They aren't results. Instead, they're great tools for finding what parts of the theory need a better test.

As a contrived example, let's say that this visualization shows that a plume of dark matter going in a particular direction at a particular time. Comparing the visualization at that time to known colliding clusters in the real world might help show where to point our telescopes for evidence of dark matter. It helps to create the initial hypothesis, reducing the number (and therefore the cost) of failed experiments.

Another use is for verification of a model. If we already know of several colliding clusters, this visualization should, be able to produce images that look very similar to those clusters. If not, then we know that there's something wrong with the model, and we can find ways to improve it.

Tying that in with your example, we now know that the fluid model used wasn't perfect. It's time for more analysis, experiments, and refinements, eventually resulting in a more thorough knowledge of our universe.

No scientist worth their salt will say that any model is absolutely perfect. In fact, the one you spoke of didn't. She said it was the "perfect model to do <a given job>," implying that it could do the job with the given parameters, and that deriving a completely new model wasn't necessary. The model itself is imperfect, but it fit the job perfectly. If the journalists presented the model as a prediction, that's the journalists' fault.

Intel announced Knights Corner, a 50-core x86 processor.

From what I remember (hopefully correctly) engineering cache coherent shared memory architectures is increasingly difficult as core counts go up. Intel built a experimental processor that utilizes low latency message passing instead of shared, coherent cache. Nvidia and Ati have quite capable vector architectures as processors do not have shared cache, just as IBM Cell SPU's are somewhat capable as well. Distributed memory and message passing seem to have a bright future. Didn't SMP systems these days look and act internally like distributed systems?

When we get to 48 cores same programming models might not be available at all. Barrelfish seems as quite sensible and interesting preparation for the future. Or perhaps Plan 9 will finally get to rise. I think I'll learn Go in the meanwhile, it has this interesting concept of "sharing memory by communicating".

Really? I've personally seen Windows run quite well on a box with 256 cores.

Actually, Moore's law applies to the number of components on an integrated circuit (for a fixed cost). The original paper makes no mention of processors, and only talks about transistors as an example of the components you put on an IC. It directly applies to RAM, and any other kind of IC, because it's talking about process technology not about what you do with the ICs.

Gigabyte is one of the few companies that still equips their P55 boards with parallel and serial headers. Ironically Intel still sells a desktop board with a parallel and serial ports right on the backplate: http://www.intel.com/products/desktop/motherboards/db-DQ57TML/DQ57TML-overview.htm

https://retailupgrades.intel.com/Page.aspx?Name=UpgradeBored? nothing to do? Call (408) 765-8080 and tell them you're trying to upgrade from your obscure *nix distro. And remember to check out the page to report problems http://www.intel.com/intel/report.htm?iid=intelfb+body_reportprob.

https://retailupgrades.intel.com/Page.aspx?Name=UpgradeBored? nothing to do? Call (408) 765-8080 and tell them you're trying to upgrade from your obscure *nix distro. And remember to check out the page to report problems http://www.intel.com/intel/report.htm?iid=intelfb+body_reportprob.

https://retailupgrades.intel.com/Page.aspx?Name=Upgrade

No Linux version of the upgrade software. Its an MSI file so they cpu upgrade is only available to Windows users.
Windows users get a cpu upgrade for $50, Linux users get a CPU they cant upgrade.

Perhaps this was announced a little early? The list of supported systems at seems to only have placeholders.
I've mirrored the placeholders at for when Intel fix the placeholder problem.

Considering that you need a machine/chipset that does AMT to do this upgrade (not to mention an OEM processor you're not likely to get sold on the market) it's probably not something the regular home user is going to have to worry about. Yet.

Yep.

Looks like the retailer's got a piece of the action too: http://www.intel.com/cd/channel/reseller/asmo-na/eng/404392.htm "You will be eligible for a revenue share from Intel if/when your reseller customer installs an upgrade."

Looking at the card: "Effortless movement between multiple applications". Really? Wow. That's a pretty wild product claim to make for 1MB of L3 cache.

Heck, I had decided to turn off Hyperthreading at my next reboot. For some things it's a net slowdown.

We might guess that the folks buying one of these stripped-down, crippled notebooks are likely to be students or otherwise budget-constrained. It's going to suck for them to get their expectations up and part with 50 hard-earned bucks just to find out it's not that all that big of a difference in performance. I suspect they might feel a teeny bit ripped-off even.

It'll be measurable on benchmarks, but like you said, it's not going to exactly breathe new life into a low-end laptop that's sucking wind because of malware, anti-malware scanning, general Windows bloat, and/or the 10 different applications that load themselves in the system tray and memory on startup.

This was not a good move for customer loyalty, Intel. Anyone want to bet they'll end up giving all the affected customers free un-downgrades and refunds?

The FAQ gives me the impression you can buy scratch-off cards with a unique code. It says nothing about the card being tied to a particular chip, just that it's only good for one upgrade. This makes me suspect the upgrade program reads the code, contacts Intel to check if it's valid and not used yet, and if it gets the okay from the Intel server, performs the upgrade. If true, that would make it easy to crack.

https://retailupgrades.intel.com/Page.aspx?Name=WhereToBuy

https://retailupgrades.intel.com/Page.aspx?Name=WhereToBuy

You can find more info from either Intel or Ubergizmo.

In before the "google it" stampede.

With a 3 GHz clock, a signal at the speed of light travels 10 cm during one clock cycle. This means that if a chip needs data from another and there's a distance of five centimeters or more between both chips the data will not arrive in the same clock cycle.

Really? So when did we all get to using optical interconnects?

Electricity doesn't travel at the speed of light.

And even if it did, for your random, uninformed postulation to be true, we would need evidence that chips could not practically run faster than 3GHz. Unfortunately for you, that is not the case.

The first mention of Light Peak in the article is a link to an overview at Intel:
http://techresearch.intel.com/articles/None/1813.htm

What is this about highly asymmetric execution units on Intel? link please ;-)

Intel Core cores have 6 execution "ports", each serve a range of micro-operations (u-ops) and there is some overlap between them.

Some u-ops can only be sent through a single port, most can be sent through a couple specific ports, and none are suitable for all 6 ports. Most of the integer instructions can only be sent through ports 0, 1, and 5, and these ports also perform some floating point duties. The complexity creates a problem for people tasked with optimizing low level code because they need to be aware of what u-ops are generated by each instruction, and what ports they can be sent to.

This is in contrast to AMD'd setup where most integer instructions break down into u-ops suitable for any of its 3 integer execution units, and that these execution units do not perform any floating point duties.

So optimizing for AMD is a pleasure compared to optimizing for Intel. This doesnt mean that Intel design is stupid or anything, just that its a bitch to hand-optimize for.

The most extensive references arent from Intel or AMD tho, they are from a low level hack named Agner Fog.

Intel's hexacore offering features hyper-threading technology, which allows each core to execute two threads simultaneously.

Only on SOME workloads where the two threads are using different parts of the chip or when one thread hiccups (eg a cache miss causes the thread to stall momentarily). If not one thread will block waiting for the other to free the resource. This is why you won't see a 100% increase in performance due to hyper-threading (most sources put it around 30%, iirc). It's also why you need an OS with a scheduler that is specificity designed for hyper-threading. If you have two threads, putting them on separate cores will yield better performance than putting them both on one hyper-threaded core.

A scheduler should use different physical cores until it runs out them before it assigns more than one thread to the same core. Currently with 4 cores (8 logical) most people would not notice if you turned off hyper-threading because most applications do not parallelise their work load enough to exhaust 2 cores let alone the 4 or 6 cores that are available. Hyper-threading becomes less interesting as the number of cores increases. Perhaps it will become more interesting again iff applications become more thread hungry, but they aren't currently.

Don't get me wrong Hyper-threading is a way cool feature and can yield a decent performance increase if you can really swamp your processor with enough work. If you can't, it's just an overrated extra feature you don't need. (Consider Turbo Boost Technology that basically counts on your extra cores being idle and tell me hyper threading gets used much for those work loads.)

It's just another example of how benchmarks don't reflect your real world millage. While there are lots of good reasons to chose Intel, hyper-threading arguably isn't one of them at the moment.

Except that Intel is working on photonic circuits for datatransfer/clock distribution/... and obviously the inductance/capacitance problem doesn't apply to light.
We'll see what the future brings when it's there.

I like truecrypt and MSE for windows systems myself but I am not an IT director.

It's not a complete waste. Very short passwords are certainly more crackable than longer ones, for example. But yes, sites can go overboard. http://software.intel.com/ is probably the worst one I've used recently.

Yeah...I am sure that you have looked at the reliability numbers...like ever...

Intel x-25m reliability: http://download.intel.com/design/flash/nand/mainstream/mainstream-sata-ssd-datasheet.pdf

BER (read error rate) of 1 sector per 10^15 bits read
MTBF 1,200,000 hours
Minimum 5 years useful life

WD Raptor Reliability: http://www.wdc.com/en/products/products.asp?driveid=495

MTBF 1,400,000 hours
Other figures not given

and the WD Raptor is considered an Enterprise hard drive, so that should say something about the reliability expected. I don't see these drives failing any time soon, and I have a Intel x-25m 32GB I bought a little over a year ago running quite strong with no errors in my desktop that rarely is shutdown.

The only reliability problems I have seen is in MLC based drives we use here at work for database servers, they go offline and have to be reseated in order to bring them back, but we haven't had any of these fail yet even under the heavy strain of a database server.

For example, this is a posting using the code name: http://communities.intel.com/message/51359;jsessionid=F3036FCC8C1DD878FCED25A7A6D32547.node6COM

HDMI to DVI or even the new laptops with WiDi

RAMBUS is dead. I remember the old days where you could get a Pentium 4 that used RAMBUS. This shit was always overrated and super expansive. I knew people who had 128MB of RAMBUS (and you had to buy this shit in pair too) who wanted to upgrade to something descent for the times, like 1G. They ended up getting a whole new computer for the price they would have paid for their RAMBUS, and their new computer was much faster than their old one.
Also, Intel EPSD does server stuff. Check it out.

Actually, for me, I'd just LOVE to buy AMD. But I've had exceptionally poor luck with AMD chipsets in the past, and this is an area where Intel typically excels. Only a couple of years ago, if you bought a 3rd tier motherboard (Gigabyte, Asus, DFI, etc) - if it was an Intel chip, it was an Intel chipset. If it was an AMD chip, it was nVidia or SiS or anyone cheap.

Nowadays, sure you can get AMD chipsets. But I've been burned too many times and the amount of information on the AMD chips and chipsets seems more limited. For example, where's AMD's version of http://processorfinder.intel.com/ ? How do I figure out which AMD chips have which functions (I generally want Intel VT / AMD-V, for example). Do the chipsets support it? Which ones? Which boards have good RAID and SATA drivers? Do they have an equivalent to Intel's Matrix RAID? And obviously no AMD board has Intel Ethernet controllers.

It just seems like a real bun fight :-(

The Core i3 and Core i5 CPUs have the GPU directly on die.

From http://www.intel.com/products/processor/corei3/index.htm :

This processor comes equipped with Intel HD Graphics, an advanced video engine that delivers smooth, high-quality HD video playback, and advanced 3D capabilities, providing an ideal graphics solution for everyday computing.

From http://www.intel.com/products/processor/corei5/index.htm :

Intel® HD Graphics on Intel® Core i5-600 processor series

The Core i3 and Core i5 CPUs have the GPU directly on die.

From http://www.intel.com/products/processor/corei3/index.htm :

This processor comes equipped with Intel HD Graphics, an advanced video engine that delivers smooth, high-quality HD video playback, and advanced 3D capabilities, providing an ideal graphics solution for everyday computing.

From http://www.intel.com/products/processor/corei5/index.htm :

Intel® HD Graphics on Intel® Core i5-600 processor series

Actually the Atom, when bundled with the Nvidia ION, is capable of being a high-def Myth box.

You don't even need the Ion chipset. I've got a 1st-gen Atom D330 with an nVidia 8400GS in the PCI (yes, PCI) slot which will play back full 1080p x264/AC3-5.1 content without breaking a sweat. I average about 10% CPU usage, with occasional spikes to 25% (of 400% available), when playing back using a vdpau-enabled mplayer through my LAN. I'm guessing it's primarily the AC3-5.1 decoding that's causing CPU spikes. TMK the 8400GS is the only PCI card by nVidia capable of decoding video streams on the card. Once you've got the video card doing the heavy lifting, it is simply a matter of keeping the 133Mbps PCI bus unsaturated (which is pretty easy with a video stream that runs, maybe, 15Mbps max)

I don't know how old/slow a system you could use, but I suspect about 500MHz and >= P3 would get the job done. It'd be interesting to see just how little CPU power is actually necessary, with a PCI card doing the decoding. As for new Atoms, I can't comment on their performance. I see they are almost all down to 1 hyperthreaded core now, and a 32-bit instruction set , now. Oddly enough, the N270 shows as the only Atom possessing the SSE4 instruction set, but I suspect that is a misprint...