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Couple problems with that conspiracy theory...

1) The cost to build one of these things would be far greater than the cost of the largest rendering farms.

2) 3D render speeds seem to be doubling at nearly _twice_ the rate of Moore's Law. A frame that takes an hour to render today, will take only 15 minutes to render in 18-24 months.

Have you seen some of the GeForce3 footage??

It won't be long before movies like Jurassic Park will be rendered in real time at studios... and not long after that, in our own homes. But by then studios will probably have replaced most actors (and sets) with inexpensive, high quality CGI dopplegangers, thus increasing total production time again to several years.

Why not build an Open Firmware clone? There are free Forth systems readily available, the extensions necessary for OF are not excessive. Doing a byte-code compiler using the OF specs would be interesting, but not particularly difficult (starting with a normal Forth environment).

OF even supports multiple partition schemes and filesystems. Linux has support for using OF as a bootstrap interface. I've always thought that an interesting approach to booting BIOS-based machines would be to use a boot loader that implemented Open Firmware, then use that to boot an OF-aware Linux. Of course, you'd need to keep old-BIOS support if you wanted to boot MS operating systems (and support the new boot ROM "standard" that Intel is introducing for IA-64).

I actually purchased two (one went bad) of the PR440FX motherboards like the ones they used. The strange thing is, my BIOS version on bootup is 1.00.01.DI0.T*. It was an auctioned factory pull from a Gateway 2000 computer. Wouldn't I feel like a sucker buying from directly from them?

* Intel docs that support this claim

A company in Lousville, KY [full disclosure: I worked for thier previous incarnation], has been working on this with great success for quite a long time. Agora Interactive the system they call "GATE" also includes video conferencing in the system.

They also developed a virtual reality game based on a doom/quake-like engine using the iGlasses, a standard arcade box, and a Pentium 133.

Unfortunately, look like they filled for Chapter 11 (reorganization) in January.

Don't forget the hardware XML accelerators for just such occasions.

Four people are credited with designing the 4004: Ted Hoff, Stan Mazor, Federico Faggin and Masatoshi Shima.

There are evidently bad feelings between Faggin and Hoff because Faggin feels he did all of the real work, and Hoff got much of the credit. Many accounts do not give Shima any credit, only giving credit to the three Intel engineers (Shima was an engineer at Busicom, a Japanese calculator company at the time, and later became an Intel engineer).

Interview with Shima (extremely interesting and detailed)

Another interview with Shima

Interview with Hoff

An e-mail from Mazor, and nice pictures of the 4004

A really nice picture of the 4004

A picture of three of the engineers (no Shima) years later

A picture of all four engineers

Federico Faggin's initials on the 4004 -- the only initials on the chip

Four people are credited with designing the 4004: Ted Hoff, Stan Mazor, Federico Faggin and Masatoshi Shima.

There are evidently bad feelings between Faggin and Hoff because Faggin feels he did all of the real work, and Hoff got much of the credit. Many accounts do not give Shima any credit, only giving credit to the three Intel engineers (Shima was an engineer at Busicom, a Japanese calculator company at the time, and later became an Intel engineer).

Interview with Shima (extremely interesting and detailed)

Another interview with Shima

Interview with Hoff

An e-mail from Mazor, and nice pictures of the 4004

A really nice picture of the 4004

A picture of three of the engineers (no Shima) years later

A picture of all four engineers

Federico Faggin's initials on the 4004 -- the only initials on the chip

This is incorrect say's the manual.

Getting a lower power consumption from frequency and voltage scaling is not easy. I'm the author of the ARM-Linux frequency and voltage scaling driver and do a Ph.D. on it. The problem is that a processor does not know what speed to run in. The processor has to be explicitly set in a certain frequency mode. In Crusoe the code morphing software tries to guess a good speed. Voltage and frequency scaling technique has been show to work in 1994 by Mark Weiser, it is not new. The problem has always been for the software to know what speed to set the processor in.

Read more details ... .

Johan.

What??? Take a look at the original link XScale Processor and you'll see the're not talking about a microcontroller but a microprocessor. Semantics, maybe, but the facts are that it is a capable microprocessor used in desktop hardware, not just a microcontroller destined for life controlling a washing machine.

Of course, the nice thing is that the StrongARM core also gets embedded into chips that look like microcontrollers, but are really embedded processors. We are talking a seriously different league to the good ol' 68HC11!

Other than that I entirely agree with your comments :-)

Yup, we used the Intel IQ80310.

The IQ80310 can be used as a PCI host with a passive PCI backplane, but it can also be used as a normal PCI card in a PC (or whatever else with a PCI bus).

Because we didn't have a passive PCI backplane in New York, MontaVista bought the cheapest PC available at a local computer store and we used that as a backplane. I have no idea what kind of PC it was, we just used it as backplane and power supply to get the XScale running. The PC was definitively worth its price :-)


Erik

Sounds cool - for the vast majority of us who do very little high-speed floating point, and would much rather have DSP features like a fast MAC (:-), this would be a really good machine. What kind of hardware did you use - the Intel 80310 evaluation board? How much hardware did you have to add around it? Looks like there are a few PCI slots, ether and RAM, so it shouldn't be too hard to add a video an d a disk controller of some sort.

../linux/Documentation/Configure.help

Power Management support
CONFIG_PM...

ACPI Support
CONFIG_ACPI
ACPI/OSPM support for Linux is currently under development. As such, this support is preliminary and EXPERIMENTAL.

Advanced Powehttp://phobos.fs.tum.de/acpi/index.htmlr Management BIOS support
CONFIG_APM
APM is a BIOS specification for saving power using several different techniques.

etc...etc...etc...

• Intel Specs
• ACPI mailing list
• Kernel Documentation (pm.txt): Linux Power Management
• APMD
• ACPID

--

If you check through the engineering design guide for Pentium III at intel, there's nothing to suggest that a PIII wouldn't function if not in a grey box. I suspect if Apple made x86 hardware, it might be nicely designed and integrated the same way that their PPC and 68k hardware was, and NeXT's 68k stuff too.

>...the embedded market at some stage over the next few years. I fear for Intels future, in this regard.

Clearly you've forgotten about Intel's XScale architecture (the successor to the StrongARM). The ARM processor currently holds a HUGE segement of the embedded market, and Intel is promising the same low-power high functionality technology at speeds up to 1GHz in the near future. If anything, their presence in the embedded market is growing.

Still, if you're gonna buy a Beowulf cluster (as opposed to just making one yourself), one with a "Cray" label is way cooler than anything with "IBM" on the box. At least it's an Alpha cluster; it won't say "You-know-what Inside".

Microsoft makes a big deal out of the universality of their runtime, but it isn't significantly more universal than the JVM. They claim they compile C++ into their runtime, but it isn't C++, it's a "safe subset" (full C++ is compiled into native code and linked in--useful, but not a feature of their runtime). In fact, more than 100 languages have been implemented on top of the JVM, including C; there are also semi-automatic translators for C++.

.NET is about not just C# and the runtime, but also about XML. Of course, that's a big thing with Java as well, with several excellent XML projects in Java, perhaps most notably the Apache efforts.

I wouldn't actually care much about whether Java or C# ultimately "wins" in the market, if it weren't for the fact that C# is years behind and has the wrong motivations behind it. Java is, by now, fairly mature and it has an excellent set of APIs and libraries behind it, both from Sun and from other sources. There are numerous compilers to the JVM for languages like Python and Smalltalk. And there are several third party implementations. Java's implementation isn't particularly tied to any one platform, and it actually runs better on Windows than on Sun's own Solaris. And it will take a C#/.NET implementation at least as long to mature as the JVMs--building these kinds of runtimes is hard and requires a lot of benchmarking and user feedback to get the bugs and performance bottlenecks out.

If Slashdot readers care about open source and open standards, rather than complaining about Microsoft, there is a much more effective thing you can do: support open source Java efforts like Kaffe, Intel's Intel's Open Runtime, GNU GCJ (now part of GCC), and GNU Classpath. By "support" I mean: use them, consider them for your next open source project, submit bug reports, and maybe contribute code. GNU GCJ, in particular, should be a good basis for you to write Linux applications: it compiles to executables that start up quickly, it lets you use native code almost as if it were written in Java, and you can even write native Gtk/Gnome applications in it.

But perhaps most importantly, educate yourself about Java rather than complaining about it; Java is really a pretty decent engineering effort. Give it the benefit of the doubt, and wher it needs improvement, help it along. C/C++ will not make it in the long run. It's Java or C# or something else similar to those languages.

All that needs to be done is to verify the digital signature of the boot image... Check out the Intel Boot Integrity Services.

I like a lot the IA64 assembler, wich has a quite intuitive syntax (sometimes reminds me of a higher level language) and will allow a lot of dirty tricks, as it even has a built-in endian switch, byte shuffles in the registers, and e.g. parallel instructions of 8 bytes in one register, in two registers at a time, (what possibilities for string.h or clipping algorithms!).

Page 50 (PDF page 50) of http://developer.intel.com/design/pentiumiii/datas hts/24445208.pdf has Thermal Specs.

Page 28 has the current requirements for Vcc/Icc. Up to 23A for the core at 1.13Ghz!!

At 2V Vcc, that's 46W, n'est pas?

Does anyone know of a small, sensible desktop platform based around the SA1110? I'd like an NCD/Corel Netwinder sixed system with one of these. Low power, quiet, and quite a lot of interesting gadgetry. Sort of an X terminal on steroids, with sound, USB, etc. It looks like you should be able to build them for about $400 or so (no disk).

Page 50 (PDF page 50) of http://developer.intel.com/design/pentiumiii/datas hts/24445208.pdf has Thermal Specs.

Page 28 has the current requirements for Vcc/Icc. Up to 23A for the core at 1.13Ghz!!

At 2V Vcc, that's 46W, n'est pas?

Does anyone know of a small, sensible desktop platform based around the SA1110? I'd like an NCD/Corel Netwinder sixed system with one of these. Low power, quiet, and quite a lot of interesting gadgetry. Sort of an X terminal on steroids, with sound, USB, etc. It looks like you should be able to build them for about $400 or so (no disk).

The G4 rivals the Pentium in power consumption? Not really. According to Motorola's fact sheets on the PowerPC 7400, it uses an average of 5 watts of power at 400mhz, 11.5 watts max. The PowerPC 7450 (the new version of the G4 used in the 533, 667 and 733mhz models with embedded L2 cache and slightly lower core voltage) uses 14-17 watts of power at 533mhz. The Pentium III, on the other hand, uses anywhere from 30 watts of power to 50 watts for the super-overclocked 1.13ghz recall units. I wasn't able to find any stats on Intel's website or in their datasheets (too much marketing), so that number might not be completely accurate, but I am sure it's much higher than the PowerPC 75xx processor line.

Apple encased the whole G4 processor card in plastic to dampen fan noise? Not really. There IS no processor fan on the new G4 models. There's a huge honkin' heat sink on it (which sits next to the power supply and an external vent when the door's closed), but there is no direct cooling on the processor. So, no, I don't think you've seen a picture of the latest G4. If you had, you wouldn't've claimed they encased the processor in plastic. Wouldn't that defeat the purpose of cooling? Heat can't escape through plastic as easily as it can through air. :)

The hard drive in the latest iMacs don't make that much heat, actually. Apple uses three kinds of hard drives in their latest lines: Maxtor, Seagate, and Quantum. They all run rather cool, with the Quantum being the hottest of them all (this is all subjective, and I haven't scientifically measured this stuff). The Seagate drives are definitely the quietest, though. :) The processor is one component that stays really cool. The heat sink for the processor happens to be the entire metal shield between the logic board and the Analog/Video/Power board. This shield has lots of holes in it that air goes through. It's quite an interesting and practical design. The monitor makes most of the heat, but since the tube is several inches away from the bottom of the iMac, there's plenty of room for heat to move up away from the components, sucking lots of cool air over the expensive stuff (logic board, hard drive, etc...) on the bottom of the computer. I admit it's not the coolest design, but considering what it is, it works really well.

The micro fans might be nice on paper, but how long do readers think it'll take for MAJOR chip vendors to implement them? The heatsink/fan combo has been with us for as long as I can remember, and considering how cheap and easy it is, I don't see it changing that much very soon. We need cooler processors, not better fans/heatsinks.

Path of least resistance, I guess.

Here's a Pentium III Datasheet. If anyone can find the wattage for the P3 in this marketing mess, I'd appreciate knowing it: http://www.intel.com/design/pentiumiii/datashts/24 526407.pdf

Here's a PowerPC 7400 Datasheet: http://e-www.motorola.com/brdata/PDFDB/MICROPROCES SORS/32_BIT/POWERPC/MPC7XX/MPC7400FACT.pdf

And here's a PowerPC 7450 datasheet: http://e-www.motorola.com/collateral/MPC7450FSR0.p df

Angry Penguins practice UltraViolent Lithography! The Linux Pimp

Compare the above numbers with that of the StrongARM/XScale technology:

StrongARM @ 233 Mhz consumes 725 mW @ 2.0v.
Intel XScale @ 400 Mhz consumes 500 mW @ 1.0v.
Intel XScale @ 1000 Mhz consumes 1.6 W @ 1.8v.

Any of these processors would turn in very credible performance on a Linux-based system. We've come a long way in the past couple of years. Might it be time to test the market on a non-Windows general purpose computer? How about one that's portable and has respectable battery life?

The success of the Compaq iPaq 3600 speaks volumes for the market for such a device.

Compare the above numbers with that of the StrongARM/XScale technology:

StrongARM @ 233 Mhz consumes 725 mW @ 2.0v.
Intel XScale @ 400 Mhz consumes 500 mW @ 1.0v.
Intel XScale @ 1000 Mhz consumes 1.6 W @ 1.8v.

Any of these processors would turn in very credible performance on a Linux-based system. We've come a long way in the past couple of years. Might it be time to test the market on a non-Windows general purpose computer? How about one that's portable and has respectable battery life?

The success of the Compaq iPaq 3600 speaks volumes for the market for such a device.

I'm an AMD fan (and they're hot, so they can use all they can get, HAH! ouch) so I'm glad to see AMD finally getting going on the high end laptop market. For comparison to the 25W and 29W power consumption, here's some Intel mobile power consumption data:

Original Mobile Celeron 266: 5.8 W
Mobile Pentium III @ 650 Mhz 7.9 - 14 W depending on load (speedstep technology)

And previously from AMD:
Mobile K6-II @ 400 mhz: 12 Watts
Mobile K6-III @ 450? mhz: avg. 12 watts probably more.

So again, AMD comes out heavy on the power usage, and probably heat. Unfortunately my Pentium II laptop is already heating my groin area too much when I'm working with it on my lap, don't need another 20 W of power getting transmitted down there.

It's just common sense.

I'm an AMD fan (and they're hot, so they can use all they can get, HAH! ouch) so I'm glad to see AMD finally getting going on the high end laptop market. For comparison to the 25W and 29W power consumption, here's some Intel mobile power consumption data:

Original Mobile Celeron 266: 5.8 W
Mobile Pentium III @ 650 Mhz 7.9 - 14 W depending on load (speedstep technology)

And previously from AMD:
Mobile K6-II @ 400 mhz: 12 Watts
Mobile K6-III @ 450? mhz: avg. 12 watts probably more.

So again, AMD comes out heavy on the power usage, and probably heat. Unfortunately my Pentium II laptop is already heating my groin area too much when I'm working with it on my lap, don't need another 20 W of power getting transmitted down there.

It's just common sense.

still, i would imagine that in the near future it would be best to install Darwin on these machines. it seems considerably more stable, and can compile just about everything application that compiles for LinuxPPC with minimal effort, especially commandline (i.e. server) tools.

Except that Darwin won't run on older machines, certainly not on Nubus machines. When I got a new Mac (clone), my old desktop machine, a 6100/60, became a mail gateway machine running MkLinux. Part of the decision was actually technical, because the code we were using had originally been on a Sun 3 and had some byte-order dependencies. Other portions of code had been developed on x86 Linux.

That machine is still running, although we upgraded from DR1 to a more recent version of MkLinux when we needed to upgrade sendmail. There is a small Mac partition that is used only to boot into MkLinux (do they have boot code that works without MacOS yet? I know they made it so it could boot from a Mac file system, which makes installing it a lot easier than the original kludge of porting mke2fs and tar into a Mac console-window application).

Other than a very rare glitch with the virtual paging code, the system has been rock solid, with the only downtimes being a power failure longer than our UPS could handle, a hard drive failure, and reloading the OS to upgrade the kernel and sendmail.

I've ordered the newest LinuxPPC distribution, which should ship tomorrow or so; first thing I'll do is update it to 2.4.0.

Because you have two segments overlapping in memory completely.
As I said, under any x86 UNIXy system (like Linux), you have a data segment and an exec-segment that have the same linear adresses, spanning all of the linear adress space. This means that you more or less entirely bypass the segmentation system. This method of bypassing the system is even described in the Intel manual, with reference to porting mainframe OSes! In this model, CS is allways equal to the segment descriptor with the exec flag set, and SS/DS/ES/FS/GS the one with the write/read flags set. All access control (read only or read write) is then done in the page system, where there is no notion of execution.
If you don't beleave me, check out the Pentium manual, page 108, figure 4-1 (Not the same as the hardcopy I refered to before, this is for the Pentium, not Pentium Pro, but this particular thing haven't changed a bit).

21264's are currently available at 700MHz. We don't know what speed the IA64's are going to be going at (600MHz is at best an educated guess). Even if 600MHz does prove to be true, the IA64 architecture has unique benefits when it comes to doing lots of 64-bit integer math on large data sets. Intel actually has a paper on Itanium's capabilities for SSL encryption/decryption. You'll note that they're quoting performance for a 660MHz Itanium, which suggests they think that's a reasonable target.

Anyway, you'll notice in the document that the 21264 and 21364 both only have a single pipeline for 64-bit integer multiplies, while the Itaniam has a dual pipeline. Now, there are differences in the pipelines, but that suggests that an Alpha would have to be going at 2x the clock of it's Itanium competitor in order to match it's performance. Intel's own analysis suggests a 21264 takes 1,800 cycles to do what the Itanium does in 1,220. So based on that, the Alpha would have to be going at roughly 150% the clock of the IA64 to match it's performance.

We also have no idea what the price point would be for Itanium vs. Alpha. Certainly, the 21264 is one of the more expensive CPU's on the market, but I'm sure Itanium won't be cheap either. It seems likely though that Itanium will be fairly competitive with the 21264 on price.

All this is just speculation, but it does suggest that it's reasonable to at least allow for the possibility that the Itanium chip would actually be the best CPU out there (when it's released) for doing large amounts of 64-bit Integer math. If you're suggesting otherwise, you're either revealing insider information, or you think you know more than you do.

Gnome is still a C-based system with a variety of language bindings on top of it (Perl, Python, C++, etc.). There is no unifying runtime or unifying object model underlying Gnome.

If open source efforts want to compete with .NET, they'd have to adopt similar technologies. A Java runtime is the most obvious choice, though not necessarily with Sun's Java libraries.

(Intel's ORP sounds interesting in this regard.)

You may be thinking of the high school girl that won the $100k Intel Science Talent Search. Read about it here.

Intel has just released a compiler. It is for both Itanium and 32-bit procs.

I did some tests with it and here are my first impressions:

• It's Slow. I would estimate 5x as slow as the MS compiler. Much slower on C++ code (compared to C).
• It generates lots of error and warning messages that MS's compiler doesn't. At the same time, it doesn't generate messages that MS does.
• On my crude benchmark test - rotation of a 24-bit (170x270) bitmap, bi-linear interpolated, the Intel compiler generates code that runs 33% faster! (on my p700).
• The final code size is roughly twice that of the MS compiler, with the same optimization settings.
• It blends seamlessly (really) into the Visual Studio environment. You just pick which compiler you want to use from a menu - sweet.

well that was a very very good read. Take it with a very very small ammount of salt. I mean he did forget to mention a huge problem with the P4.

I mean how bad are things getting at Intel ? ? ?

Intel's IXP1200 network processor already does something like this. It's a very spiffy little processor - one of these running at 166MHz can route IP packets at a Gb/s. Though you need to explicitly code your microcode this way, it's definitely not hidden from you like the Alpha chip will hide it.

Sounds like it may be time to make a new benchmark to cover multi-threaded processors.

It's "Pentium 4", not "Pentium IV"--they changed the nomenclature with the new chip. Go to Intel's website and see.

The IL (is this different from MSIL?) instruction set seems to be documented in Part 3 of the C# and Common Language Infrastructure draft standard .

At first glance, it looks pretty detailed - I guess we won't know if it's detailed enough to implement the CLR on Linux until someone tries it :-)

'Course it's no problem to wipe every reference to down1oads.mp3.com, then reload the list...

Then there's other sites that have started using Shockwave and Flash banners (Intel, ZD's TechTV), as well as .asx/.asf banners.

The FPU on the P4 is already quite large, much larger than the ALUs anyway. The original design would have indeed been very large, with twice that area.

I couldn't get a real picture of the P4 die; best I could manage is the cutesy little colored rectangles on page 6 of this Intel PDF. Point is, assuming an overall colored rectangle size of 217mm^2, the "Enhanced Floating Point/Multi Media" section comes out to under 17mm^2 by my crude measurements. And I frankly doubt that when they say that adding another FPU would "double the floating point size", they actually mean double everything in that little teal box. Even assuming I'm wrong, 16.5mm^2, while certainly bigger than the ALUs (and don't forget, this "floating point" box includes integer SIMD execution as well) is a mere 7% of total die size. While this is somewhat significant, if they really wanted it in they certainly could have made room for it. As a percentage of overall die space it's much smaller than the P3's FPU.

What I saw instead was the admission that adding the extra FPU would have added an extra stage to the pipeline (extra decoding step). It may be that the pipeline was not well balanced with this extra stage, or that it was still in the critical path even with its own pipeline stage, or just that they thought 19 (not including those outside the trace cache) was enough.

In any case, I'm not at all convinced that this decision had to do with die size at all, but rather with rampability and overall IPC. Indeed, as I said, with properly compiled code, the P4's "crippled" FPU is able to scream along, keeping up just fine with its 3.2 GB/s memory bus. Considering most P4s will have higher clock speeds and less memory bandwidth, why add extra FPU units? About all its extra 2 FPUs do for the Athlon is help it in cache-constrained toy benchmarks. In the real world, FPU work increasingly means data sets too large to fit in on-chip cache, and a single FPU becomes more than adequate to keep up.

I wish the headline would be:
Corel To Sell ARM Linux
But I probably want too much from this life.

You troll, that's a bunch of FUD. You can read Intel's official statement on their website.
--
Bush's assertion: there ought to be limits to freedom

The CPUID instruction returns three important values: family, model, and stepping. The Pentiums comprise family 5. The Pentium Pro, II, and III comprise family 6. The Pentium 4, apparently, introduces family 8. The family number increases, and processors are backwards compatible (right?). So why not fall back to the most recent family?

I'm getting this information from AP-485 Intel Processor Identification and CPUID Instruction and Intel Pentium 4 Processor Identification and the CPUID Instruction.

The CPUID instruction returns three important values: family, model, and stepping. The Pentiums comprise family 5. The Pentium Pro, II, and III comprise family 6. The Pentium 4, apparently, introduces family 8. The family number increases, and processors are backwards compatible (right?). So why not fall back to the most recent family?

I'm getting this information from AP-485 Intel Processor Identification and CPUID Instruction and Intel Pentium 4 Processor Identification and the CPUID Instruction.

For more data points, see the Intel processor hall of fame technical specifications and the microprocessor quick reference.

For more data points, see the Intel processor hall of fame technical specifications and the microprocessor quick reference.

There seems to be a lot of excitement and debate regarding the performance of 64 bit code on the new Itanium in comparison to the performance of 32 bit code. In all the excitement some people seem to be forgetting that the first 32 bit 80386 was released in 1985, while the first 32 bit consumer-oriented operating system wasn't released until 1995.

In other words: don't hold your breath waiting for closed-source vendors to recompile their code.

Probably a lot sooner if Intel start giving VTune to developers for free. Which makes sense if they want to sell CPUs in competition with AMD.

With all the wild speculation going on around here, I thought it might be worth throwing some actual links in here to real information.

• Itanium Processor Family Home -- has links to all sorts of IA-64 material.
• The IA-64 Architecture Specifications and Guides -- lots of good documentation links.
  • Architecture Software Developer's Manual Vol 1, rev 1.1: Itanium (TM); Application Architecture
  • Architecture Software Developer's Manual Vol 2, rev 1.1: Itanium (TM); System Architecture
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Instruction Set Reference
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Processor Programmer's Guide
• And don't forget Itanium[TM] Processor Microarchitecture Reference.

I haven't read all of these myself, but I have poured over the details that are most relevant to my work. :-)

Have fun.

With all the wild speculation going on around here, I thought it might be worth throwing some actual links in here to real information.

• Itanium Processor Family Home -- has links to all sorts of IA-64 material.
• The IA-64 Architecture Specifications and Guides -- lots of good documentation links.
  • Architecture Software Developer's Manual Vol 1, rev 1.1: Itanium (TM); Application Architecture
  • Architecture Software Developer's Manual Vol 2, rev 1.1: Itanium (TM); System Architecture
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Instruction Set Reference
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Processor Programmer's Guide
• And don't forget Itanium[TM] Processor Microarchitecture Reference.

I haven't read all of these myself, but I have poured over the details that are most relevant to my work. :-)

Have fun.

With all the wild speculation going on around here, I thought it might be worth throwing some actual links in here to real information.

• Itanium Processor Family Home -- has links to all sorts of IA-64 material.
• The IA-64 Architecture Specifications and Guides -- lots of good documentation links.
  • Architecture Software Developer's Manual Vol 1, rev 1.1: Itanium (TM); Application Architecture
  • Architecture Software Developer's Manual Vol 2, rev 1.1: Itanium (TM); System Architecture
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Instruction Set Reference
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Processor Programmer's Guide
• And don't forget Itanium[TM] Processor Microarchitecture Reference.

I haven't read all of these myself, but I have poured over the details that are most relevant to my work. :-)

Have fun.

With all the wild speculation going on around here, I thought it might be worth throwing some actual links in here to real information.

• Itanium Processor Family Home -- has links to all sorts of IA-64 material.
• The IA-64 Architecture Specifications and Guides -- lots of good documentation links.
  • Architecture Software Developer's Manual Vol 1, rev 1.1: Itanium (TM); Application Architecture
  • Architecture Software Developer's Manual Vol 2, rev 1.1: Itanium (TM); System Architecture
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Instruction Set Reference
  • Architecture Software Developer's Manual Vol 3, rev 1.1: Itanium (TM); Processor Programmer's Guide
• And don't forget Itanium[TM] Processor Microarchitecture Reference.

I haven't read all of these myself, but I have poured over the details that are most relevant to my work. :-)

Have fun.