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Silicon Will Get CPUs To .07 Micron
ruiner writes: "This post at EE Times discusses that it now appears that silicon dioxide can be used as an insulator down to a process of .07 micron for processors. This will buy processor manufacturers a few more years to develop solutions for smaller processes. "
> The next step is 10Ghz, not 1.1Ghz
:: 150 MHz : 100 MHz. (I think I got that notation right).
What an excellent idea! Why didn't *my* company think of it first! Forget that that piddly 1 GHz crap, why don't we just jump straight to 10? I'll get right on it...
Are you really trying to tell me that you were content with your 100 MHz Pentium Classic right up until a month or so ago when that 1 GHz chips came out? All of those small jumps in the middle there didn't mean a thing, I suppose.
While it's true that the steps that companies increment their clock in should be increasing (they should now be releasing in 50-100 MHz steps, not 33 MHz steps), the percentages should scale. 1.5 GHz : 1 GHz
Now, I *do* think that the race to 1 GHz was kind of silly, but hey! It was marketing. Faster is better, but clock isn't everything. Intel hasn't released a new core since 1996, and you can really feel it. Coppermine and others are slight improvements, but they really need to get their new architecture (IA-64) out the door. Athlon is still eating their lunch.
just a disgruntled computer architect,
--Lenny
Faster chips are great but x86 is getting tired and the I/O on a PC is really limiting the usefullness of the chips we're capable of making now. We need a platform capable of useing what we have now.
When someone yells "Stop" or goes limp, or taps out, the fight is over.
Electrical signals travel at the speed of light. Therefore, the smaller you can make a circuit, the faster a signal will get from one end of it to the other. And of course you can pack more of them into a given area, leading to smaller die size, which equates to more units per wafer, higher yields, and lower prices.
At this point we're getting to the limits of what can be done on a silicon substrate. The problem here is that with circuits smaller than 0.07 micron, you are in danger of splitting silicon atoms if you pump any energy at all through the circuit. Yes, you read that right -- splitting silicon atoms, resulting (theoretically) in a release of energy equivalent to the Hiroshima bomb. This, as you may have guessed by now, is the real reason the US government considers high-powered CPUs to be "munitions". Just imagine what could happen if a bunch of Islamic terrorists got hold of a few thousand such CPUs and set themselves up as a mail-order PC company.
This is not, by the way, a problem unique to ICs. The real reason for the classification of data compression products as "munitions" is related to this too. You see, if data is compressed too much, the atoms comprising the individual bits can actually begin to participate in atomic fusion, leading (for a 32 kb block of data) to a release of energy equivalent to the original H-bombs of the 1950s. There are some papers here to document all this.
Just goes to show... the government doesn't always tell you the real reasons for the decisions they make, but that doesn't mean those reasons aren't justified.
This is stretching the limits of physics. A 70 nm layer is only about 200-300 Si=O bonds thick. We're almost in the area where quantum effects become an overriding concern. I can't be bothered to work out the probability of an electron with a given voltage tunnelling through a layer this thin, but I suspect that we are in the area where voltage regulation and temperature control become *very* important. Put another way, these babies won't be candidates for aggressive overclocking.
What this really means is that we *may* have a little longer to go before we have to start using 'exotic' oxides. This is good news. One of the great things about SiO2 is that the manufacturing properties are well understood (although, at this size, lithography is going to be, er, interesting.
And they say there's a chance that they can take it even further. Gordon Moore will be pleased. His law looks good for the forseeable future.
That sounds great from a science point of view, but just not realistic from a business point of view. Let's say that a big chip company puts no money in .07 micron technology and dumps every last R&D dollar into truly next generation CPUs. What if the R&D doesn't produce a working chip until 2007? Do you think a spokesperson for AMD could take a podium in 2004 and say, "In response to Intel's announcement of 6.4 GHz CPUs, we would like to ask everyone to hold off for three years when we will deliver our 150 GHz chips...maybe." They might as well fire everyone and lock the doors. The trick for those companies is to split the funding between evolutionary and revolutionary R&D so that they can keep products coming down the pipeline right up until that huge leap can be made. I certainly don't envy the people drawing up that budget. If you want to give it a shot, try to predict the weather for June first, of next year, and "hot" won't cut it.
-B
Silicon technology is still a bulk technology. The most likely candidates for a further circuit miniaturization are what is called "molecular electronics." These involve using organic molecules with dimensions of several dozen angstroms for swithces and interconnects. People are already working very hard on metal contacts to organic molcular componet. There was a special issue of the Proceedings of the IEEE on Quantum and Nanoscale Devices and an article titled "Molecular Electronics" by Prof. Reed of Yale EE dept surveyed the field.
The Most striking figures in that article were (i) a very tiny organic molecular diode which operated at room temperature with voltages around +/- 0.5 volt, and (ii) a resonant tunneling device at room temp. with similar voltages. These are highly practical voltages and temperatures! The biggest obstacle is to integrate these devices.
The variety of possibilities offered by organic molecules in conjunction with metals and other solid materials is simply staggering. What is going to open the floodgates is development of techniques to integrate these tiny devices with tiny interconnects in an inert matrix.
Zyvex and the Foresight Institute website are the best resources for information on this subject. Particularly, the writings of Eric Drexler and Ralph Merkle.
Advances like this first get used on 'real' computers - serious SMP servers like IBM's SP series of RS6000s, Suns high-end servers (Starfire), Compaq's WildFire Alpha boxes (drool) and, soon, servers based on AMD Sledgehammer and Intel Merced (Itanium) / Willamette chips.
Machines like this are used for *serious* numbercrunching. They predict the weather, model the economy, help design planes and spacecraft and find oil. These are tasks for which there is still a serious demand for MIPS.
Because of the astounding cost of developing these technologies, it takes years for them to trickle through to the desktop.
I admit that when decent processors get to the desktop, they are wasted. I did some low-level monitoring of my mother's PIII 450 recently. She runs Win98 and MS Word. The processor spends 99.2% of it's time idle, and 60% of it's active time it's waiting for cache misses. The cache miss problem isn't going away any time soon, because memory is still not getting faster at a high enough rate. The only realistic cure is for compiler writers to continue developing *very* clever optimisers. This is happening, but optimisations like this are deep magic.
I/O in modern servers using proprietary technology is awesome. Check out the IBM SP servers for more info. (Can't find the link - I have it on CD). Unfortunately, PCs are hampered by 'legacy' technologies like PCI. There is at least one serious attempt to address this - the Next Generation I/O project
No, this is transistor size. The oxide thickness they are talking about is 15 angstroms, which is far smaller than 0.07 microns. Current oxide thicknesses for modern processes are on the order of 100 angstroms or less (which is 0.01 microns or 10 nm).
Solid state photonics is coming, and there's nothing you can do about it.
Solid state photonics will still have its feature size limited by the wavelength of the light used within its devices. _Current_ integrated circuit chips use feature sizes that are much smaller - by the time photonics matures, it will already be left in the dust as far as density is concerned.
Use smaller wavelengths of light? Not unless you want to destroy your material by photoionization.
Your next logical argument is to point out that most proposed photonic devices are three-dimensional. My logical counterargument is to point out that you can build three-dimensional electrical devices too. It's just currently cheaper to shrink 2D fabrication processes.
Your next probable point is to make noise about propagation delay in electrical circuits. It turns out that these aren't the limiting issue in conventional ICs - heat dissipation is.
Your next likely point is to say that a photonic circuit would have less heat dissipation. My response is that I'll believe it when I see it. Absorption happens, and whatever diode lasers are pumping this device won't be perfectly efficient either.
Lastly, I'd like to point out that most of the effort that goes into designing integrated circuits goes into designing the logic, not the fabrication processes. Computer engineers would still be employed in your hypothetical universe. Electrical engineers design motherboards and specialized analog ICs, both of which would still exist, so they wouldn't be out of work either.
Summary: Photonics is not the magic wand you hold it out to be.