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PCI 3.0 Coming; Intel gets the Green Light.
pjbass writes "This story on ZDnet discusses the next I/O subsystem planned for PC's. It will be PCI 3.0 once making it to the consumers, but it is now known as Arapahoe, or 3GIO. Intel Corp. is responsible for making the technology, and boast its performance will be about 6 times that of PCI2.x, getting up to speeds of 6.6 gigabytes per second of bandwidth initially, with promises to scale more once the technology is mainstream."
Don't confuse Hypertransport functionality with PCI 3.0, as an eetimes article explains AMD's logic for voting to support the new intel standard, http://www.eetimes.com/story/OEG20010803S0080
Reading it closely makes me feel as if AMD is trying to curry favor with Intel for some odd reason while at the same time promoting their own technology.... They do overlap in a few areas, but I am curious if their support for the new PCI 3.0 standard will make it harder for them to sell HT as they will have to work to differentiate it.
* Winners compare their achievements to their goals, losers compare theirs to that of others.
Call it "New PCI" or "Super-Duper PCI" or "Extra Whizzy PCI (not compatible with any computers made before 2001)". Please!
And don't even get me started on the trouble I've had explaining why people's "innovative" cheap storage solutions are flawed (Zip disks don't work in regular floppy drives, you can't overwrite normal music CDs now matter how good your burner is etc.).
> I remember when I was a kid, seeing some article on Usenet circa 1990 about how it was impossible for any computer to do 30 FPS in 24-bit
If you drop it from high enough, any computer will do 30 fps before it hits the ground, without regard to its bitness.
Sheesh, evil *and* a jerk. -- Jade
The nine committee members [...] had voted July 27 to take another week for company lawyers to review the standard.
WTF? Since when are lawyers qualified to decide on technology issues? I'd understand if they were to review the legalities of the standard (patents and all that crap), but the standard itself?
Next time I need to design a computer bus I'll ask my mother (a law professor). But first I'll teach her how to use scrollbars...
I agree that motherboards will have fewer lines and thus be simpler because of the serialization of parallel lines. However, the serialization means that higher frequencies will be required for one wire to do what many parallel wires had done before. The result when moving to higher and higher frequencies is more cross-talk on the lines that are left. A good example is Rambus. From what I hear, there are lots of difficult issues with the cross-talk on the narrow bus.
JOhn
Campaign for Liberty
"The key message is that PCI software and device drivers do not have to change to be supported in the base level of Arapahoe," Tipley said. "As far as the actual link level, how electrons get across the wires, that's quite different, and obviously won't be the same PCI pins. It will be very similar to what a link would look like for 10 Gigabit Ethernet or InfiniBand, that kind of signaling."
I am not surprised that patents for one bus technology are reused in another bus. But that does not make the second bus a variant of the first bus. It makes sense to reuse good ideas!
EV6 IS NOT the same bus as HyperTransport. They are not even similar, except maybe for some low-level things.
EV6 does not use LVDS.
EV6 is not a bidirectional (full duplex) bus (X data lines one way, and Y data lines the other way), instead all of the data lines are use for communications in both directions (half-duplex).
EV6 is a processor (Alpha or Athlon/Duron) to northbridge bus. Hypertransport is a chip interconnection technology for the future.
EV6 is not packet driven, unlike HyperTransport.
EV6 is a point-to-point bus. Hypertransport can have 32 devices on a single bus, via a hub architecture (i.e., you could say it is a lot of point-to-point busses connected together, but the addressing allows for 32 devices)
and there are such a lot of other things that are different.
You're so far off base it's incredible. And you have the specifications? Have you thought of reading them? If your job requires you to work with these busses, and you do not even know the difference between them, then I feel sorry for your employers.
One Good Thing that the article failed to mention is that fewer wires also means it is easier to design a motherboard, and expansion cards, thus lowering the overall prices of both items (once the required chipsets get into mass-production, of course). You should also be able to get more spacing between the circuit paths, which should lead to a lower possiblity of cross-talk, and better reliability.
Where's my lobbyist? Right here.
Here's a little suggestion...
Read the article.....
It at least answers your first question....
And I really doubt that Intell will prevent VIA from using it.....it would sort of defeat the purpose, it's intended to REPLACE PCI....and the only way it'll do that, is if it can be used in every PC....
Currently PCI is used not just in Intel machines, but Macs, Sparc workstations and others....
Advanced users are users too!
Hypertransport is a variable width, bi-directional bus. It can transfer up to 12GB/s. It can be used for many things - CPU - Northbridge (as it will be used for the upcoming Hammer CPUs), Northbridge - SOuthbridge, Northbridge - RAM, GPU - RAM, Southbridge - RAID controller, etc.
Hypertransport is packeted. EV6 isn't. AMD license EV6 from Alpha, AMD designed Hypertransport.
Is this enough to convince you that EV6 and Hypertransport are different?
I bet you will not want to keep it though. PCI3 would offer a shared 6.6 GB/s peak versus an AGP 4x peak of 1 GB/s. At that point, a GeForce 3 MX PCI3 with 128 MB DDR-333 will most likely run for under $40 online, if they are still bothering to sell them. Drool...
So will the connector be backwards-compatible? Or will we return to the days of three different bus connectors? (I'm not counting AGP, since there's always just one of those).
"Ancillary does not mean you get to rule the world." --U.S. Circuit Judge Harry Edwards, speaking to the FCC's lawyer
Why does a consumer machine need this when PCI 64 bit, or 66mhz hasn't gotten into the market? The 3 types of machines I ever see these slots on are servers, very high end workstations, and Apple systesm.
Also, where does PCI-X fit into all this?
Well when you have that kind of bandwidth on the PCI bus, doesn't it seem a little redundant to have the AGP port expense on the the bridge chips?
Will everyone who bought AGP 4X graphic cards have to abandon them again like they left the PCI platform before? Anyway I'm still plugging along with an old PCI card and maybe I'll be glad I stayed there.
"a powerful and unexpected ally..."
One thing the ZDnet story doesn't mention is that unlike PCI 2.x, 3GIO will use point to point connections instead of a shared bus.
Here is a link to a FAQ about AMD's HyperTransport technology.
It works at 6.4GB/sec and looks to me like a direct competitor.