Nanoimprint Lithography
An anonymous submitter writes "According to BBC News, researchers at Princeton have developed a die-stamp method for chip fabs. The Princeton site claims they've got to 10nm already. The professor in charge has told BBC News Online that they're '20 years ahead of Moore's Law.' Dubious claims aside, it looks like a handy way to bring down prices even if it doesn't improve ultimate top speed."
Moore's law really has nothing to do with speed even though people think it does.
/ mooreslaw.html
"More than 25 years ago, when Intel was developing the first microprocessor, company cofounder Gordon Moore predicted that the number of transistors on a microprocessor would double approximately every 18 months. To date, Moore's law has proven remarkably accurate. "
From : http://www.cnet.com/Resources/Info/Glossary/Terms
10 nm == .01 microns last time I looked.
1 nm = 1e-9 m
1 micron = 1e-6 m
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I suspect instead they will focus on talking about Moore's law, what with it being one of their favorite topics.
it is 0.01 micron
but what's ONE ORDER OF MAGNITUDE between friends?
How do they make the ultra small quartz die to burn the patterns? Grow it perhaps?
is the cost of installation and any retraining that needs to be paid for to use the new system. I have a feeling - unless it offers a HUGE advantage over standard methods - Intel et al. would be very reluctant to adopt a new process.
g to the oatse
c to the izzex
fo shizzle my nizzle i have no idea what nanoimprint lithography means
I've experimented with this technique a bit, and surprisingly it is very capable of replicating super tiny features. Surprising because the stamps are most commonly made from a flexible polymer material. They are very good at replicating tiny features from a master fabricated using electron beam lithography. One thing that we weren't able to solve was doing alignments between layers, since the stamps tend to be thick and hard to see through. But this is just an engineering issue that we didn't have the time or inclination to solve.
I was just blown away that we were able to fabricate high fidelity microstructures using what basically amount to a rubber stamp!
The two links gush with claims but provide little evidence of its utility. The only demonstration shown there demonstrates making holes in substrate, or leaving dots of material. It does not show making any traces. I'd wait to be impressed until I see something beyond a row of dots.
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This sounds great, but how do they make the mold, what kind of wear and tear is the mold subject to? My guess is that one of these 'nano-imprint' molds is not going to last all that long.
I am assuming they are relying on something like electron beam lithography to create the imprint mold, certainly this would be a cost/time improvement over direct e-beam litho, but it all depends on longevity of the molds.
-josh
I saw this several years ago, "Block Print Lithography", an article in Science. They were able to do, at the time, 80nm resolution features in metal.
It has serious problem however in producing the blocks to use in the printing, and aligning them properly in use.
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Maybe this means AMD will cut their prices on Athlon chips even more! With ram being so cheap, and this making it able to create more chips at less cost, maybe I really can have that beowulf cluster I've always wanted! Now what to do with it....
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Take note of that third section: no nasty chemicals, they claim. If their claim holds, a company using this tech could make a lot of political capital from it.
Natural questions arise: just how dirty is the current process? Will the details of the method really prove to be as clean as they say?
Lately democracy seems to be based on the skybox, the Happy Meal box, the X-box, and the idiot box.
Mmmm more transistors means more processsing...
Lower prices means more hardware
More hardware makes geeks happy.
Happy geeks means more slashdot posts.
Good.
See it all works out in the end.
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...that we end up going back to old technology? I mean, this is basically an old printing press, only on the microscopic, technological, not old side. One would think that sometime such as a laser would be the first thing to accomplish this goal. But hey, who's going to argue with cheap parts?
My other sig is an import.
Moore's Law is just based on a different commercial corrollary(sp?) That is, hardware manufacturers will improve electronics features/performance at the rate that will maxmize profit for them. We all know Intel had 2Ghz chips 6 years ago, but they just increase the speed incrementally until we all upgrade. Then they release the next round of chips. In all seriousness. I knew a lady who worked for DEC and she said they purpsosefully put NOPs in the microcode in their Vax, so they could sell a "Faster" version later. They just removed the NOPs.
"10nm already, or 0.10 micron" ?
10nm = 0.01 micron
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A company is already employing this technique commercially. See www.nanoopto.com. They're using it to fab photonic bandgap and other microoptical structures. I think this company came directly from the Princeton work (although the technique was invented at Harvard, I think.)
I think this is a company I heard about because they can't make good transistors. The transistors are very small but they veary in quality wildly. Some are 20 times slower than others. Synchronous designs suffer badly because of it. It becomes reather difficuit to work out your critical path.
They were intrested in DI (delay insensitive) methods because even if you have a very slow transistor the design will still work and if you dont go through the tranny then it will work at full speed.
Mouse powered Chips, Open source Processors and Lego
Altogether, it looks like a nice process, but it's not immediately clear that it will help.
This kinda news is like people using oil instead of hydrogen or other fuels to power cars.
This isnt good, because sure we can keep using this process, but we should use something new and better.
How is keeping intel and others from innovating by improving exsisting technology better than forcing them to innovate and create new technology?
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Why wouldn't an Intel just jump ahead 2 or 3 cycles to give themselves a competitive advantage....not that i doubt you're claim, cause we all know Marketing is really in charge not R&D!
Ignored Since 1973
Don't you just have to get the oil really hot?
The professor in charge has told BBC News Online that they're '20 years ahead of Moore's Law.
I'll believe that when it is in production and I am buying the damn things.....
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Because their competitors would do it as well, and both companies would lose.
Murphy was an optimist.
That's 2^20 times denser! For those of you who aren't so fast, that's just over a million. Impressive!
Now why is that "dubious"?
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Read his post, he was only kidding. No one actually thinks that Intel/AMD have super fast ships" in hiding somewhere. Well, no one who known the industry well.
Moderation: Put your hand inside the puppet head!
Why don't we just increase the die size?
(I know, more defects, etc. but it is another direction we can take)
These guys should quiet down. If they get together the other scientists in this field, they could take the next 20 years off. Now, if only I could find a way to do the same thing...
--Josh
There are exactly 42,935,718 letter sized sheets in a square mile.
moore's law is about macro economics, not technology.
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woah, that sounds easy !
but can someone explain to me how this will make a difference ?
I don't think so. In fact, if you go back to Babbage's Difference Engine, Moore's Law has been constant for 100 years. (See Kurzweil's raw data in The Age of Spiritual Machines). The mindset now is "transistors on silicon," but before that it was discrete transistors, and before that vacuum tubes. You have to think out of the box and not worry about lithography on silicon. Nanotechnology moving atoms, biochips, holography, all these are at least candidates to take Moore's law beyond silicon/transistors to the next level.
How about a moderation of -1 pedantic.
Bah - Gimme a 6502...
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If it helps...
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"2^20 times denser! For those of you who aren't so fast, that's just over a million."
You're not so fast yourself, bub. Try and get your math right before you get all condescending.
Moore's Law doubles in density every 18 months, not every year. So the correct calculation is 2^(20*12/18), which is roughly 10,321, or 3 orders of magnitude lower than what you stated.
"Mind, as manifested by the capacity to make choices, is to some extent present in every electron." -Freeman Dyson
The reverse is true in Windows. MS adds NOP loops, with the length of the loop being the number of days between now and when Windows was shipped. That way they can release new OSes every couple years saying the OS itself is faster than the current version :)
Ok, that was a lie, don't sue me for slander.
I've just heard a talk on a very similar technique that does not require heating and melting the substrate. This process squishes a liquid polymer between the template and the substrate so that the polymer fills the gaps in the template. Then they cure the polymer with UV light, lift off the template and then more or less follow the standard etching process.
The first thing you would wonder about is problems with air gaps and bubbles but they say that this has not been a problem.
They also say that template lifetime does not appear to be an issue but they need to do a longer term study on this.
One of the bigger problems they were facing was pattern alignment because the liquid polymer acts as a lubricant and the template tends to slide around as its being pressed down. They say they have addressed this problem with more rigid and precise mechanics.
Its very interesting technology and its expected that this technology will begin showing up in corporate research fabs - rather than academic research - by next year.
has patents on lithography technology that is rewritable and goes down to 20 nanometers !!
http://colossalstorage.net/colossal.htm
That doesn't make any sense. I think you forgot the first part of your comment.
The article states that the silicon wafer is melted briefly by a laser. Considering that the silicon wafers are actual single crystals, wont the melting and re-solidification of the silicon alter the properties of the wafer.
So instead of having a single crystal we could end up with many small crystals aligned along the features that we are creating. I am not sure how much the creation of semiconductors is dependant on having a single crystal, but if it is dependant then this new technique may not be that useful after all.
Isn't this one of the main problems chip-manufacturers have to deal with now that individual transistors are becoming so small?
:)
I'd imagine that the electron-migration with 10 nm transistors is pretty bad, not to mention the inferference between individual traces.
I could be horribly wrong, though. Anyone wants to hit me with a clue-stick?
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Yet you see all forms of industry cannibalize each other by spending exorbitant, but approximately equal amounts on game theory. They waste a ton of money, but the end up no better than if they spent no money on advertising. See Game Theory.
Correct. The idea here is that it is VERY expensive to create a new line of processor. The only was to recoup that money is to milk existing designs as long as possible while working on the next big thing in the background. Releasing a CPU design over the course of 2 years by starting slow and working your way up is a way to get that money back. If both companies released the top design they have, both would lose a few YEARS worth of revenue. AMD wouldn't survive it, and Intel would lose more money than they will just duking it out with AMD like they are now. Not to mention the idea that they would have no new releases for 2 years or so while they researched a new CPU core...
Murphy was an optimist.
The observation that the computing power which can be incorporated in a given sized piece of silicon doubles roughly every 18 months was put forward by the head of Intel, Gordon Moore, in 1965. - BBC News.
We're probably 20 years ahead of the curve, - Professor Chou.
Seems a little exaggerated. Let's look at the numbers.
The article says they're 100x as dense (in area) as current technology.
if 2^7=128, then technology needs to double fewer than 7 times.
7 * 1.5 years = 10.5 years, far fewer than the claimed 20 years.
And this technology is still vaporware, so even 10.5 years is exaggerated.
Sounds cool, though. It would be nice if this really worked.
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Well, if that were true, why wouldn't AMD release it's Athlon XP 2500+ just so it could say it's slightly ahead of Intel. When AMD's fastest chip was faster that Intel's fastest chip that really helped AMD with it's sales even among the slower chips.
I'm sure AMD has *plans* for faster chips, and I'm sure they've even made and tested them. That doesn't mean they're ready for primetime.
Actually, one of the major problems in Semicon manufacturing is filling the spaces left AFTER etching. If you don't get a clean fill, you get void areas which play hell with your electrical properties. The 10nm holes are pretty, but show me an SEM or TEM image cross-section of the fill and I'll be impressed.
I Am Not A Materials Science Whiz
You can never go home again... but I guess you can shop there.
Read it again.
From your refererence:
His use of "density" in this context is refering to the number of transistors on the die. For example, more transitors equals more density. That's why he mentions later on something about 1 million transistors.
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In the case of semiconductor technology, the die size is currently the limiting factor. I saw someone make a single atomic layer thick diode junction with Indium-Gallium-Arsenide on Silicon over a decade ago, using fairly basic equipment (a home made chemical vapour deposition setup) at a small university. Thickness isn't a problem - it's area. When we eventually hit nanotech, we'll see a lot of small versions of existing technology.
We do standard old fashioned i-line lithography (0.35m), old fashioned proximity lithography (1.5 m), decent laser direct write lithography (0.8 m) and top of the line e-beam direct write lithography ( 100 nm). The smaller the feature size gets, the more problems do we have with particles on the substrate, causing defects. Proximity lithography is suffering from defects caused by particles that form from the direct contact between the mask and the substrate. Thinking of an embossing method for resist patterning gives me a bad feeling about generated particles adhering to the stamp-mask. Especially at 10 nm feature size. Very questionable. Also, the wall angle of the patterned resist seems far off of the desired 90 degrees. The etch behaviour of such shallow slopes is difficult to control and leads to variance in etched feature size. This is an interesting lab experiment, but I cannot imagine it for high volume chip production at all.
True. Current transistor operation is statistical, so we need certain amount of electrons flowing from source to drain. If we make the gate thinner and thinner the rush will be like in tokyo subwaystation. This generates more collisions and heat no matter what you do. Still I think this business is just started.
hopey
Again, if AMD did that then Intel would just release a faster processor as well. They would both lose a lot of money on the bottom line.
Remember, the corporate droids track income from each line and the sales by timeframe. When sales of the slowest in the line reach a certain point, they pitch the next clocking of the architecture. They do the math to decide what CPU to release when, based on sales: not on what engineering or marketing wants them to do.
Murphy was an optimist.
If it's grown, then it can't be patented! oh no!
[insert witty comment here]
There is a list here.
and computer speed doubles every 39 fortnights.
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