Boosting Battery Life For RISC Processors
prostoalex writes "National Semiconductor and ARM Holdings will jointly develop the power management solution for RISC chips, that they estimate will improve battery life by 25-400%. The target date of the first sample product is Q2 2003." My old Tadpole laptop sure could have used this. I counted myself as lucky when I got a whole 45 minutes out of a battery.
When developing portable devices the most limiting factor today is not processing resources, memory or anything such. It is simply the power source.
Batteries of today are either too weak or too heavy. How ofter does one have to choose between a slim-line battery or an ultra-long life.
There have been many suggestions for competing technologies such as fuelcells, harvesting of motion energy and solar cells to mention a few. But still, they have proven to be too expensive, large or have some other problem (such as not being ready for production use yet). Hopefully these one of these, or any other, portable power sources will make it possible to carry real computing power without having to carry a heavy battery pack.
The solution today is to reduce the power usage. This can be done by shutting down parts of the clock trees in the CPUs, or by using Intel's PowerStep (i.e. two working speeds), or Transmetas's variable voltage and frequency technology, LongRun. As the article lacks technical details we can only guess about the techniques used behind the PowerWise solution. Also, the figures 25-75% efficiency gain is most probably measured under special conditions.
But, in order to avoid sounding too negative, it seems like the industry has realized the problem and are working for a solution. I feel that most of today's solutions (power saving) are just a cure for the symptoms (bad battery time), not for the cause (bad battery technology).
come on people
you just turn off the part of the core when you dont need it
not a really taxing idea (transmeta intel MOT and IBM all do the same in various ways)
but putting anything to silicon is always hard so kudos
john 'MIPS' jones
I'm not sure on what the transmitter's power requirements are like with 3G phones, or (hypothetically) ultra wideband phones... Does anyone know how they compare to GSM phones? I know that the max allowed transmitter power of a GSM phone varies a lot between countries.
A bit of (greatly simplified) background for those who havn't looked into this. The huge decrease in asych power consumption (at least using CMOS) is becasue the MOSFETs discipate (sp?) power during voltage level changes. Many transisters in sychronous chips change state every clock pulse, but changes are much more isolated in asynchrouns chips. I predict (in my infinite wisdom, and using my crystal-ball-of-infinite-wisdom) that RISC based asynch will get much more powerful and fast as companies like Intel, Motorola, etc put more money into reasearching this previously forgotten/niche field.
Probably they'll only be used in portable systems at first to conserve power, but maybe if design techniques progress, we'll see them in desktop PCs or even some heavy metal systems within 10 years or so as other benifits becom apparent... But even my crystal-ball can't say for sure.
-- below is opinion, don't read it if you're an easilly offended Republican or supporter thereof as you may be unintentionally offended - damn -1 flaimbait modders... --
I wouldn't count on much (US) government research money or grants going into it while Bush is president though... I don't exactly think he's interrested in energy conservation...
"A dictatorship would be a heck of a lot easier, there's no question about it." -George W. Bush
Another advantage of the ARM is the Thumb instructions that reduces the traffic over the memory bus. We must remember that driving memory bus is an expensive operation (power wise) compared to finding data in the cache. Smaller code means more code in the cache. One problem is that multimedia applications (such as movies, music, etc) fails to utilize the cache well (since the data isn't re-accessed). This is a problem area that needs more research.
...Batteries don't care if your CPU is RISC, CISC, chicken feathers, or satin. Would a better title be, "Reducing power use in RISC, to save battery life"?