AMD Breaks Ground on New Chip Facility
philthedrill writes "AMD announced that they have broken ground on Fab 36, which again will be located in Dresden, Germany. The 300 mm fab is expected to start volume production in 2006. There's more information at CBS MarketWatch." AMD will be moving from its current 200 mm wafer process, and looking to save money through the higher efficiency of the new process, as well as keep up with expected demand for their next generation processors. The MarketWatch article also contains some speculation about probable partners for AMD.
Why don't they skip to 10 foot wafers?
Wouldn't it be cheaper for them to put facilities that mass produce chips in countries where labor is cheap? Most Intel chips I've seen are marked "Made in Malaysia" or "Made in the Philippines."
300 mm refers to the size of the wafer. One wafer contains lots of chips.
Be wary of any facts that confirm your opinion.
The article seems to be misleading. Apparently it's wafer size, not feature size, on reading a bit more carefully. ;)
Qu'on me donne six lignes écrites de la main du plus honnête homme, j'y trouverai de quoi le faire pendre.
Yeah, I was impressed when we were making 6" wafers a few years ago and darn proud of it. I remember back when they were the size of a US quarter dollar.
I worked in final visual inspection on a 6" line and that was very dicy. You'd get someone failing too many parts, whole wafers in some cases due to what their eye saw as too much FLUC. Tricky balancing act since FLUC identification is more of an art than a science (metering thing is a science with acceptable ranges and such) in that we didn't want to ship things that would fail in the wild, but we didn't want to fail too many things and incrase costs (a wafer at the final end has had a lot of effort put into it).
Oh wait, I just re-read your post. Where you meaning sarcasim or did you not understand what they were talking about?
Wheeeee
It's the size of the wafer, the round silicon thing with *many* chips on it.
See this link (to Intel, inappropriately) for more info.
> Or 300mm^2? I'm guessing the latter, which equates to about 1.73cmx1.73cm
Nope. that is 300mm in diameter. And that's the diameter of the wafer, not the chip.
This is what 300 mm refers to.
I misread the article, it would seem. I thought they were referring to feature size when it read 'the 300 mm fab will begin operation...' Sorry about that.
Qu'on me donne six lignes écrites de la main du plus honnête homme, j'y trouverai de quoi le faire pendre.
I was thinking the wafer itself was larger, but 300mm is what Intel are using (or were using when that article was written).
Thank you AMD for laying the foundation of the Saxony (Silicon) Valley together with Infineon. Thank you for recognizing the talent, education, pracmatism and working power of the patient and friendly Saxony people. Your payback is visible as you are now nearly your break even. Thank for enjoying our great land and cultural as well as industrial heritage.
May also come the great R&D Transmeta, Big Blue, Samsung and Motorola here. You will get our working power and you will fall love too.
Do you people actually know this, or is it just kibbitzing about a possible typo? I thought mm seemed large for chips, as I was under the impression nm was a more relevant unit. I may just be mistaken, yet again :)
"Programming is like sex: one mistake and you have to support it for the rest of your life."
So we've all agreed that 300mm isn't the chip size, so it must be the size of the fab itself. Yes AMD are building the worlds smallest fab, and employing little goblins to make, by hand, the worlds smallest chips.
Next generation AMD processors will require no power supply as they will have tiny elves inside on treadmills which act both as the power and the clock cycle. Elves have been tested at IBMs labs up to 4.2THz which appears to be their physical limit for peak speed. The advantage of using Elves is that they can intelligently act as a variable clock speed, slowing down when nothing is happening, potentially to a stop, then giving a quick blast of 4.2THz power when required. It should be noted that each chip will have accomodation for around 100 elves, but only 50 will be delivered with the chip, the remaining 50 berths are for expansion and also for much more effective chip to chip communication in "ElfBUS"(tm) multi-processor systems.
Yes Elves are the future alright, and goblins are taking our jobs.
Or am I reading a bit too much into this ?
An Eye for an Eye will make the whole world blind - Gandhi
Yes, they do. Or have googled it. For example, this article in the Industrial Physicist mentions 300mm wafer sizes in the sixth paragraph.
Relevant for the features within devices, not the wafers the devices are fabricated on. Many, many devices are made on a single wafer.
He speaks the truth. Think of a wafer as a slice out of a log of beef (except the beef is silicon).
I assume this means we'll get smaller chips from AMD now...
It's the diameter of the wafer, at 30 cm, it looks about right.
its off by an factor of around 100.
with you forumula, the silicon of an opteron would cost 2000$ alone....
HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
So the entire chip must be about 10 square meters? ... and running hot at 10Hz?
... and illegal to operate in California, 'cos it draws too much current!
Dude - don't diss the Pentium V.
__ Someday, but not this morning, I'll finally learn to use the preview button.
Alright - I know my Athlon is bigger than a millimeter squared, but I paid way less than $10,000 for it...
Tim
Omnia vestra castrorum habetur nobis.
Please, for god sakes, do not talk out of your ass. How does this shit get modded up? Just baffles the mind.
I work in the industry. Your numbers and your assumptions are way off. Fist off, a 200mm polished non-epitaxial silicon wafer is going to cost about $60-75 depending on the specific processing you want done to it. A 300mm wafer isn't a whole lot more. A big piece of the cost of a wafer is the processing, labor, and subsidization of investment capital for the huge plants required to manufacture wafers. The silicon itself isn't terribly expensive. 300mm wafers do not cost an arm and a leg. They are the most cost effective way to produce chips right now and 300mm is the market standard. AMD has been using 200mm wafers in the past but with the larger die size of their newer chips, 200mm is biting into their profits. The problem is silicon wafers are round and CPU dies are square. All of the silicon around the edges is wasted where a whole core won't fit. 300mm makes this wasted silicon a much smaller percentage of the total wafer's surface area.
Wrong assumption two: 300mm will be here for a while. There are still a lot of companies using 200mm wafers. I know this because I personally make 200mm wafers, and market forecasts has us producing a shit load of 8" wafers for THE NEXT TWO YEARS. 300mm wafer demand is growing, and will continue to grow for quite some time as companies make the transition. I would expect 300mm to be standard until at least '07 or '08. I heard someone talking a while ago about 350mm wafers, but I have a strong suspicion this person was, like you, also talking out their ass. To my knowledge, 300mm is the largest wafer being produced now or in the near future.
You can't legislate goodness. Let each to his own destiny, by will of his freely made choices.
When will Cyrix be coming out with their next big thing?!
300 mm is 11.8 inches, so backwards Americans usually refer to them as 12 inch wafers. But not forwards Americans, of course.
a,e,i,o,u and sometimes w and y (at be if of up cwm by)
Why are learned people incredibly prone to verbally abuse somebody who is wrong?
Welcome to Slashdot. It's always nice to see new faces.
--
"Outlook not so good." That magic 8-ball knows everything! I'll ask about Exchange Server next.
I don't like verbally abusing anyone. I'm actually a super nice guy. It is just frustrating to see one person make a few assumptions, a few other people make the assumption he is right and mod him up, and then the rest of the people thusly assume that this highly rated post is accurate. It's the snowball effect of assumptions. I have no issue with people being wrong about anything. I just don't think people should speak as though they know something when they don't.
/.
Then again, this is
Everyone's the expert.
You can't legislate goodness. Let each to his own destiny, by will of his freely made choices.
I couldn't find any reference anywhere to the feature size to be used on these 300mm wafers. Is it 90nm?
Patrick Doyle
I mod down every jackass who puts his moderation policy in his sig. Oh, wait a sec....
Thanks for the accurate info. Its a pity Slashdot has degenerated so much. I used to really enjoy the industry info responses by people like yourself. Now its like trying to filter spam out of my mailbox..
I wish that Slashdot had a 13 year old kid filter... would make it alot less like fatbabies.com...
why don't they make square wafers then? I'm seriously not being a troll, I assume that the wafer isn't being rolled around or spun, at least after being manufactured.. so why not use a square wafer, or recycle the silicon that's wasted?
I'll admit I know nothing of the production of silicon wafers, but it doesn't seem like it'd be harder to get square ones than round ones, or that it'd be impossible to make round ones, chop off the edges to make it square, ship that to AMD, and then melt the edges down in to another wafer.
And hence, I ask.
Your point is well-taken. I have seen a number of +5 info. posts which are out-right wrong. Moderators do take action when pointed out.
I'd just like to think unless the OP was deliberately trying to mis-inform, there is no reason for abuse.
Thanks for responding:)
As another poster pointed out, the move to 300mm wafers is intended to reduce wasted space.
AMD's die size has gotten large lately, so they need to increase the overall die size so that more dies will fit as opposed to areas where a die wouldn't fit. You can't run on half a CPU.
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On the other hand, it would herald a welcome return to traditional QA techniques. Wheeltappers from the rail industry could be retrained to walk around chips, tapping suspect components with their little hammers.
This is great news for eastern Germany, in particular the Dresden area, which has really been on hard times since reunification. Hopefully this will also help fight the nascent neo-Nazism that was budding in Saxony for a while...that seems to have quieted down in recent years.
Cheers,
Ethelred
Everyone wants to be Ethelred. Even I want to be Ethelred.
Due to the nature in which silicon crystals are grown, they will always come out round. A seed of perfectly aligned silicon is dipped into a crucible of molten silicon. Both are counter-rotated and the seed is slowly pulled from the melt, thus producing a round crystal.
I have a feeling that making a square wafer out of a round crystal is possible, but it probably isn't cost effective compared to the current ID saw method.
I worked in the grower industry for a few years but not in a fab. Someone closer to the industry please correct me if I am wrong, but doesn't the waster silicon go back to the supplier for re-purification?
Wafers are produced as slices from long, round silicium blocks. They have this form because that's the way they come out of the zone heating ovens used to purify the silicium and melt out all the atoms you don't want on the chip. Non silicium atoms cause defects in the crystalline structure because of different size and number of electrons in the shell.
;)
That's one of the issues with 300mm wafers (where 300mm refers to about one foot in diameter): The silicium blocks are wider in diameter, thus needing larger zone heating ovens, thus more energy evenly distributed over the whole zone. If the energy isn't exact the right one in the melting zone, the wrong atoms get out.
The purified silicium blocks then get sawed into thin slices. Larger slices are more prone to breaking during the handling, another issue to overcome while going to larger wafer sizes. They have larger surfaces which could be scratched or damaged.
On the other hand: Once you have the whole process running, you get more chips from the same area
Wouldn't it draw less current? Less IR^2 losses and greater heat dissipation(no need for a heat sink, the full chip is one), the speed would be limited more by the time it takes for the signal to travel from one end to the other?
God, root, what is the difference?
RTFA-- Germany offered them $1.5 billion in incentives, and they're building right next to an existing fab with experienced employees. $1.5 billion would be tough for a US state to put together.
Who do you get to be an expert to tell you something's not obvious? The least insightful person you can find? -J Roberts
Nobody opposes freedom for Iraqis. Some people, however, think that maybe we should have kept on with the diplomacy a bit longer before sending in troops. Who is right? I don't know. At the very least, it's fairly expensive international-relations suicide to go invading stuff on your own without the help of the UN. But suggesting that because they do not advocate war, Germany opposes freedom for Iraqis is ridiculous.
Let's see, the current Opterons are 193mm2 using 130nm process, as you can see here, so AMD is getting at most 148 dies from one wafer.
If we assume a regular hexagon of 193mm2, using the formulae for regular hexagons found here (Google to the rescue, Insta-Math!) each hexagonal die would be 14.93mm wide and 8.619mm to a side. That'll give you 13.39 dies across and 11.6 dies verically on a single wafer. SO, ok, all you Slashdot-lurking mathemeticians, how many hexagons of the given size can be completely inscribed by both 200mm and 300mm diameter circles?
And, as an additional exercise, what are the maximun number of hexagonal dies for 200mm and 300mm wafers when circuit dimensions are halved, i.e. 65nm process as planned for Fab-36?
Cheers!
"The only good windmill is a tilted windmill."
Actually, 200mm is still the industry standard. After the intial build-out of 300mm fabs by the three I's (Intel, IBM, Infineon) its taking MUCH longer for other companies to financially justify building 300mm fabs.
In most cases, 200mm fabs cannot be retrofitted to 300mm, so entire new facilities must be built. Also, 300mm equipment is almost universally more expensive that its 300mm counterpart. (Our equipment runs anywhere from double to triple the cost.) A few 300mm fab runs about 4 billion US to build. In order to recieve the benefit of the larger wafers, chip makers have to run high volume chips with well defined processes. Few companies are as good as Intel or IBM at manufacturing chips. If you process is screwed, scrapping a 6 or 8 inch wafer costs you less lost (potential) revenue than a 12" wafer. I have heard of companies looking into running multiple devices of different sizes on wafers (alt-kerf) to better utilize 12" wafers, but I've never actually seen it work.
One interesting side-note about 300mm, it requires a huge amount of fab automation, due partially to the fact that a full cassette of 300mm wafers (25, generally) is too heavy for a fab worker to safely life unassisted. You can imagine the fallout of someone dropping a full cassette containing 25000 Pentium 4's. IBM's plant in New York state is one of the most advanced implementations of this. Quite amazing to see.
This is about the whole keep it in the States vs. Maylasia thing.
I know nothing about this industry so I'll just let someone take this:
Is there really that much of a economy of scale for moving a chip plant to Maylasia? I see that industry of creating and manufacturing processors and other computer whatnots to be EXTREMELY quality oriented work where the clock, quality, and price are an paramount. It looks like a tightrope act.
So my question becomes this: with all of that quality and issue at stake, does moving to Maylasia really make that much difference? It would seem to me that the capital investment is maximum and labor is not the largest factor (once again, I don't know). If you are looking for educated workers, I wouldn't think that Maylasia would be as good as America... but I may be wrong.
I just don't get all of this corporate moving. If you make shower flip-flops, I could see it. But if you make anything with a real standard that can't be found in a Wal-Mart, I just don't get it.
Either way, someone please explain.
Thank you AMD. By the way, I will continue buying AMD because I like it.
Fool. AMD is "Advanced Micro Devices". You're probably confusing them with the BIOS maker AMI, which is "American Megatrends Inc" (stupidest name I've ever seen).
If a job's not worth doing, it's not worth doing right.
Take a look at the photo in the top-left corner of the linked press release from AMD.
:>
Could that guy possibly be any more German?!
Damn, and just when I thought Gallium Arsenide had a cost advantage over silicon! Thanks for raining on my parade, DU...now I'll have to go back to work.
Like the other poster I know very little about chip production, but you didn't seem to answer his question.
It appears that these ovens could produce square chips. That would appear to save some money and then it appears that you wouldn't need to keep making bigger and bigger wafers.
Again I know verry little about chip design, so I am not trying to be a troll or start any wars here.
The more I learn about science, the more my faith in God increases.
Because the Germans guaranteed the necessary loans. AMD's balance sheet has been so bloody of years past, that there wasn't anyway that AMD would have been able to swing the loans without a consigner. Aren't a lot of parents out there who can co-sign a $2.4 Billion note. From the article...
If I was a German taxpayer, I'd be wondering how AMD can possibly pay off the note.The 1,000 jobs created by this plant are a far cry from the 100,000 that were killed on Feb 13-15, 1945. The city of dresden was basically annihilated by American and British allied forces in 3 days by 1250 sorties. They used a firebomb technique to make sure that they could kill as many people as they could. These were refugees, not Nazi soldiers. Bombing of Dresden
indierock / punkrock band photos and more... http://www.digitaldefection.net
I believe - and I could be wrong here, please someone correct me - that the silicon ingots have to be grown in a fairly complex fashion involving centrifuges to spin impurities out and the like resulting in a cylinder shaped ingot, from which they cut the wafers from.
-
they cant produce square wafers.
This kind of cleaning works that way:
you have a silicion rod and move is SLOWLY through a heating device that heats it up enough to let non-silicon atoms migrate.
The end that leaves the heated area slowly cools, and (if all goes right) silicon atoms create a monocrystal. The wrong atoms stay in the heated area and wander to the end which is cut off.
in reallity, you often need many passes...
now, if you would use a square rod, the corners are HIGHLY sensitive and very likely to cause defects in the crystal...
HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
you can forget GaAs as silicon replacement because the low hole mobility prohibits fast CMOS logic.
And ECL would really define "a new kind of hot"
HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
If this isn't the most frustrating thread I have ever been involved with, I don't know what it.
Patrick Doyle
I mod down every jackass who puts his moderation policy in his sig. Oh, wait a sec....
I was mostly being facetious. GaAs hasn't been used seriously in digital for awhile now. The real battleground is in analog, specifically RF. RFCMOS is constantly threatening to knock GaAs out of the market, primarily because of downward cost pressures. There's also the attractiveness of integrating things like the power amplifier onto the radio chip (which is already RFCMOS.)
The above is off-fcuking-topic!
Besides the fact that it is easier to make the wafers circular, I thought that I would let you know that the wafers are indeed spun. Usually this is to dry them off after they've been dipped in a chemical or water.
The 300mm is a real advantage for any company that has a Fab which supports it. You can produce more than twice as many chips on a 300mm wafer then on a 200mm wafer.
It's not really a breakthrough on AMD's part at all. Intel already has 300mm fabs up and running.
Microsoft should hire me. I can write code that doesn't work faster than the guys they have doing it now.
Most of the machines we have here at our plant are capable of processing 6" and 8" wafers. Most of our cleanlines could accomodate 12" but that's about it.
You think dropping a cassette of 12" wafers is bad? We had a guy who pulled too much on an ingot and cracked the furnace, then dropped an ingot. That amounted to about $850K in damage, lost time, and lost revenue. That guy got fired faster than you can imagine.
You can't legislate goodness. Let each to his own destiny, by will of his freely made choices.
Well, duh! That's why they have 36 of them. Besides, it's so much better than those old 100mm and 200mm buildings.
My other car is a 1984 Nark Avenger.
300mm (12") wafers are by and large cutting edge technology. Most fabs still use 200mm (8") stuff, only the most expensive chips, PLD CPU some cell and memory applications justify the sort of investment that new tools require. There is still some 6" stuff running, and I think a few analog companies still use 4" wafers. The only 300 mm fabs I know of are owned by TI, Intel, AMD, IBM, Taiwan Semi, and Samsung. I'd assume that Micron, Infeneon, United Micro, and ST Micro have one or plans for one soon. AFAIK all the 300mm stuff runs a 130 nm process and Intel and IBM are already trying to get 90 nm going. Everyone kinda slowed their 300mm migratin when unit demad fell in 2002. The cost advantage comes along with a huge increaes in chips produced, and there were some problems getting yields up to a decent level.
Degaussing scares the bad magnetism out of the monitor and fills it with good karma.
IBM got a pretty sweet incentive package from NY to build a simialr fab there. Not quite as nice, but this deal wouldn't have happened without tremendous funding from almost any potential location. It's fairly common for at a bare minimum property taxes to be rebated if you bring the hope of high paying jobs.
Degaussing scares the bad magnetism out of the monitor and fills it with good karma.
I don't understand the connection with my post.
Patrick Doyle
I mod down every jackass who puts his moderation policy in his sig. Oh, wait a sec....
Holy reparenting, batman! When I initially posted this, it made sense. But that parent post is gone. It's not the first time I've noticed this on /., but it's the first time it's happened to me. The parent post is gone, and my post has been "reparented" up to connect with the parent's parent. Anybody know what gives?
There is a checkbox labelled "reparenting" which is enabled by default. When checked, this causes posts that are children of posts below your threshold to be reparented up and still displayed even though their parent post is no longer visible.
That explains a whole lot of the top-level "reply" posts you see on stories, as well as the complete lack of sense my post makes with its parent gone.
There ought to be some sort of "Parent Missing" indicator, and maybe a link to the low-modded parent, just for the sake of making sense of "adopted" posts like this one.
First, you were getting nanometers (nm) and millimeters (mm) mixed up. nm refers to the minimum feature size. (Or your resolution, if you will.) the 300mm slabs refer to the size of the entire wafer, on many dies are fit.
Have you ever seen a picture of a circular piece of silicon? That's a wafer. All of the rectangles you see on the wafer are the individual dies, which are placed in a plastic(If you're really cheap, and you're not worried about static in handling) or ceramic(what's normally used) casing. Once you place the die in the casing, and perform a little bit of wiring inside, you have your chip.
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Patrick Doyle
I mod down every jackass who puts his moderation policy in his sig. Oh, wait a sec....
My apologies. I was replying, long after I had last posted in the thread. I should have paid more attention the the context than just reading your post.
Mixing up nm and mm was rampant in this story. I was beginning to think nobody had a frigging clue what they were talking about. If a guy just reads the background articles on Ars Technica, they're a veritable authority compared to the average discussion participant.
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Well, of all the people that accused me of not understanding the issues, you're the only one that appologized, so thank you. :-)
Patrick Doyle
I mod down every jackass who puts his moderation policy in his sig. Oh, wait a sec....