Strained Silicon Chips From Intel

Quirk writes "NewScientist is reporting... "Intel has taken the wraps off a secret technique it is using'Strained silicon' chips to increase the speed of its Pentium and Centrino chips. The technique boosts the rate at which transistors switch, without having to make them smaller.""

Comments

Fujitsu

[ObviousGuy]

There was a problem with Fujitsu hard disks a few months back because of a problem with their silicon boards being strained. It turns out that the factory from which they were receiving their silicon from wasn't cleaning the silicon of enough impurities and this resulted in the resulting products based on the bad silicon up and dying with no warning.

While this is not the same type of straining that Intel is doing, it is important to see whether this new technology can function in real world situations without failure. And it is important to test this over a long period of time.

Since when is Strained Silicon Secret?

[RalphBNumbers]

I know IBM has been publically working with this, at least in research, for a long time, and it's a fair bet other firms were too.
IIRC they've even used SSoI (Strained Silicon on Insulator) for some production ASICs...

Re:Since when is Strained Silicon Secret?

[metlin]

During my undergrad, one of my professors of Solid State Circuits lab talked about this. She said that the reason this is hard is because when your source/gate region is partially depleted of charge carriers, there is a need to raise the source-drain gates effectively to utilize the technology. You see, one of the benefits is that the effective capacitance of your source-drain region is decreased. However, if your source-drain gates are not sufficiently increased, the remaining charge carriers remain back and over a period of time this in itself builds up a capacitance. It then begins to function like a dual capacitor device, etc.

And to counter this, you will end up using metal within your S-D zone, however that will have its own side effects - you will need more interconnects and this will increase the resistance by a very slight amount. Trivial for a small number of transistors but if you're having a few million of them, it could be painful. Also, it would mean that the entire thing is going to heat up ever so quickly.

And ofcourse, you always have issues with the Floating Body effects (warning Powerpoint).

Couple this with a hard manufacturing process, and you have a technology thats atleast going to take another 5-10 years to mature. And thats being optimistic :)

Cyrix

[Anonymous Coward]

had actually been doing this for years.

Mechanical Stress

[miracle69]

All of this is at the atomic level, but I do wonder how these things hold up to mechanical and thermal stress.

To stretch the silicon lattice, Intel deposits a film of silicon nitride over the whole transistor at high temperature. Because silicon nitride contracts less than silicon as it cools, it locks the silicon lattice beneath it in place with a wider spacing than it would normally adopt. This improves electron conduction by 10 per cent.

What temperature ranges does this become an issue? If my processor gets warm, will its performance decrease because the strain dissapeared?

Would mild mechanical stress on the chip (i.e. application of heat-sink) alter the strain?

100 billion dollar chip market!

[()vnorby()]

The announcement, at the International Electron Devices Meeting in Washington DC last week, gives a glimpse into the intensely secretive way chip firms attempt to gain an edge over their competitors in a market worth over $100 billion a year. Chip market worth 100 billion dollars ? Wow. That is the thing that stood out for me in the article.

Way behind competitors still

[MBraynard]

Man made diamonds have much less problems handling heat and Intel is ignoring this while their competitors are on the fast track.

Still, Butler is frustrated with what he thinks of as myopia in the US computer business. "Europe and Japan have been investing in diamond semiconductor research," he says, citing the Japanese government's announcement in December that it would begin allocating $6 million a year to build a first-generation diamond chip. "Bob Linares has given the US the advantage, but nobody's paying any attention," he says. "If we're not careful, the Japanese or the Europeans are going to claim the diamond niche."

Indeed, Intel's top materials executives weren't aware of the latest research breakthroughs when I spoke to them in June, although they certainly understood the potential for diamonds in computing. "Diamonds represent a seismic change in semiconductors," says Krishnamurthy Soumyanath, Intel's director of communications circuits research. "It takes us about 10 years to evaluate a new material. We have a lot of investment in silicon. We're not about to abandon that."

Click here for full article.

Re:Way behind competitors still

[Epistax]

In my New Employment Orientation (NEO) at Intel, they basically said ~The only way we'll ever get beat is by some minor startup nipping at our heel~. The jist of it is they said they will not get bogged down in old ways of doing things and will constantly change. Well I think the CEO needs to take NEO...

Intel may be right

[dus]

Intel may be right on this one - they always have been conservative and this worked out very well for them. Large companies often wait for smaller companies to take the risk and prove or disprove the viablity of new tech. Nobody knows how well diamond is going to work out!

Remember GaAs?

Re:Finally Caught On

[Bender_]

This is most probably a fake:

o stackable chip - unpropable
o 64Bit extension by module? Good joke, there is just no way to provide this technically..
o "lots of wires" - no way, you dont get above 20MHz when connection a CPU by wires
o 4000MHz front side bus - no way there is a tenfold increase.

Try harder next time..

news

[ruiner5000]

Headline-Intel sees IBM and AMD tech doing well, decides to copy.

link

Silicon on Insulator, Copper Interconnects, DDR memory, dual core, but not HyperTransport yet.