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Intel Reveals Next-Gen CPUs
EconolineCrush writes "Intel has revealed its next generation CPU architecture at the Intel Developer Forum. The new architecture will be shared by 'Conroe' desktop, 'Merom' mobile, and 'Woodcrest' server processors, all of which were demoed by Intel CEO Paul Otellini. Rather than chasing clock speeds, Intel is focusing on lowering power consumption with its new architecture. Otellini claimed that Conroe will offer five times the performance per watt of the company's current desktop chips. He also ran the entire keynote presentation on a Merom laptop, and demoed Conroe on a system running Linux."
With Laptop sales "Surging" and technology growing exponentially, isn't it time to look at the batteries? You hear a lot about faster video cards/ CPUs and memory, but almost nothing about Next-Gen batteries. Battery technology hasn't really evolved at the same rate as other computer components, has it? I personally feel the bottleneck resides in the batteries and for the industry to progress (on a whole), they're going to have to take a look at all aspects.
"Simplify, simplify, simplify!" Thoreau
Rather than chasing clock speeds, Intel is focusing on lowering power consumption with its new architecture.
Exactly what we've all been waiting for. Is Intel Good(tm) now?
The Digital Couture Collection
So this is what Steve was talking about.
Awesome. Now I'll be able to run 4 times as many CPUs with my 1000w PSU.
Ok, Conroe appears to be a lake in Texas, Merom is a bluff near the Wabash river in Indiana...where/what was the inspiration for Woodcrest?
So instead of clock speed how about execution speed of standard benchmarks on a reference machine? Or would that show how much they suck per dollar next to AMD?
http://www.anandtech.com/printarticle.aspx?i=2504X JsX3Jldmlld19JRD0xNTAy. php?dXJsX3Jldmlld19JRD0xNTA0. php?dXJsX3Jldmlld19JRD0xNTAz1 23.html
http://theinquirer.net/?article=25623
http://www.hexus.net/content/reviews/review.php?d
http://www.hexus.net/content/reviews/review_print
http://www.hexus.net/content/reviews/review_print
http://www.tomshardware.com/hardnews/20050823_133
They've taken a little cooler and stopped chasing their speed dragon to make a more solid, well-organized, and efficient architecture. Once they've established this 'way point' of stability, then they can get back on the zip zoom bus. I'd like to stand in on the silicon vista, if I were tiny, and see how much less litter they've got hooked up down there. Copper plate thatches, cat scratches, now Intel has the cool down rock and roll.
TR also has additional details on the architecture itself.
We now have batteries powered by urine!
Who hasn't wanted to pee on their new laptop? Marks your territory and provides hours of power!
what else could you want?
Starsucks
Does it run Lin--, err, Mac OS X?
Quantum materiae materietur marmota monax si marmota monax materiam possit materiari?
Does anybody know what instruction set these three new processors implement? The article states that these are 64-bit CPUs, but doesn't say whether they feature the AMD64 or the Itanium instruction set.
John Sauter (J_Sauter@Empire.Net)
Fundamentally, most markets of any age undergo specialization, niches form, and those most fitted to the niches, do best. But having a unified architecture between server / laptop / desktop flies in the face of that; it either claims there is no niche market anywhere, or that there is a "killer chip" which fits all niches better than anything else.
Now, I can guess what Intel would choose of those options, but is there something about the chip industry that makes it immune to this specialization idea? What am I missing?
In Soviet Russia, us are belong to all your base.
The reduction in power will enable a new class of devices to be created at the 0.5W marker - the Handtop.
Also known as the video iPod, perhaps?
Somehow I don't think you RTFA.
Thanks to the death of NetBurst, Conroe will feature a 5x increase in performance per watt. Here's to the death of the power-hungry Intel processor.
and
Woodcrest and Merom will both improve performance per watt by a factor of 3 over their predecessors.
They're improving the processor as opposed to the batteries...
On electrical cost savings alone, PC users will save $1 billion per year for every 100M computers.
Pretty amazing. Although I'd like to see real #s to back up that claim.
I feel good about the choice that Steve made but I don't think he capitalized on the announcement.
Here's hoping that the new architecture is not just a M$, Linux thing.
I'd really like to have a low-power multi-core 64 bit chip blazing away in my next iMac.
MSBPodcast.com The opinions expressed here are my own. If you don't like 'em... Think up your own stuff.
The screenshots make it look like Intel isn't including HT with this next gen core. Is that because it's likely the pipeline is shorter? I thought it would be uber-cool to have a dual-core CPU with HT for some awesome synthetic 4-core action. But, I guess the real question is: Should I care about HT anymore?
It's been YEARS since Transmeta began preaching performance/watt, and it looks like right now, when Transmeta has some big contracts (with Sony, Microsoft, Fujitsu, etc) beginning to pay off, Intel finally figures it out.
Of course, Transmeta's already GOT the technology to cut leakage by tremendous amounts... Given that they are no longer a direct competitor of Intel's, it would make some sense if Intel simply licensed Transmeta's LongRun2 tech. But what do I know? I'm always foolishly choosing the better technology instead of the better marketing.
It was a joke! When you give me that look it was a joke.
So much for Moore's Law. So much for the supposedly inexorable march of technology. So much for that nonsense about increasing CPU performance, you all didn't really want 4 GHz anyway, did you?
People have been predicting the demise of Moore's Law for years. It's funny that it's happened and nobody seems to notice.
While I admit there's been times I WANTED to get back at my laptop for being so slow, the smell factor stopped me. Okay that and the cost, not to mention that I could get zapped in a very private place!
Urea don't small like roses, just sniff my cat box after the cat's used it. Yurk! (Actually, just be in the room after he goes. Bleah!)
MSBPodcast.com The opinions expressed here are my own. If you don't like 'em... Think up your own stuff.
But if Intel stops going for higher clockspeeds how am I supposed to know how impressive an AMD 3200+ is? I need my completely reliant rating system intact! I guess the FX chips have already destroyed my ability to rate things simply.
higher clock speeds isn't the only way to get more performance.
At 14 stages, the main pipeline will be a little bit longer than current Pentium M processors. The cores will be a wider, more parallel design capable of issuing, executing, and retiring four instructions at once. (Current x86 processors are generally three-issue.) The CPU will, of course, feature out-of-order instruction execution and will also have deeper buffers than current Intel processors. These design changes should give the new architecture significantly more performance per clock, and somewhat consequently, higher performance per watt.
I am glad to see that Intel is addressing power consumption with the server chip Woodcrest. After all, desktops and laptops are small potatoes compared to servers when it comes to power usage. For corporations with large server implementations, I could see this saving a lot of power (=$). Good move for Intel; lower power bills are good leverage for new technology purchases -- many of us used that same argument to upgrade from CRTs to LCDs. It is nice to finally have something to be excited about from Intel again.
This is something Intel needs to do to stay in the CPU market. Their NetBurst architecture has allowed AMD to capture the hearts of the enthusiests as it is a better processor. (Note: the mass market has many other factors besides which processor is best in determining sales.)
While I currently favor AMD's processors, The Pentium M is a magnificant piece of hardware. With Intel basing their future processors on the Pentium M they are going to give AMD a run for their money. This will force AMD to drop their prices to a more reasonable level.
The one thing Intel is doing that IMHO is wrong is changing the definition of performance from clock speed to performance/watt. This tells us nothing of the performance of the processor or the power required to run it. Instead we should have two basic measurements for all processors: performace and power consumption. Most people are able to do simple calculations such as division on their own or with a calculator. The is no need to hide the actual performance from the end users.
Instead of Anand's pictures of PowerPoint slides, here's some actual info from TechReport:
"IDF -- On the heels of Intel's announcement of a single, common CPU architecture intended to drive its mobile, desktop, and server platforms, the company has divulged additional details of that microarchitecture. This dual-core CPU design will, as we've reported, support an array of Intel technologies, including 64-bit EM64T compatibility, virtualization, enhanced security, and active management capabilities. Intel says the new chips will deliver big improvements in performance per watt, especially compared to its Netburst-based offerings.
At 14 stages, the main pipeline will be a little bit longer than current Pentium M processors. The cores will be a wider, more parallel design capable of issuing, executing, and retiring four instructions at once. (Current x86 processors are generally three-issue.) The CPU will, of course, feature out-of-order instruction execution and will also have deeper buffers than current Intel processors. These design changes should give the new architecture significantly more performance per clock, and somewhat consequently, higher performance per watt.
Unlike Intel's current dual-core CPU designs, which don't really share resources or communicate with one another except over the front-side bus, this new design looks to be a much more intentionally multicore design. The on-die L2 cache will be shared between the two cores, and Intel says the relative bandwidth per core will be higher than its current chips. L2 cache size is widely scalable to different sizes for different products. The L1 caches will remain separate and tied to a specific core, but the CPU will be able to transfer data directly from one core's L1 cache to another. Naturally, these CPUs will thus have two cores on a single die.
The first implementation of the architecture will not include Hyper-Threading, but Intel (somewhat cryptically) says to expect additional threads over time. I don't believe that means HT capability will be built into silicon but not initially made active, because Intel expressly cited transistor budget as a reason for excluding HT.
On the memory front, the new architecture is slated to have the ever-present "improved pre-fetch" of data into cache, and it will also include what Intel calls "memory disambiguation." That sounds an awful lot like a NUMA arrangement similar to what's found on AMD's Opteron, but I don't believe it is. This feature seems to be related to a speculative load capability instead..
The server version of the new Intel architecture, code-named Woodcrest, will feature two cores. Intel is also talking about Whitefield, which has as much as twice the L2 cache of Woodcrest and four execution cores.
The company has decided against assigning a codename to this new, common processor microarchitecture, curiously enough. As we've noted, the first CPUs based on this design will be available in the second half of 2006 and built using Intel's 65nm fabrication process. "
Kaa
Kaa's Law: In any sufficiently large group of people most are idiots.
I believe upoon release it will be 4.6 Ghz.
Regards,
Steve
The problem is that the physics for how to increase the number of transistors on a chunk of silicon is very well understood and the physics of how to make better batteries is not.
To double the number of transistors on a processor is primarily a matter of lithography, that is etchich smaller and smaller lines into an existing wafer. Same materials, more or less, and same technique, more or less. With batteries, it's far more hit and miss.
The technology and fabrication process to make a lead-acid battery is vastly different than NiCd. NiMh is somewhat similar to NiCd, but then Lithium Ion is rather different and requires a lot more technology to make it work. Then you've got fuel cells as a possibility, and that's vastly different from anything I just described.
There's a lot of effort being put into battery research because everybody understands what a fundamental limitiation it is to everybody's dreams of pervasive wireless. It's rather ironic to describe these internet coffee shops as having "wireless" when you still have to have A/C power to do anything. The problem is that it does not have the clear and obvious path that CPU's have had.
I expect that fuel cells will eventually be the way to go. Still there's a certain inconvenience in them. If I want to charge my laptop batteries, i just plug in my laptop. If I've got a fuel cell, do I have to buy numerous cells? Do I have to fill them up with methanol, etc? It doesn't seem like there's a panacea for portable power (and other p words) anytime soon.
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With everyone chasing multi-core rather than clock-rate this isn't really a suprise. If you want to run 4 cores on one die you clearly need to reduce the power consumption of each of those cores over what is done today.
It clearly helps with laptops, which of course will be multi-core themselves in a year or so.
What an odd day it will be when I start ordering either a "2-way" or "4-way" laptop.
An Eye for an Eye will make the whole world blind - Gandhi
I have to wonder if Intel basically ditching the last 5 years of CPU development in favor of their Israeli skunkworks ranks at or above the famous Microsoft IE U-turn?
I mean, Intel sold millions and spent billions on Netbu(r|)st, and hit the wall far before the 5+ghz figures bandied about back in the day. This is basically ctrl-alt-del on a large part of their roadmap, though I'm sure they'll still be selling 'traditional' P4s for awhile.
I don't think that the choice of desktop background for this aluminum-looking notebook is coincidental.
May this be a hint of a "5 W Sub-Laptop" in Apple's future?
Intel plans to release these in Q2 2006. They will use a 65nm process, support dual cores, and get 5x the per-watt performance of the Prescott EE.
AMD has dual core chips available now, that get 3-5x the per-watt performance of Intel's Prescott EE line (depending on how they define certain things - Idle? Mean power/load? Peak realistic-but-not-theoretical? TDP?).
And AMD only uses 90nm at the moment, and will have two 65nm fabs up by the end of this year - Which will give them another nice boost in terms of per-watt performance.
I love the idea of a truly "new" CPU line entering the arena, but this smells an awfully lot like more of Intel playing catch-up, and in a way they won't win.
Unless the Pentium-M line has, for whatever reason, reached a hard wall for performance, Intel would have done better to expand it to multi core - Perhaps jump right to 4 cores just to bypass the whole "catch up with dual" criticism - And dropped the price to undercut AMD (at least per-core). But this? Well, it has potential, but unless Intel has decided to seriously under hype a major announcement, I won't lose any sleep worrying that I just upgraded three machines to readiness for AMD's X2 line (can't afford the damn things yet, so currently just running Winchester 3000s, but all just a chip-swap away from going to X2).
Umm, thats double the gate density every 18 months, not performance.
In my opinion, Intel and the rest of the big processor vendors are running out of ideas. They can only come up with so many incremental improvements before they bore the market to death. So what comes next?
I suggest that they start working on the biggest problem facing the computer industry today: unreliable software. It's costing us billions of dollars and even human lives. Consider that the basic architecture of the processor has not change in more than 150 years, ever since a guy named Babbage and his girlfriend Ada built their mechanical computer around the "table of instructions". All processor architectures have benn based on and optimized for the algorithm ever since.
A truly innovative architecture would abandon the algorithm and embrace a non-algorithmic, signal-based synchronous software model. It would not only revolutionize the computer industry, it would solve its nastiest problem: software unreliability.
But can we really expect the big guys (Intel, AMD, IBM, etc...) to be truly innovative at this stage of the game? Their approach is evolutionary, not revolutionary and they are doing just fine as it is. They have no great incentive to change. Hopefully, a bright upstart will get the message and make a killing while the behemoths are busy fighting each other for market share. They won't know what hit them until it's too late. The message is simple: There is a solution to the software reliability crisis. The disadvantage is that it will require a radical change in both processor architecture and software construction methodology. The advantage is too good to ignore: 100% software reliability! Guaranteed!
This is the stuff that revolutions and great companies are made of. After a century and a half, I think it's time for a change. He who has an ear (and the venture capital) let him hear!
Careful! That's what will precipitate Skynet and all those nasty T-101 guys!!! ...hey guess what I re-watched over the weekend?
Maybe I'm missing something, but I don't understand how performance per watt is useful as *the* statistic for comparing processors. Granted, clockspeeds aren't the law of the land, but at least they gave you some idea of how processors stack up against each other. The lines have become fuzzier recently, but I can know with a resonable amount of certaintly that a 3ghz P4 will kick the living daylight out of a 1mhz CPU.
Performance per watt tells a different story. While performance return per unit power consumed may tell how efficient a processor is, it doesn't tell me how good a processor is at doing what I want it to -- crunch numbers, really fast.
Performance per watt is a ratio, so the rating can increase when performance increases or power consumption decreases. Therefore, a solar calculator with a 5mhz processor and (I'm making this up) 0.1 watt power consumption would have a 50 mhz/watt rating, and a 3ghz CPU with a 100 watt consumption would have a rating of 30 mhz/watt. So, now Intel sells both these processors and advertises their performance/watt ratings. When someone goes to buy a new computer, they're surprised to find that the 50 mhz/watt computer is actually slower/worse/crappier than the 30 mhz/watt one.
A rock has infinite performance per power usage. It performs one instruction using no power.
~The log of the limit is equal to the limit of the log.
Silly me... when I read new architecture I said to myself: "Finally! We move on from x86. We have advanced beyond 20 year old technology."
Sadly, I was mistaken.
-illumina+us "I put on my robe and wizard hat..."
Unless the Pentium-M line has, for whatever reason, reached a hard wall for performance, Intel would have done better to expand it to multi core
I suspect that is exactly what they are doing, with a new label slapped on to suggest something really new and exciting.
Considering the per-watt performance of the current Pentium M versus the AMD64 (both at 90nm), the Pentium M seems slightly superior. So Intel may actually take the lead there.
In absolute performance, however, the AMDs are currently superior. Unless this changes, AMD CPUs will remain the choice for maximum performance, while a "sensible" office desktop may be best equipped with the new Intels.
C - the footgun of programming languages
Intel's process size continues to reduce (down to 45nm now), regardless of what they're choosing to do with those transistors or how fast to clock them).
Moore's not done yet.
You forgot to mention:
Anyone who says they will be modded as a Troll will be modded +5
Most laptops only use ~30W of power, hopefully less as time goes on... This makes portable solar cells an option.
I'm not really sure about wind power... but an interesting idea would be to make a "3-in-one" alternative laptop powerer.
You could have a 30W solar pack, and two small windmill things (maybe with detachable fins for easy carrying). The fans could double as hydro generators if you stick them in a river.
You know... for all those times you're next to a river with your laptop (and there is no wind).
I suppose another idea might be to incorporate solar cells into the case of laptop.
Alternative energy is no solution to the battery problem, but I still think it's a cool idea. With even just solar cells you could easily work outside all day without needing to change batteries.
I don't know how useful this would be indoors, but I could see even indoor lighting generating some power (hey it works for calculators)...
I'd definitely carry around a solar pack even if it only increased my run time by 2 hours, any less and I don't think it'd be worh it. But I'd be pretty stoked about it if I could sit outside (think BEACH) all day with a laptop. How sweet would that be?
Laptop users, as well as people running server farms. If they told some enterprise that they could save a few million bucks on power (which is getting more expensive all the time and wil l never stop), they'd net themselves a big fat sale.
For home users, it's more of a reliability/creature comfort thing. More power means more heat, and 1) nobody likes loud computer fans, or wants to buy a liquid cooling system and 2) heat makes chips fry.
For everyone who keeps restating the mistake that Moore's law deals with PERFORMANCE, please educate yourselves:
"Moore's law is the empirical observation that at our rate of technological development, the complexity of an integrated circuit, with respect to minimum component cost will double in about 18 months."
http://en.wikipedia.org/wiki/Moore%27s_Law
How bout that, NOTHING about performance.
https://www.accountkiller.com/removal-requested
Yeah! Go AMD! Surely the, as a member of the Trusted Computing Platform Alliance (TCPA) won't implement hardware DRM. It's just Intel who, as a member of the Trusted Computing Platform Alliance implemented the TCPA specification. And Apple clearly moved to Intel just to get access to this, because we know that IBM, as a member of the Trusted Computing Platform Alliance, would never have implemented it in their chips.
I am TheRaven on Soylent News
Given finite R&D resources, improving performance of the power consumer (rather than the power producer) seems to be a more direct way of paving the way for longer-lasting portables. That nips the problem in the bud. It's like the three R's: reduce, reuse, recycle. Before trying to increase (power) supply, one should try to reduce (power) demand.
Intel's original idea was to find a way to more aggressively pipeline their CPU design, allowing for higher clock rates. Increasing the number of pipeline stages allows you to reduce the number of transistors between stages, reducing propagation delay and increasing maximum clock rate.
In a vaccuum, this makes sense. If the instruction reorderer and/or compiler are smart enough, you can keep that pipeline full and take advantage of that higher clock rate. Indeed, there have been examples of carefully-crafted code that ran very well on this architecture.
Unfortunately, real software is quite different from the ideal sort of thing that runs well on the P4. Too many hazzards (branches and instruction dependencies) limited how full you could keep the pipeline. The CPU would execute instructions out of order, but there's only so smart you can make it. And not all branch hazzards can be fixed by a branch predictor.
Intel's hyperpipelined design was a relative failure. Sure, they could clock it 50% faster than an AMD, but that's what it took to make up for the increased pipeline stalls. Performance-wise, it was a wash. In other respects, it was a loss, because the processors required more power, more expensive cooling, and more expensive fabrication.
After a while, Intel came up with a way to make use of that wasted bandwidth. Why not fill those pipeline bubbles with another, independent execution stream? HyperThreading was born. Not altogether a bad idea. In many cases, it allowed up to 30% better over-all performance for multi-threaded apps, and giving you another CPU core (virtual or not) is always a good way to reduce latency.
In a last-ditch attempt to try to break the MHz barrier, Intel came out with the Northwood core. They lengthened the pipeline from an excessive 20 stages to an absurd 31 stages (not including the x86-to-RISC translator before the trace cache). To make up for the additional hazzards, Intel had to develop even more aggressive branch prediction and use larger reorder buffers. Unfortunately, this too turned out to be a performance wash, with an associated increase in power requirements.
At the same time, notebook computers started to overtake desktops in popularity. Low-power became MUCH more important than high-performance. The P4 really could not compete in this space, so Intel hired an Israeli team to develop a whole new architecture. To make a long story short, they basically reverted back to the P3 architecture (a relatively short pipeline), but added on all of the P4's advancements in reordering an branch prediction.
Think about that. Intel had made some mistakes, but they were GOOD mistakes. In order to work around the deficiencies in their P4 design, they had to develop some very impressive and advanced ways of keeping that pipeline full. Of course, any pipeline is going to have hazzards, so imagine applying that technology to a much shorter pipeline. The result was impressive. While the slower clock speed of Banias/Centrino was noticable under SOME circumstances (as it is with AMD processors), the majority of the time, the performance was excellent, even at a lower clock rate and lower power requirement.
The development of the P4 was a technical failure, but it was also a valuable phase in Intel's life. These lessons learned are going to be the basis for Intel's future success in efficient CPUs. Finally, I think Intel will be able to compete with AMD, even WITHOUT dubious deals with resellers designed to lock AMD out of the market.
I don't see the Pentium M's as hitting any performance wall at all. In fact, if anything, I see them hitting a Watt wall, and being told by the senior execs that they won't release a Pentium M chip that puts out more than 30 Watts, period. Something tells me this is even the reason we haven't seen them in desktops.
As for performance per watt, the Pentium M is more superior than you want to claim. 27 Watts is hard for anything in the desktop world to compare to; the AMD64's are all up in the 50W range (max-out though, average out might be comparable to the Pentium M's max out), Intel's Prescotts max output's over the hundreds.
AMD put a shot across the bow for a dual-core race, and Intel declined it. It'd be funny to see Intel shoot a clock/watt race across AMD's bow, and wait for their decline. We know who's best in what realm, now we're waiting for a head to head race, Pentium 3 verses Athlon style.
"Victory means exit strategy, and it's important for the President to explain to us what the exit strategy is." G.W.Bush
These new processors are the reason Apple is switching to x86. They're coming out in the 2nd half of 2006, just when Apple said its first x86 machines would be released and they offer improved "performance per watt", i.e. the exact same terms Jobs used when he announced the switch. My guess is that Apple will also be wanting the .5W handtop cpus for its Video iPod and that there will be some video enabled version of Airport Express to go along with it.
the APwC - accumulated performance-per-watt cost.
(performance/watt) / cost
I think that's more relevant.
The best processor would be one that offers the highest performance-per-watt at the lowest price. I have a feeling that the AMD-64s currently hold that crown.
Since dual cores are the quite common these days, we need a measure that can scale even based on the number of processors used to achieve the performance numbers.
So whether it takes 50 transmeta processors or 2 AMD 64s or x Intel processors, at the end of the day, what matters is how much was spent to achieve the same performance. Therefore, we need to take this into account as well.
Find a job you like and you will never work a day in your life.
For example it has been long known that you can have very long lasting nuclear batteries using betavoltaics (couple of a source of beta radiation and a p-n junction and you have your battery), but would you put it on your lap that is the question.
Considering that plutonium beta cell batteries were used in pacemakers, I wouldn't be too worried about that. I think the shielding could be lightweight enough.
But getting rid of used batteries could be a real problem.
The company has decided against assigning a codename to this new, common processor microarchitecture, curiously enough.
Wow, could it be that the engineers are back in charge at Intel? Palace coup? You know if the marketing people were still in charge, they'd have blue freaks miming the new codename all over the place. Dare I hope that it might become cool again for geeks to like Intel...
Flying is easy, just throw yourself at the ground and miss. -Douglas Adams
An FSB exists in all processors. On an AMD64, the FSB is the DDR memory bus directly, not an intermediate bus from processor to memory controller.
i ndex.x?pg=2
LOCK is an outdated instruction. It is used for indivisible memory accesses. This idea went out in 1990. Processors use MESI (or MERSI or MOESI) protocol now, because bus locking is not efficient (nor always even possible) in multi-processor systems.
See link:
http://techreport.com/reviews/2005q2/opteron-x75/
MERSI works by having the two processors watch each other's memory accesses so they can keep their caches coherent, instead of locking.
Also note that the only CPU dedicated memory (outside of the register file) in a multi-processor system is the caches for each processor. So each AMD processor does have a dedicated link to its own caches, the bandwidth to that cache is reserved for that processor. But caches are relatively small, and switching tasks on a single core will flush out the cache about as much as moving to the other core anyway.
So I said processors don't talk to each other. I did oversimplify, but here's the gist of my comments. What good is 20GB/sec between processors? You don't need it to send a MERSI flag to other processors for each 32 bytes line accessed. You would need it to copy vast amounts of data between the processors, if you did that. Like I said, there is no instruction to copy data between processors, you must use memory to get between them.
Intel's effeciency is lower when accessing some areas that are highly contested between processors. But most areas of memory are "Shared", not Modified or Reserved by one processor.
AMD's system is better, but it's really easy to overstate the value of it.
We'll see if Intel goes to a system that allows cache line state signalling faster than the FSB. I would imagine their new chips (which can even use the L1 and L2 caches for one processor when the other is shut down) do this, at least when on the same die.
Putting the GPU on the HT bus would be interesting. It would have the negative side effect of causing the GPU to go through the CPU when it needs to access memory. That is because the memory controller is in the CPU on AMD systems. But it would seem that when accessing VRAM, the HT bus speed could be useful.
http://lkml.org/lkml/2005/8/20/95