Breakthrough May Revolutionize Microchip Patterning

Stony Stevenson writes "US research engineers claim to have developed a low-cost technique that allows them to create ultra-small grooves on microchips as easily as 'making a sandwich'. The simple, low-cost technique results in the self-formation of periodic lines, or gratings, separated by as little as 60nm, or less than one ten-thousandth of a millimetre. From the article: 'The new 'fracture-induced structuring' process starts when a thin polymer film is painted onto a rigid plate, such as a silicon wafer. A second plate is then placed on top, creating a polymer 'sandwich' that is heated to ensure adhesion. Finally, the two plates are prised apart. As the film fractures, it automatically breaks into two complementary sets of nanoscale gratings, one on each plate. The distance between the lines, called the period, is four times the film thickness.'"

Comments

Well...

[Icarus1919]

Generally I throw my sandwiches away when they get a film on them.

Re:Well...

[FinchWorld]

Are you meant to do that? If so it might explain this horrendous stomach pains I've been having.

hmm

[Anonymous Coward]

Not really a breakthrough if intel is doing 45nm, either that or they knew about this already.

Re:hmm

[IWannaBeAnAC]

But you need to remember, the 45nm number comes from the marketing department.

Re:hmm

[cyfer2000]

The selling point of this "new" technology is "low cost". The lithography at sub 100nm is getting extreme pricey.

Re:hmm

[2.7182]

Additionally, there are so many announcements like this that you have to see it on the market to believe it.

Re:hmm

[MindKata]

I agree the cost is high (for the FABs) but more to the point, while this is an interesting new manufacturing method, its not likely to be such a big advance, (for the chip industry) as the title to this news implies. Also I think that around about 2011, they are talking about having production 32nm fabrication. So within about 4 years from now, 32nm is going to seem very small, compared with this relatively large 60nm groves in the chip.

Where this technology sounds potentially very useful, is in maybe applications like sensors. As its nano-scale patterns can be applied to large surface areas. That could potentially be very interesting.

Re:hmm

[KDR_11k]

I don't remember what the commonly used nm figure refers to (channel size?), could be that the 60nm lines here are for something else.

Re:hmm

[Nikker]

I don't think it is as important for FAB plants as much as it is bringing influence from the small consumer into hardware. If the cost comes down enough we can take old designs or open designs and actually be able to produce relatively small quantities of modified hardware for cheap.

This would go hand in hand with the concept of OSS cause as OSS enthusiast's are intrigued by this kind of thing products like that completely OSS graphics board which never really took off would be much more attainable. With an interface like PCI-Express if the community would be able to design an 'open-board' concept, with multiple open sockets on the board its self, you would be able use the daughter board as an OSS motherboard and control it by use of an open interface.

Picture a PCI-E board with one controller on board and a handful of open PGA sockets. A company or group develops a physics, encryption, sound, graphics, firewall chip that gets installed on the board and you could access each one for its resources via the PCI bus. Each chip would likely be more expensive then the closed proprietary brothers but the market is there. Lets say your business has a project that is naturally lopsided in terms of processing, you could fabricate a processor to even it out, or make a self sufficient board utilizing the PCI bridge for nothing more then access to memory and VCC.

This would really be an eye opener as OSS could effect more then just the software market but the hardware market as well. You could have a board with optical, RJ45, DVI, DVB-S2 all on the same board and each socket could potentially have access to each port directly or via on board controller (similar to a north bridge) condensing a sound controller or a network controllers logic onto a 60nm process would be night and day compared to what we have, this could potentially lead the way to the entire machine being designed using this "sandwich" process.

Personally I think development along the lines of the killerNic type of hardware would revolutionize computing. Imagine owning a machine with multiple optical outs that you could use for networking or to hookup to a TOS-link device, the card would have its own processor running customized microcode. Maybe as a temporary storage device similar to flash drives but internal running of a 16x slot would bring efficiency of any system up 100 fold. Eventually all these separate ideas would distill into an open command set that could be implemented into a CPU type of application. A CPU with instructions built-in from the best of encryption, graphics, sound, filtering hell even regex. We could even vote on which registers should be included in the final design.

So you know one person out here thinks this is cool, maybe more will come of this.

Re:hmm

[Fyzzler]

Everybody seems to be looking at this for electronic chip production. I don't see that being usable at all with this. This seems more geared to producing optical diffraction gratings, sensors or maybe even use in solar cells. I.E. Take a normal photovoltaic cell, then put a thin film on top and use this to create a tuned diffraction grating on the surface that improves the solar cell effeciency. Same for optical sensors. I could also see potential uses in biological sensors.

Re:hmm

[Aluvus]

No, it does not. Not at all. It comes from the litho engineers that chose 45 nm as the minimum feature size, a physical constant of the manufacturing process. And it was chosen because it is half of 90 nm. The marketing department would have literally nothing to do with such a selection.

Re:hmm

[fractoid]

You honestly believe that the marketing department didn't come down to the engineering department to suggest this figure?

"Lads, AMD is making 90nm chips right now, so they must be working on 45nm chips! If we can't compete we'll all be out of jobs. Now, can you make 45nm chips? Of course you can't! Will you be able to by the time we have to release them? Excellent!"
(Marketing manager writes down 'action point: leverage 45nm technologies for potential market capitalization'. In the background the lead engineer's head quietly explodes.)

Get Perpendicular

[LiquidCoooled]

If they got clever, they could make a conductive film and get tracks at one times the films thickness ;)
As it stands I will only be impressed if they get fractures down to at least 2 times thickness.

Nice.

[TechyImmigrant]

The chips are groovy. Very groovy.

Impressive...

[smallfries]

"It is like magic," said electrical engineer Stephen Chou, the Joseph C. Elgin Professor of Engineering at Princeton.

Must be a sufficiently advanced technology then...

Is this really useful for 'patterning microchips'?

[petaflop]

A low cost replacement for current lithographic techniques at 60nm could certainly have a market niche.

But from what I understand of the article, this technique only creates a pattern of parallel stripes, with the spacing controlled by the film thickness. Presumably the direction is cotrolled by which edge you pry apart from. I don't see how that is useful for layout out a chip though.

Silicon!

[the_kanzure]

Here's my notes on silicon semiconductor manufacturing, but this 'polymer sandwhich' method is entirely new to me. From what I can recall, manufacturing tactics usually include chemical etching with masks to make marks into the wafer or sometimes with specialized lasers. From the summary of the article, it looks like this latest process lets us do periodic lines via adding mechanical energy so that we fracture the plates. Ironic, since we usually try to avoid fracturing our wafers. ;)

Re:Silicon!

[bar-agent]

Ironic, since we usually try to avoid fracturing our wafers.

Is it just me, or does that sound kinda dirty?

God, I hope it's not just me...

Less than 1/10000th of a millimeter!

[DTemp]

I always love when summaries on /. have useless unit conversions to somehow make them more tangible.

I think people here can handle 60nm.

Re:Less than 1/10000th of a millimeter!

[Waffle Iron]

I always love when summaries on /. have useless unit conversions to somehow make them more tangible.

Indeed, everybody knows that the standard unit for small distances in science news reporting is (human hair width)^-1. Why they didn't use this standard unit escapes me.

Re:Less than 1/10000th of a millimeter!

[Hal-9001]

Indeed, everybody knows that the standard unit for small distances in science news reporting is (human hair width)^-1. Why they didn't use this standard unit escapes me.

Your standard unit of distance has units of inverse distance. You might want to fix that. :-p

Re:Less than 1/10000th of a millimeter!

[fractoid]

So that Slashdot regulars can appropriately visualise the distances involved: 60nm = 2.98258172 × 10-10 furlongs.

Re:Less than 1/10000th of a millimeter!

[Anonymous Coward]

Whups. Obviously that was 10^-10, pasting from HTML ftl.

60 nm features?

[chillax137]

So this method is interesting, but the resolution of these gratings is only 60nm. Other experimental groups have achieved a resolution as small as 30nm (http://willson.cm.utexas.edu/research/index.php). ..and Intel is already producing chips at 45 (http://hardware.slashdot.org/article.pl?sid=07/08 /20/1611202/)

Re:60 nm features?

[lionheart1327]

Actually, no.

Intel is producing chips at 45 microns.
That is 45,000nm.

So making lines at 60nm, is a BIG DEAL.

Re:60 nm features?

[ItsLenny]

Actually, no.

Intel is producing chips at 45 microns. That is 45,000nm.

So making lines at 60nm, is a BIG DEAL.

ACTUALLY no...

they are 45nm... research before u post...

on this site AND on their site

Re:60 nm features?

[mr_mischief]

Intel isn't doing it inexpensively. This is supposed to be a dirt-cheap way to get to 60nm.

How many chips are in your home? How many of them are general purpose CPUs? Your video card, unless it's really recent, is almost surely not down to 60nm. Your drive electronics, Ethernet controllers, PDA CPU, cable/DSL terminal, router, firewall, car, coffee pot, TV tuner, DVD player, digital camera (except maybe the image sensor), appliance timers, remote control, home theater receiver, and pocket calculator are not using Xeons.

If this could make 60nm even nearly as cheap as the 130nm lithography process, we'll have a huge jump in the amount of processing power on this planet. That's because lots of the stuff we use these days is still 180nm, 130nm, or 90nm.

So many people on /. seem to be the type to turn down a Corvette for free because it's not a Ferrari, Lamborghini, Porsche, Bugatti, or Koenigsegg. I can assure you that if someone offers me a Miata, Corvette, Z3, RX-8, C230, or Viper for the price of a Silverado pickup, I'm not going to bitch and moan that there are faster cars out there for $300,000 and up.

Ah, but...

[Anonymous Coward]

Can they sort tiny screws^W^W^Wmake tiny grooves... in space???

It will be low cost, until the patent is granted

[Anonymous Coward]

Great! low cost except for the gazillion percent patent license fee.
I think I'll wait out the 17 years until it expires thank you very much

(coincidence: my captcha is "yielding" ..eg: as in microchip "yield")

Re:It will be low cost, until the patent is grante

[heinousjay]

What are you going to wait out, exactly? Are you an executive at a chip-producing firm with the power to decide to use this?

Bio-manufacturing

[Anonymous Coward]

I have spoken to some biotech researches from MIT, and they are currently working on a way to induce viruses (using genetic information from oysters) to attack bacteria, which will in turn create nano-structures of the researchers' choosing. Well, that is what I think they were saying, with my fairly limited understanding in that field. Their current project involves manufacturing more efficient NiMH batteries using the aforementioned techniques, and results are encouraging. I wonder if this could be applied to processor manufacturing in the next 20 years?

Neat demonstration, but not chip tech.

[kebes]

The actual scientific paper can be found here (subscription required). This is a very neat idea, similar to buckling-induced experiments where similar nano-patterns can be produced quickly and easily in polymeric materials. The micrographs in the paper show remarkably clean and consistent structures, with well-defined periodicity and cross-section. From a scientific point alone, it's quite remarkable to see how one can harness a usually random process (fracture) to generate well-defined nanostructures.

That having been said, this technique suffers from a few limitations. Firstly, it will be difficult to scale this down to arbitrarily small features: polymer film stability becomes increasingly difficult as the film thickness is decreased, so this technique is unlikely to scale cleanly below the 60 nm they've already demonstrated. Also, this technique generates a large-area pattern, but it doesn't appear possible to control the registry of this pattern. So, this could perhaps be used as the first step in a mult-step chip patterning, but if you can't align subsequent patterns, it becomes useless for generating complex multi-layered structures for chips. (I can imagine ways to overcome this, but it wouldn't be easy.)

As such, I really don't think this is going to "revolutionize microchip patterning" as the headline implies. I don't think this will ever be used to generate smaller and smaller chips: the current challenges in the industry for next-generation processes are beyond what this technique can do. (Besides which, it doesn't integrate particularly well into the current photo-lithography infrastructures).

However, as a lower-cost alternative for fabricating nanostructures in the micron to 100 nm size regime, I could see this being useful. It's an easy way to create a large-area array of remarkably consistent patterns. It could be used to create optical gratings, or as a template for assembly of proteins (for diagnostics, etc.), or templates for magnetic domains (in hard-drives, etc.) and many other fields.

Re:Neat demonstration, but not chip tech.

[smallfries]

It's nice to read one of these rare insightful posts on slashdot. In fact I may close my browser before scrolling any further :)

I think you've hit the nail on the head that registry is the key problem. This reminded me of Rothemund's work although their pattern structures are slightly finer than the DNA scaffolding that he created.

If either technique paid off (ie to the extent that components could be attached to arbitrary points in the pattern) then it would revolutionise chip design. But, that is quite a big if. It should be interesting to see if this work pans out enough to come to market.

Re:Neat demonstration, but not chip tech.

[BronsCon]

It would seem to me that the registry and formation of the pattern would actually be greatly controllable. Per the summary (I'm not THAT new), "The distance between the lines, called the period, is four times the film thickness." To me, this indicates that, by using one smooth platter and one textured platter, one could, quickly and reporoduceably, control the registry of the lines on the smooth platter.

One would need only one "perfect" (master) platter to copy from, similar to pressing CDs. This master platter would be created by etching lines into it at a depth of 1/4 of the desired width of the line on the final product. When the process completes, a 1nm-deep line would create a 4nm-wide line, while a 10nm-deep line would create 1 40nm-wide line. The process, it would seem, would scale very well. Once a new platter has been pressed, the master platter would be washed and reused, almost exactly like pressing a CD, right down to the master rquiring several degrees more time and accuracy to create and being reusable almost indefinitely.

The design process would be vastly different from what it is today, but that may not be entirely a bad thing. Being able to stamp (lather), rinse, repeat, simply press a platter of mocrochips as if it were a CD could bring chip manufacture to independant producers, much like the same ability wich CDs did for independant record labels.

Of course, then we'll have the SPAA (Semiconductor Producer Association of America) suing people for reselling their CPUs on eBay, while indie shops try to break into the market. Freakin * * Associations of America.

(Informative? Maybe. Insightful? Possibly. Funny? To some. Overrated? Only if it's already +5.)

Re:Neat demonstration, but not chip tech.

[cyfer2000]

There are two problems here, how can you make a 1nm deep line? Secondly, the process really scale very well even the pitch is very close to the size (Rg, for some other people) of the polymer used?

Re:Neat demonstration, but not chip tech.

[BronsCon]

I was using small numbers for simplicity. Obviously, with current polymers, you wouldn't get a 4nm thick line anyway, so the 1nm deep line would be pointless right now. Perhaps by the time we develop polymers capable of forming such tiny structures, we'll be able to etch such shallow lines into the platters.

Practical applications? Time to market?

[Alwin Henseler]

The lithography at sub 100nm is getting extreme pricey.

Well 'pricey' is a relative term... if you're talking about the setup-cost for a factory that produces IC wafers, then yes you're talking enormous investments before the first wafers run of the production line with decent yields. But from an end-user point of view, you can buy a $50 CPU or memory module these days that may contain several hundred million transistors. Something equivalent being non-existent or 10 times more expensive a few years back...

I'm wondering more about practical applications, and how long they will take to hit the market. For regular structures, all sorts of semiconductor memory comes to mind. Cheap flash memory? Affordable solid state drives with capacities equal or bigger than magnetic disks? For such applications production errors may not matter much. If the process is cheap, add enough redundant memory cells, decent bad cell/sector management, and the end result could be very useful.

Anyway, looks very promising. We'll see what comes of it...

Re:Practical applications? Time to market?

[cyfer2000]

It was the mask and photoresist for sub-100nm process in mind at the time I was posting. I think this technology may have some potential application in making simple grid structure like NAND flash/sonos memory, PRAM, FeRAM, MRAM and etc. I don't think it could be used to make DRAM, where most effort is put to dig deep holes. And it will face strong compete from block copolymer based technology at smaller dimension like 30nm. However, the grid grown by this technology can be used as template of block copolymer. I think it's time for me to write a new proposal now. 8-)

But...

[Anonymous Coward]

what kind of sandwich?

Love the illustration...

[pla]

The linked article has a picture of a breadboard covered in neat rows of ancient DIP chips (probably ALUs or memory). Then talks about a cool new technique for getting a 60nm grid on next-gen CPUs.

Why do they bother wasting bandwidth with such a useless stock picture? "Well, this involves microchips... Those look like microchips, I guess, so let's stick it in the article".

Re:University hype makes me barf

[ItsLenny]

how is it a breakthrough you say...

Lets see...

They've come up with a similar (faster/cheaper) means of making something. The entire point of the article is that this new method is far easier and faster then old methods. Not to mention the fact alone that it's utilizing mechanical force to etch a chip which is unheard of... besides this could be very practical. Think about it, most companies don't need an overpriced chip with 45nm spaced etchings... but being able to buy many cheaper chips with a 60nm gap would be a great.

The moderator thinks you r informative

[cyfer2000]

But I think you are insightful. I am actually totally agree with you. But as the UV getting deeper and deeper, how far the photoresist based technology we can go? At 32nm or 25nm, how much roughness is tolerable? Can we expect such roughness from photo resist? I think there is going to be a change.

Re:The moderator thinks you r informative

[kebes]

Indeed. The line-edge-roughness is becoming a bigger and bigger issue as the lithography industry searches for what to use for next-generation patterning technology. Based on the talks I've been to (I do research in a related field), the large efforts that were put into developing "extreme-ultraviolet lithography" (EUV), which would use 13.5 nm illumination, are not working out. The technology is not ready (e.g. they still don't have a light-source operating at that wavelength that generates enough light...) and is very much more expensive than anything we're using today. Many in the research end are now thinking that we cannot depend upon EUV to fill the future roadmap nodes.

I agree that there are going to have to be some big changes. Some sort of disruptive technology is going to be needed. One promising area is the rather simple concept of "nanoimprint lithography": where instead of using light to shine through a mask and pattern a polymer resist (which is then used to etch patterns into the silicon), you physically press a single (reusable) high-fidelity (high-cost) mask into a polymer, at a temperature where the polymer is liquid-like. The patterned polymer resist can then be used to etch Silicon in the usual way.

This physical embossing has been shown to generate pattern fidelity way beyond what you would naively expect: sub 30-nm feature accuracy has been demonstrated. Nanoimprint is a comparatively simple and cheap methodology. When combined with the other recent advances in lithography infrastructure (like high-precision registry alignment systems), it seems quite plausible that nanoimprint will be able to deliver the features required for next-generation chips. Of course, many details need to be worked out, but it's a very promising, and rather disruptive, new technology (and has been added to the ITRS roadmap).

Re:The moderator thinks you r informative

[cyfer2000]

The light source problem maybe solved by microsource X-ray source or microsynchrotrons (not very possible) and non-flat multilayer (Gobel mirror) based optical system. Or we are going to construct fabs with synchrotron. Let's wait and see.

"As easily as making a sandwich"

[Pluvius]

I have no arms, you insensitive clod!

Rob

Re:Is this really useful for 'patterning microchip

[Anonymous Coward]

I could think of a couple of things. a CCD for cameras or a 'rail' area for moving data around. Also if you could get it going in different directions you could 'build' up different structures such as gates and sinks. You could also 'fill' in areas that are not useful or 'short' across other areas with another layer. Dont be like Kahn and think 2d be like Kirk think 3d...

More easy money for the Chinese

[Asterra]

The trouble with technological breakthroughs is that they mostly benefit countries which place zero emphasis on such development but 100% emphasis on the pirating and subsequent marketing of such technology.

Re:More easy money for the Chinese

[blahplusplus]

Piracy is a valid economic warfare tactic. Countries steal/spy/etc from one another for economic advantage and diplomatic leverage, should we be surprised? After all market capitalism emphasizes competition, no one said it had to be *fair*.

Re:More easy money for the Chinese

[Asterra]

So we're talking about defining the boundary between reprehensibility and hostility, then? Personally, I would hesitate to suggest that it is valid for any country to profit in a worldwide economy using technology they have acquired and utilized without permission. But perhaps you would be fine even with the recent revelations of Pentagon hacking. Perhaps that also is "valid". To others, it's an act of war. Ymmv.

Re:More easy money for the Chinese

[blahplusplus]

Capitalism is a form of social warfare, it's not always 'conscious' most of us simply absorb the behaviour and values of our time unknowingly contributing to overall bad things happening in the world. You also have people who have insane amounts of capital vs people who can't even afford to live in the same country. You have people commit suicide for economic related reasons (stress, etc), when there is more then enough money to go around in many instances. But access to that money is a matter of culture and values of the people of the time.

The issue is enough access to 'just enoough' money that the person(s) can relieve that stress. The truth is the world is not a fair place, did IRAQ 'deserve' to be invaded by the US? If you have the time, inclination or interest study ancient history and histor in general, no one is 'the good guy' really. It's all about power. There's a reason I respect americans despite their warlike nature: They understand that history is littered with good people who got killed because they let their defenses down and became too enrapt by 'peace', it's not peoples fault for wanting peace... the real problem is thus: With every generation of children we bring into this world we bring in new people who start from scratch all over again and have to learn the same stupid lessons again and again. We live in an unstable world mostly because we can never get a stable population of superior people in ability and values.

I'm reminded of quotes by General Patton, I can't remember in exact detail the one about him commenting about people talking about hiw "x war was going to be the "the last" war", but basically his thought was this: "Will they ever learn?" Implying that mankind is too immature to do away with competitiveness and the true full competition -- no holds bar, no rules, or simply warfare, economic, diplomatic, physical, psychological, etc.

Americans play to win at all times. I wouldn't give a hoot and hell for a man who lost and laughed. That's why Americans have never lost nor ever lose a war. --George S. Patton

ROM

[DumbSwede]

I doubt CPUs will have much competition from this technology, but how about memory based on some kind of crossbar design? Make one sheet vertical one sheet horizontal bond together with some exotic ingredient and voilà -- a high density ROM material. HD movies on a postage stamp.

It's the money...

[argent]

I suspect that it would cost a bit more for Intel to produce 60nm gratings using their 45nm process than using this "low tech" approach.

thesubject

[hl2.exe]

thats good but what does it allow/do?

Re:University hype makes me barf

[MassiveForces]

It's not a break-through it's a break-apart, duh

fresnel terahertz arrays

[mattr]

I wonder if you pulled a disc-shaped sandwich apart from the center real fast would you get concentric circles like a fresnel lens.. if so then by varying the film thikness you could vary the wavelength of focused energy?

60nm on the cheap is still useful

[mr_mischief]

Surely your toaster and coffee maker don't need 32nm? Wouldn't it be great to have all the parts that aren't CPUs down to 60nm without the costs associated with 60nm lithography?

Let's see, drive electronics, sound processors, Ethernet controllers (the ones that aren't on your southbridge), microcontrollers, any kind of embedded chip... There are lots of things that aren't 65 nm yet, or even at 90nm, and some chips aren't 130nm for that matter. Wouldn't it be great to get things that are currently larger down to CPU-ish feature sizes?

Hell, Intel's 82598 dual-port 10 gigabit Ethernet controller is 90nm. If they could make it 60nm on the cheap, that'd be great.

Just think of all the things these specialty chip designers (the ones with SSL accelerators, AES on-chip, vector processors, Forth chips, Java chips, etc) could do if they could get down to 60nm at or near FPGA prototyping prices. Hell, the Via C7 getting down from 90nm to 60nm would be great. Companies like Transmeta might bounce back into chip production. ARM9 is currently at 130 and XScale is 180. Getting those down to sizes that match Intel and AMD's current or even last-gen products at far less cost could give us really powerful handhelds.

Breakthrough May Revolutionize Microchip Patternin

[objekt]

Then again, it may not!

One more application

[cyfer2000]

Scaffold to grow tissue?