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Intel-Micron Joint Venture Develops 25nm NAND
Ninjakicks writes "IM Flash Technologies is a joint venture between Intel and Micron that is targeted for producing NAND flash memory. With a focus on R&D, IMFT has doubled NAND density approximately every 18 months. Tomorrow IMFT will announce the launch of their 25 nanometer NAND technology — a major advancement in the semiconductor industry. Intel and Micron can now lay claim to the smallest production ready-semiconductor process technology in the world. IMFT took members of the press on a tour of the new 25nm fab and it's an interesting view into this bleeding-edge manufacturing process."
The dielectric properties of Gallium could make these new fabs casualties of Rall's law: that the semi-current entropy increases inversely proportional to n*log(n) of the gate width. Einstein was right after all.
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This is sorely needed to bring down costs for SSD's. The price and capacities available are coming down at a disappointingly slow pace.
If it's only 25nm, how do you use your hand?
Oh! NAND. Gotcha.
APK quotes people (including myself) without context and should not be trusted. Just thought you should know.
I want a cool, quiet 300G for 200 dollars. Imagine....a computer needing to cool only the CPU/Chipset.......I can only dream.
While this may have impressive consequences for the NAND market and for end-user storage solutions, there is a much larger problem which everyone is skirting around. It isn't about how NAND can only be used for storage and not for executable ROM like NOR Flash. It isn't about how stuffing more memory into a smaller space will allow for insanely huge SSD drives in devices ranging from cellphones to television sets.
It's about how Intel is going to leverage their CPU monopoly to take over the Flash memory market. They have not been able to make any headway with their StrataFlash due to their lukewarm support and eventual divestiture of the StrongARM CPU series. So by building this new super-efficient NAND solution, they are positioning their Atom CPU as *the* architecture for embedded systems.
If I were ARM and ARM CPU vendors, I'd be very wary and worried.
Could this process be used to build, say, CPUs?
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Does this mean we'll finally get 32 gigabyte MicroSDHC cards?
What if this signature were clever?
Allow me to be the first to give them a NAND-ing ovation.
"A government is a body of people usually -- notably -- ungoverned." -Shepherd Book
in the olden days, xx nm really meant feature size. With Intel and other fabs pressing mfg to half the size every 2 years, it seems mfg has gotten quite creative in their definition of feature size. Latest feature size is a fraction of the wavelength of the light used for patterning, and to achieve it, double and sometimes triple patterning is used. That is basically multiple exposures with slight offsets. The result migh be called 25nm but might really be 50nm, and edge sharpness when you are at 1/4lambda is so suspect that you really have to add some margins here and there, and some features dont really lend themselves to double and triple patterning, so you really have a mix including 50nm process for these.
Kind of like a marketing gimmic, just here it is engineering selling it as 25nm to their own marketing departmens.
don't cut it off www.mgmbill.org
I hadn't heard anything about them in perhaps a decade. I can't believe they're still around! Didn't they used to have a desktop line too? Or am I thinking of someone else altogether?
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I really would like a 1TB USB flash drive so i can carry around my pr0n collection everywhere and use my new iPad to view it all when I am on vacation!
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Bah, I'll be much more impressed when we see an Intel-Voltron joint venture.
... and then they built the supercollider.
lo\st its earlier Of the founders of tossers, went out
I use a hammer for that.
The Hammer is my Penis.
Oh, btw - the cache has to be SRAM so that if the power goes out, it can write the files when it comes back on.
That requires a battery or supercapacitor on the drive itself, and while some (expensive) SSDs have the latter, the feature is still relatively rare.
Of course any serious ("enterprise") application should have a UPS, but uninterruptible power supplies (or the power distribution networks) can and do fail from time to time, for a variety of reasons, so adding a supercapacitor to protect the (block level) integrity of writes that are in progress is an excellent idea.
Even better, persistent caches allow a storage device to confirm synchronous writes much faster than otherwise, which is a big deal in certain applications, notably databases and email servers. Of course if you are so unfortunate as to be using RAID 5 with these devices, you will need a battery backed RAID controller anyway, in order to close the infamous RAID 5 "write hole".
Lastly, unless you are using a transactional filesystem, battery backed storage caches will not prevent partially written files from being corrupted if the system loses power, because they are block oriented, not file oriented devices, and are much too small to hold new copies of non-trivial files in any case. A well designed program can work around that limitation though (e.g. write temporary file, fsync, rename) as long as the filesystem itself is journalled.