Slashdot Mirror
Intel-Micron Joint Venture Develops 25nm NAND
Ninjakicks writes "IM Flash Technologies is a joint venture between Intel and Micron that is targeted for producing NAND flash memory. With a focus on R&D, IMFT has doubled NAND density approximately every 18 months. Tomorrow IMFT will announce the launch of their 25 nanometer NAND technology — a major advancement in the semiconductor industry. Intel and Micron can now lay claim to the smallest production ready-semiconductor process technology in the world. IMFT took members of the press on a tour of the new 25nm fab and it's an interesting view into this bleeding-edge manufacturing process."
This is sorely needed to bring down costs for SSD's. The price and capacities available are coming down at a disappointingly slow pace.
If it's only 25nm, how do you use your hand?
Oh! NAND. Gotcha.
APK quotes people (including myself) without context and should not be trusted. Just thought you should know.
I want a cool, quiet 300G for 200 dollars. Imagine....a computer needing to cool only the CPU/Chipset.......I can only dream.
Thats not the case if you use a high-fraternity flux capacitor. I've heard the prazatonic implementation of intergalactical space bizanium will allow you to propate the quadraceptic meld process down to 0.2nm.
Don't worry, as we speak Rambus is quietly patenting the shit out of everything in this space. A few years from now their patents will pop-up and bring Intel to its knees.
Actually, it is the case. You just have to reverse the polarity of the neutron flow.
This is why other companies need to get on this faster. Isn't that the whole purpose of markets, business and competition--to make something better than competitors first? If the ARM manufacturers don't like it, then get up and make something better! Stop bitching about Intel's monopoly and give me another option.
Could this process be used to build, say, CPUs?
http://michaelsmith.id.au
I strongly doubt that... x86 has so much cruft associated with it, it will never be able to hedge ARM out of the market, esp since the later is so entrenched at this point. Do you think cell phone designers want to work with the PCI bus? Chipsets? And what software is available for a non PC-compatible x86 setup?
Anyways, this is all moot anyway: the demand for high density flash is almost entirely in the memory card market. No embedded system realistically needs more than 1GB internal memory (and generally 256M is plenty). For bulk storage, an SD card is not just a good idea, but actually desirable for consumers. There's just no market for some huge flash somehow tightly coupled to a CPU.
It occurred to me just after posting that there would be a decent sized chunk of market in DRMed devices that couldn't allow the use of memory cards, e.g. the iPods. However, there devices are far from being the entirety of the ARM based mobile computers and their switching wouldn't mean anything significant for the market.
This has nothing to do with Intel's CPU monopoly (which is only really a monopoly in a fairly narrow segment of the CPU market), it has to do with Intel putting a lot of money into process technology. Even when their designs were inferior to AMD's, they remained competitive because they could fab them on a better process and so get higher yields, higher clocks, and lower power consumption for the same chip than AMD.
Intel's SSD products work with anything with a SATA controller, be it ARM, x86, PowerPC, SPARC, or some custom architecture you just wrote to an FPGA. They are not tied to CPUs in any way. NOR flash often is. You quite often get some NOR flash attached to ARM chips for execute-in-place programs, such as the Symbian kernel and apps, freeing up some of main memory.
NAND flash can only be accessed as a block device, so you can't tie it to a CPU at all easily; it has to go through some kind of controller so the OS can pretend that it's a disk. I suppose you could slap a load of DRAM and a separate MMU and DMA controller on it and have something that would look like a big blob of RAM, but the performance characteristics would be horrible to work with.
I am TheRaven on Soylent News
There, fixed that for ya.
Does this mean we'll finally get 32 gigabyte MicroSDHC cards?
What if this signature were clever?
Even when their designs were inferior to AMD's, they remained competitive because they could afford to paid off dell, HP, et al.
Fixed.
Sent from my PDP-11
The trouble is you have to keep the computer travelling at faster than 88 miles per hour.
Science advances one funeral at a time- Max Planck
Generating polarized neutron beams in a standard hard disk form factor is probably not practical.
Allow me to be the first to give them a NAND-ing ovation.
"A government is a body of people usually -- notably -- ungoverned." -Shepherd Book
in the olden days, xx nm really meant feature size. With Intel and other fabs pressing mfg to half the size every 2 years, it seems mfg has gotten quite creative in their definition of feature size. Latest feature size is a fraction of the wavelength of the light used for patterning, and to achieve it, double and sometimes triple patterning is used. That is basically multiple exposures with slight offsets. The result migh be called 25nm but might really be 50nm, and edge sharpness when you are at 1/4lambda is so suspect that you really have to add some margins here and there, and some features dont really lend themselves to double and triple patterning, so you really have a mix including 50nm process for these.
Kind of like a marketing gimmic, just here it is engineering selling it as 25nm to their own marketing departmens.
don't cut it off www.mgmbill.org
Duh... shrink ray!
I hadn't heard anything about them in perhaps a decade. I can't believe they're still around! Didn't they used to have a desktop line too? Or am I thinking of someone else altogether?
No sig for you. YOU GET NO SIG!
The only time Intel has had an inferior CPU design was the P4 era. And the P4 had _high_ power consumption, in part because the new 90nm process had high leakage currents. They got themselves around that problem by making bigger heatsinks.
Yes, but you have to be careful and *not* cross the streams.
Mod me down, my New Earth Global Warmingist friends!
I hate to correct you here, but equilibrium is dependent upon factors of e, therefore the propation must be the 4th Fibonacci value derivation of the meld process.
You're joking, right? I thought everybody knew that Fibonacci values were bilaterally stochiocentric and corrupted the Van der Waals stress index at the third integral. How are you going to poststratify the gnomon clatch that way? Gods you're such a n00b.
Do not mock my vision of impractical footwear
---
Storage Feed @ Feed Distiller
How are you going to poststratify the gnomon clatch that way?
I use a hammer for that.
Thats not the case if you use a high-fraternity flux capacitor. I've heard the prazatonic implementation of intergalactical space bizanium will allow you to propate the quadraceptic meld process down to 0.2nm.
Just like over-inflating a balloon....
"I like to lick butts!" by MobileTatsu-NJG (#32700246) (Score:5, Informative)
Was NetBurst P4? Anyway, whether or not it was or wasn't, NetBurst was inferior. If Core hadn't come out of the Israeli lab, Intel was within 18 months of wholesale defection of HP, Dell, and IBM to AMD. Would have happened sooner if AMD had trustable manufacturing capacity.
C//
s/paid/pay/
Sent from my PDP-11
Especially Realplayer streams.
42.
Wintel duopoly mean anything to you?
Inte£ was an abusive monopolist long before most people think. Starting back in the late 80's.
They are always treated with kid gloves but M$oft gets no quarter....
It always makes me chuckle when some Linux noob quotes "M$" but running on an Inte£ cpu/video.
Science : Proprietary , Knowledge : Open Source
Bah, I'll be much more impressed when we see an Intel-Voltron joint venture.
... and then they built the supercollider.
No good, if you shrink the neutrons they turn into neutrinos and leak out all over the place.
No embedded system realistically needs more than 1GB internal memory (and generally 256M is plenty). ... There's just no market for some huge flash somehow tightly coupled to a CPU.
Don't you think that 640K should be enough for anyone?
Whitworth Hammer?
I drank what? -- Socrates
I use a hammer for that.
The Hammer is my Penis.
Oh, btw - the cache has to be SRAM so that if the power goes out, it can write the files when it comes back on.
That requires a battery or supercapacitor on the drive itself, and while some (expensive) SSDs have the latter, the feature is still relatively rare.
Of course any serious ("enterprise") application should have a UPS, but uninterruptible power supplies (or the power distribution networks) can and do fail from time to time, for a variety of reasons, so adding a supercapacitor to protect the (block level) integrity of writes that are in progress is an excellent idea.
Even better, persistent caches allow a storage device to confirm synchronous writes much faster than otherwise, which is a big deal in certain applications, notably databases and email servers. Of course if you are so unfortunate as to be using RAID 5 with these devices, you will need a battery backed RAID controller anyway, in order to close the infamous RAID 5 "write hole".
Lastly, unless you are using a transactional filesystem, battery backed storage caches will not prevent partially written files from being corrupted if the system loses power, because they are block oriented, not file oriented devices, and are much too small to hold new copies of non-trivial files in any case. A well designed program can work around that limitation though (e.g. write temporary file, fsync, rename) as long as the filesystem itself is journalled.
http://www.youtube.com/watch?v=y2v6rXs5J9M
Bounce a graviton particle beam
off the main deflector dish
that's the way we do things lad
we're making shit up as we wish.
The Klingons and the Romulans
pose no threat to us
'cause if we find we're in bind
we just make some shit up.
There are a couple of execute in place NAND memories available now from Samsung and at least one other company that escapes me. The do about what you describe internally by caching the Flash pages in SRAM for random access through a NOR type interface. They are good for saving space in compact designs.