Samsung Develops Power-Sipping DDR4 Memory

Alex writes with this excerpt from TechSpot: "Samsung Electronics has announced that it completed development of the industry's first DDR4 DRAM module last month, using 30nm class process technology, and provided 1.2V 2GB DDR4 unbuffered dual in-line memory modules (UDIMM) to a controller maker for testing. The new DDR4 DRAM module can achieve data transfer rates of 2.133Gbps at 1.2V, compared to 1.35V and 1.5V DDR3 DRAM at an equivalent 30nm-class process technology, with speeds of up to 1.6Gbps. In a notebook, the DDR4 module reduces power consumption by 40 percent compared to a 1.5V DDR3 module. The module makes use of Pseudo Open Drain (POD) technology, which allows DDR4 DRAM to consume just half the electric current of DDR3 when reading and writing data."

Comments

Good news

[del_diablo]

Now, lets pair this with a ARM core and hope we get a reasonable hack that allows a wireless that does not eat power like the current ones.....
Then lets enjoy our ARM-puter: Portable, powerful, and battery for more than a day of use.

"Power Sipping"

[Aboroth]

Does anyone else besides me hate that term?

Pseudo Open Drain (POD) technology

[PatPending]

PatPending (talking to friend on phone during a bash help session): It's called Pseudo Open Drain (POD) technology
Friend: Okay, I'll try that...
Friend(typing): sudo open drain
Friend: Argh! I hate this command line bullshit!

Re:How much power comparatively?

[NoSig]

Sleep mode leaves the ram powered but powers down most other things, is what I think he is saying. So ram may be the most significant power consumer for sleep mode.

Re:How much power comparatively?

[PatPending]

Didn't you read the title of the summary? It doesn't "chew," it "sips."

Re:How much power comparatively?

[galvanash]

Hardly any. I remember skimming through a study of component power consumption and IIRC memory topped out at something like 5% total draw. So memory with half the power draw will buy you about 10 minutes. Whoopdeefuckingdoo.

That is with the display turned on... Most portable devices spend a considerable amount of time with the display turned off to conserve power. To put this into perspective, on an HTC Desire android device with an AMOLED display the screen uses about 50%-60% of total power, memory is probably like you said around 5% (I have never seen hard numbers for the power draw only for memory, but 5% is probably close). If it is 5% with the display on, it would be around 15% or so when it is off, which is quite a bit more significant. Also, memory always uses power - even when it is not storing anything useful... Hence the more memory the device has the more power the RAM draws. Just saying, cutting RAM power use in half can be quite significant. It might be 10 minutes if you are using the device constantly, but it could well be an hour or more of extra standby time depending on how heavily you use the device.

Meh

[lennier1]

I'd rather have them finally mass-produce 8 and 16 GB modules for the desktop market.

Re:Meh

[Kjella]

what "Desktop" user needs that much, or even runs an operating system that can address it?

Need we can discuss, but the price difference between Win7 32 and 64 bit versions is ~0 and I've not heard anyone complain about 64 bit drivers anymore. Mac I think is the same and Linux has of course supported 64 bit forever. Unless you're talking about an Atom that's not 64 bit capable, there's no particular reason not to get an OS capable. That is unless you still want to wipe a new box and install XP...

POD explained

[overshoot]

In a classical open-drain connection, the active device pulls down and the bus termination pulls up. For a pure transmission line, this works just fine -- the current wave from the turn-off of the driver is effectively identical to the current wave from the turn on. In practice, open-drain uses more static current than a push-pull driver against a center termination and since the line isn't a pure transmission line (lumped capacitances, stubs) the rising edge is slower than the falling edge.

POD addresses this by actively pulling up at the beginning of a rising edge, then releasing the pullup to avoid a bus contention later. This reduces the termination current (at some cost in impedance mismatch, but it's already a sloppy line) and improved switching symmetry.

Nope

[overshoot]

One thing not mentioned in the article or summary is whether or not this technology reduces standby power consumption in DRAM.

POD by itself doesn't reduce power consumption in standby, since both POD and SSTL turn off the bus drivers then. The older POD technologies from the GDDR families use Thevenin termination, though, so the terminators draw a lot of unnecessary current when they're enabled (as distinct from the result with a dedicated termination supply.)

If you really want to know how this all works, JEDEC has the DDR4 standard available for free download. Follow the "free standards" link.