Samsung Develops Power-Sipping DDR4 Memory
Alex writes with this excerpt from TechSpot: "Samsung Electronics has announced that it completed development of the industry's first DDR4 DRAM module last month, using 30nm class process technology, and provided 1.2V 2GB DDR4 unbuffered dual in-line memory modules (UDIMM) to a controller maker for testing. The new DDR4 DRAM module can achieve data transfer rates of 2.133Gbps at 1.2V, compared to 1.35V and 1.5V DDR3 DRAM at an equivalent 30nm-class process technology, with speeds of up to 1.6Gbps. In a notebook, the DDR4 module reduces power consumption by 40 percent compared to a 1.5V DDR3 module. The module makes use of Pseudo Open Drain (POD) technology, which allows DDR4 DRAM to consume just half the electric current of DDR3 when reading and writing data."
In a typical notebook, how much power does memory actually consume compared to other components (CPU, HD, screen, wireless transmitter etc..)?
Now, lets pair this with a ARM core and hope we get a reasonable hack that allows a wireless that does not eat power like the current ones.....
Then lets enjoy our ARM-puter: Portable, powerful, and battery for more than a day of use.
Does anyone else besides me hate that term?
PatPending (talking to friend on phone during a bash help session): It's called Pseudo Open Drain (POD) technology
Friend: Okay, I'll try that...
Friend(typing): sudo open drain
Friend: Argh! I hate this command line bullshit!
What one fool can do, another can. (Ancient Simian Proverb)
I'd rather have them finally mass-produce 8 and 16 GB modules for the desktop market.
What about latency?
POD addresses this by actively pulling up at the beginning of a rising edge, then releasing the pullup to avoid a bus contention later. This reduces the termination current (at some cost in impedance mismatch, but it's already a sloppy line) and improved switching symmetry.
Lacking <sarcasm> tags,
POD by itself doesn't reduce power consumption in standby, since both POD and SSTL turn off the bus drivers then. The older POD technologies from the GDDR families use Thevenin termination, though, so the terminators draw a lot of unnecessary current when they're enabled (as distinct from the result with a dedicated termination supply.)
If you really want to know how this all works, JEDEC has the DDR4 standard available for free download. Follow the "free standards" link.
Lacking <sarcasm> tags,