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Will 7nm and 5nm CPU Process Tech Really Happen?
An anonymous reader writes "This article provides a technical look at the challenges in scaling chip production ever downward in the semiconductor industry. Chips based on a 22nm process are running in consumer devices around the world, and 14nm development is well underway. But as we approach 10nm, 7nm, and 5nm, the low-hanging fruit disappears, and several fundamental components need huge technological advancement to be built. Quoting: "In the near term, the leading-edge chip roadmap looks clear. Chips based on today's finFETs and planar FDSOI technologies will scale to 10nm. Then, the gate starts losing control over the channel at 7nm, prompting the need for a new transistor architecture. ... The industry faces some manufacturing challenges beyond 10nm. The biggest hurdle is lithography. To reduce patterning costs, Imec's CMOS partners hope to insert extreme ultraviolet (EUV) lithography by 7nm. But EUV has missed several market windows and remains delayed, due to issues with the power source. ... By 7nm, the industry may require both EUV and multiple patterning. 'At 7nm, we need layers down to a pitch of about 21nm,' said Adam Brand, senior director of the Transistor Technology Group at Applied Materials. 'That's already below the pitch of EUV by itself. To do a layer like the fin at 21nm, it's going to take EUV plus double patterning to round out of the gate. So clearly, the future of the industry is a combination of these technologies.'"
Could someone explain to me why further refinement of fabrication process is the only way to progress? With a car analogy?
Clearly e-beam has some serious issues (throughput, to name one...), but progress is being made on that front. For instance, http://www.mapperlithography.c... ( http://nl.wikipedia.org/wiki/M... -- though it appears there's only a Dutch entry...).
IBM could build a chip that way if they wanted to. It just wouldn't be cost-effective - would it take decades of very delicate work to make a single processor that way.
This seems highly technical which is great. I would say at best these issues are 5 years out. Plus, stacking processors + making them larger is always an option. The margins on processors can be slim at the low end, to many fold at the top. The manufacturers will have to learn to live on leaner margins all round.
Last time it was leakage would prevent us from breaking 65nm. Before that it was lithography wouldn't get us below 120nm. Something will happen like it always does.
We're already at the point where 22nm components are more expensive per transistor than those at 28nm.
Previous shrinks lowered the cost of each transistor. It doesn't look like it's going to happen after 28nm.
i remember in the 90's everyone swore it was impossible to go under 90nm how 1GHz was the maximum speed you could get
Then IBM would saddle it with some really complex, bloated, crappy middleware called "WebSphere Atomic Appliance for Business". It would be more expensive and run slower than a no-name Intel based blade running Linux and an open source framework. You'd need their professional services to manage it for you.
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Bettridge's first exception:
Any headline whose question contains thinly veiled skepticism, will instead be best answered with a "yes".
I'd say the low-hanging fruit disappeared a few decades ago. Continuing down the feature size curve has for many years required a whole slew of every-more-complicated tricks and techniques.
That said: yes, going forward is going to be increasingly difficult. You will eventually reach an insurmountable limit that no amount of trickery or technology will be able to overcome. I predict it'll be somewhere around the 0 nm process node.
you probably could. However, for a processor with 10^9 transistors and perhaps a dozen layers, it gets pretty time-consuming to build it by pushing atoms around one at a time.
The future is hardware; learn a HDL today.
You're correct here, but I'd like to mention that recent advancements in HLS (High Level Synthesis) allow regular software programmers to write C code that is compiled directly to hardware logic. There are some new rules to learn, things don't always work as expected and debugging is completely different to debugging software, but my point is that it's definitely possible to write major logic blocks in C without writing a line of VHDL code. So not necessarily will everyone need to learn a HDL to be a part of this change.
Well I think he is saying, that is pretty much what we are already getting to. When you are printing a 10nm wire into the silicon chip, you are not very far from doing it atom by atom as the wire is only like 50 atoms wide.
Troll is not a replacement for I disagree.
I worry about the reliability with tinyer and tinyer CPU feature size. ...how will those CPUs be doing, reliability-wise, 10yrs later?
When I buy something 'expensive', I expect it to last at least 10yrs, and CPUs are kinda expensive, to me.
(I still have an Athlon Thunderbird 700MHz Debian workstation that I use, for example, and it's still reliable.)
Uh, Linux geek since 1999.
Perhaps, but at least with lithography you can do it across the entire wafer (or die) area in a single go. That's batch processing all the transistors at once, rather than serially processing them with AFM.
There are other advantages to shrinking components. Higher clock rates become possible. The power consumption is also lessened, if you can offset the leakage issue somehow.
Why don't we use smaller architecture in larger dies, so that we have higher densities, and higher speeds? Also that wouldn't that allow room for more cores and cache.
Certainly it is on its deathbed at least.
Because whatever you do in the computing world, you are affected by processing power and cost. Growth in these regions drives both new hardware and new software to go with it, and any hit to growth will mean loss of jobs.
Software (what most of us here create) usually gets created for one of two reasons:
1. Software is created because nobody is filling a need. Companies may build their own version if they want to compete, or a company may contract a customized version if they can see increased efficiency or just have a process they want to stick to. There used to be a lot of unfulfilled need out there, but this demand is much sated in the 21st century.
2. Software is created because a company desires increased performance/new features (basic need is filled, this is a WANT). Once a new processor/feature becomes available, you either wedge it into existing code. Or, if it's a massive enough of an improvement, you create entirely new software enabled by the new level of performance-per-dollar.
Without continued growth, the industry is in danger of cratering because there's only so much processor architecture optimization you can do in the same process node, and the same goes for optimized libraries on the software side. In addition, brand-new industries enabled by cost reductions (e.g. digital FMV explosion in the 1990s, or the movement to track your every move in the 2000s) will no-longer be so common, and that will again force people to look elsewhere for employment.
Software engineers won't disappear, but they will be culled. The industry has not had to deal with that yet in it's entire history, so it will be painful. I'm hoping they can hod this off for as long as possible!
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Kind of. Heat dissipation starts being a bigger problem, and thermally limit slock speed. Look at overclocking sandy bridge vs ivy bridge chips.
If somebody took care of that Moore guy, his laws wouldn't apply anymore.
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So unless we come up with a novel technology to build with a higher density we are at the end of the road for that.
Maybe it's time to instead focus on other ways to improve performance. It may of course mean that the current architectural dogmas has to be abandoned.
If builders built buildings the way programmers wrote programs, then the first woodpecker would destroy civilization.
14nm -> 7nm.
2:1 Looks good to me.
Down at 2nm I think we're going to be worrying about whether the gate has an odd or even number of atoms across its width.
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There are a number of factors that affect the value of technology scaling. One major one is the increase in power density due to the end of supply and threshold voltage scaling. But one factor that some people miss is process variation (random dopant fluctuation, gate length and wire width variability, etc.).
Using some data from ITRS and some of my own extrapoliations from historical data, I tried to work out when process variation alone would make further scaling ineffective. Basically, when you scale down, you get a speed and power advantage (per gate), but process variation makes circuit delay less predictable, so we have to add a guard band. At what point will the decrease in average delay become equal to the increase in guard band?
It turns out to be at exactly 5nm. The “disappointing” aspect of this (for me) is that 5nm was already believed to be the end of CMOS scaling before I did the calculation. :)
Incidentally, if you multiply out the guard bands already applied for process variation, supply voltage variation, aging, and temperature variation, we find that for an Ivy Bridge processor, about 70% of the energy going in is “wasted” on guard bands. In other words, if we could eliminate those safety margins, the processor would use 1/3.5 as much energy for the same performance or run 2.5 times faster in the same power envelope. Of course, we can’t eliminate all of them, but some factors, like temperature, change so slowly that you can shrink the safety margin by making it dynamic.
You'd think so, but the problem is global interconnect. Not gates. It was all the way back at the 250nm node when interconnect and gate delay were about the same.
At the 28nm node, wire delay is responsible for something like 80% of the time it takes for signals to work their way through a circuit.
And it some cases inverters are actually used to help signals propagate more quickly down long wires. In other words, long wires are so slow compared to gates that adding gates can speed things up!
An interesting article here discribes the horrendiously difficult challenges that face EUV:
https://www.semiwiki.com/forum...
The problem is that memristance effects begin to manifest below 5nm
Thus, start using memristors to build IMP-FALSE logic circuits.
Guard bands are a rational engineering tradeoff, when confronted with the physical laws of random fluctuations on one hand and developing entirely new computational models on the other.
When a difference of one dopant atom creates a measurable change in device characteristics you have to accept that its past the point where just spending money can tighten up the tolerances. Sometimes it's just faster to overdesign the part than to re-invent mathematics, physics, and chemistry simultaneously.
>We're already at the point where 22nm components are more expensive per transistor than those at 28nm. [eetimes.com]
Only if you have a crappy GF fab.
If you invested in a decent finfet capable process on sufficiently large wafers, your margins will improve at smaller geometries.
And this little tidbit I'm sure has CPU OEMs scared....they passed "good enough" on their designs and went so far into "insanely overpowered" that consumers really have no reason to buy before the previous unit dies.
Take what I'm typing on as an example, its an HP Pro 3000 which since it came with Vista (which I of course upgraded to Win 7, putting 32bit Vista on a PC with 4GB? WTH HP?) I would date it around 07-08. It has a Pentium Dual at 2.7Ghz, 4GB of RAM, and a 500GB HDD....how many home users are actually gonna be able to max this out? I pound the shit out of this machine, downloading drivers and burning discs and yanking data off of memory cards, often at the same time, and it just purrs, so why buy a new one? Now we are seeing the same thing with ARM, my dad recently picked up a tablet I recommended which has 4 cores, 1GB of RAM and 8GB of onboard storage, final cost? $140 shipped, the odds that he will be able to max it out? pretty much zero. this thing has enough power it can easily drive his widescreen TV over HDMI, surf, chat, and gets great battery life...what motivation does he have to buy a new one?
Lets face it X86 systems have become like washers and dryers, no need to get a new before the old one dies. Hell this is even true for gamers, my gaming PC at home is fricking 5 years old now which is ancient history in the PC world yet with a hexacore, 8GB of RAM, and 3TB of HDD space the only thing I've had to do since buying it is upgrade my GPU. That's it, that is all I've had to do and I'm playing Bioshock Infinite and Far Cry 3 and anything else i want to play with plenty of bling and decent framerates. We are seeing X86 play out on fast forward with ARM now going up to octocore because MHz bumps are getting harder to do without blowing the power budget, there is just no reason to buy before the current one dies which I'm sure is scarier than trying to hit 14nm to Intel and TSMC.
ACs don't waste your time replying, your posts are never seen by me.
I'd say the low-hanging fruit disappeared a few decades ago
In an absolute sense, yes. In a relative sense, some fruit will always be lower than others.
That that is is that that that that is not is not.
More miniturization equals greater reliability, because smaller components always do better at surviving shock and vibration than larger components.
That that is is that that that that is not is not.
Because some people like their laptops as small and thin as possible, there's always demand for the next best, smallest but fastest thing.
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But not enough to make the several billion required to go down to 12nm, much less 5nm economically viable. For everybody else the chips blew past good enough to insanely overpowered.
Hell even a multitasker like me is finding it harder and harder to come up with a reason to buy a new unit. My netbook is from 2009 and uses one of the weakest chips you can use (the AMD E350) yet it does 1080p over HDMI, gets 4 hours plus on a 5 year old battery, so why buy a new one when the previous chips let me do whatever I want?
ACs don't waste your time replying, your posts are never seen by me.