MIPS Goes Open Source (eetimes.com)
Junko Yoshida, writing for EETimes: Without question, 2018 was the year RISC-V genuinely began to build momentum among chip architects hungry for open-source instruction sets. That was then. By 2019, RISC-V won't be the only game in town. Wave Computing (Campbell, Calif.) announced Monday (Dec. 17) that it is putting MIPS on open source, with MIPS Instruction Set Architecture (ISA) and MIPS' latest core R6 available in the first quarter of 2019. Art Swift, hired by Wave this month as president of its MIPS licensing business, described the move as critical to accelerate the adoption of MIPS in an ecosystem.
Going open source is "a big plan" that Wave CEO Derek Meyer, a MIPS veteran, has been quietly fostering since Wave acquired MIPS Technologies in June, explained Swift. Swift himself is a MIPS alumnus who worked at the company as a vice president of marketing and business development for four years. Wave, which styles itself as a tech startup poised to bring "AI and deep learning from the datacenter to the edge," sees MIPS as a key to advancing Wave's AI into a host of uses and applications. Included in MIPS instruction sets are extensions such as SIMD (single instruction, multiple data) and DSP. Swift promised that MIPS will bring to the open-source community "commercial-ready" instruction sets with "industrial-strength" architecture. "Chip designers will have opportunities to design their own cores based on proven and well tested instruction sets for any purposes," said Swift.
Going open source is "a big plan" that Wave CEO Derek Meyer, a MIPS veteran, has been quietly fostering since Wave acquired MIPS Technologies in June, explained Swift. Swift himself is a MIPS alumnus who worked at the company as a vice president of marketing and business development for four years. Wave, which styles itself as a tech startup poised to bring "AI and deep learning from the datacenter to the edge," sees MIPS as a key to advancing Wave's AI into a host of uses and applications. Included in MIPS instruction sets are extensions such as SIMD (single instruction, multiple data) and DSP. Swift promised that MIPS will bring to the open-source community "commercial-ready" instruction sets with "industrial-strength" architecture. "Chip designers will have opportunities to design their own cores based on proven and well tested instruction sets for any purposes," said Swift.
Aren't these the same cpu arch's that linux is dropping support for due to lack of demand?
... is David Patterson.
Pleeease!
Sent as ripples into the electromagnetic field. No single photon has been harmed in the process.
Since Nintendo won’t make a classic mini N64 we can make our own with an open mips chip.
The FUBAR MIPS instruction set that wasn't backwards compatible with older MIPS code?
If so, why would anyone want to go BACK to MIPS when they can get a fresh architecture, or use an established one with backwards compatibility? What is the suppler, developer, or end user benefit when it has less software compatibility, no compelling differences, and no low cost desktop/development platform or implementation to run atop?
Does anyone know more about how the architecture compares to others?
Especially in terms of protential.
You know ... how people say x86 is bad and ARM and RISC-V are nicer.
Since Nintendo wonâ(TM)t make a classic mini N64 we can make our own with an open mips chip.
What's your graphics hardware going to look like?
Anyway, this is exciting whether it will let you knock off the N64's CPU or not. Like TFA says, MIPS is mature. It's not known for performance, but maybe this will be the shot in the ARM that it's looking for.
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
SPARC has been GPL for years (Score:?)
by Anonymous Coward on Monday December 17, 2018 @03:51PM
Risc-V never was the only game in town; SPARC has been avaialable under the GPLv2 since 2006: https://en.wikipedia.org/wiki/OpenSPARC
There definitely needs to be challenges to the dominance of Intel and AMD. I'm looking forward to progress on the MIPS front. After the woes of Spectre and Meltdown, MIPS will be welcome competition!
Does this mean we'll finally get IRIX running on a new system? It'd be cool to get IRIX running on a laptop form factor. Not overly useful but hey Photoshop 3.0 and Maya 6.0 are pretty cool. Plus we can all pretend to be artiste's with Power Animator.
RISC-V was never the only game in town. There have been open source ISAs and CPU designs for years.
The hype of RISC-V is ridiculous. Hopefully this puts it to bed
Yes, seriously – running Linux these days: https://www.youtube.com/watch?... since last month or so also with hardware X.org cursor: https://www.youtube.com/watch?...
Fujitsu has decided to replace SPARC with ARM.
Ideally, we need several.
But to really understand what works and why, you want examples.
I hope, now the Itanium 3 has been discontinued for a while, that and the Intel iWarp are open sourced. Doubt it, but one can always hope.
Between the MIPS, the T2, the GPLed SPARC, the RISC-V, the open source elements of the AMULET series and everything on Open Cores, we've a substantial body of knowledge on very large numbers of threads, very high performance, asynchronous computing and advanced ALU.
Throw in the two above as well and our understanding is almost complete.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
you cannot legally get the games.
Granted for first-party games. But it should be feasible for a sufficiently capitalized toy company to license 20 well-received third-party Nintendo 64 games from their publishers to make and sell a "Classic 64" console without Nintendo's help and without Nintendo's name on the box. At 8 to 32 MB per ROM, it'll fit comfortably on a board with 512 MB flash. Though the present source release does not include the Nintendo 64's RSP (vertex shader) and RDP (triangle filler), a high level emulation thereof would satisfy all but the most hardcore purists.
I'd like to see IRIX open sourced!
I posted this at hacker news (tl;dr - SPARC and MIPS had design aspects that were great in 1983, but didn't scale): https://www.jwhitham.org/2016/...
If (insert current owner here), (insert current owner here), and IBM want to contribute, they can join the RISC-V movement. MIPS, SPARC, and POWER are all dead.