Doubtful they can release a high mhz chip than intel any time soon... p4 was built to achieve a lot higher of clock frequencies than AMD... yesterady at the Intel Developer's Forum intel announced that the P4 is expected to scale to 10ghz http://213.219.40.69/26040113.htm
Given the success they have had in scaling the ppro WAY past the speeds it was intended for, AMD has basically no change in catching up mhz-wise until their next gen core, which is a long ways off...
In the name of fairness, I actually watched the whole movie before writing this. That movie is one of the stupidest, most idiotic "movies" of its type that I've seen. Yeah, I admit the camera work was actually well done, but I didn't come anywhere close to laughing at it once. Really a waste of time for anyone to dl it.
So man, whats your deal? You're just trying to see what kind of ridiculous architecture claims you can make and still get modded up? You want this dwain snyders guy to be spammed but you don't want to do it directly so you make up a fake 'anti spam' email address so people harass him and call him an idiot? Whats the reason for doing this? Your claims this time are more ridiculous than last time which leads me to believe that you're just treating this like a big joke... whatever...
If you have any details on the P4 branch prediction please post them... Oh thats right... you don't have any details on it do you, since it's such a closely guarded secret... stfu
I can just as easily say that most atheists' morality is based on what is "convenient"... blah blah taking cheap shots is fun but not very productive is it?
What you've said is a little misleading... The intel proc has a pipelined FMAC (floating point multiply accumulate), so in a sense it can do two FP ops per cycle (a multiply and an add). Also, one of the FP pipelines in the K7 (still an infinitely cooler name than athlon) is for the fswap instruction, which is only necessary for maintaining the FP stack, and doesn't actually perform any truly "useful" work
Oh come on... this guy is lying... don't any of you know what VLIW is? AMD doesn't have any VLIW offerings... The Intel Itanium is basically a VLIW processor, and we all see how well that worked out...
feh
About the memory stalls. What you said is actually false. I wrote a paper that is being presented in 2 weeks on way way to use SMT to attack memory stalls. You can view it here http://www-cse.ucsd.edu/users/tullsen/isca2001.pdf
I'm not saying that there is any coorelation at all... I'm saying that Japan isn't exactly the best model to use for how our children should be reaised, so something that they do doesn't necessarily automatically become the best approach.
Of course, you're too stupid to think for a second and would rather shoot from the hip...
Well, I left out some details...
If you rely on the compiler to do things, you can make your processor wider (actually, the primary limitation of making it infinitely wide is the number of execution units and cache ports, (and I suppose number of branch predictions you can provide)). Make a 3 issue out of order processor, however, is more complex overall than a 6 wide EPIC processor (although, the FU bybass network probably isn't pretty on the EPIC).
As far as FP vs INT... well... I don't know... I mean, if all you care about is FP, then your work is 99% likely to be easily parallizable. Thus, just buy 10 1 gig athlons and be happy... but whatever:)
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Doubtful they can release a high mhz chip than intel any time soon... p4 was built to achieve a lot higher of clock frequencies than AMD... yesterady at the Intel Developer's Forum intel announced that the P4 is expected to scale to 10ghz http://213.219.40.69/26040113.htm
Given the success they have had in scaling the ppro WAY past the speeds it was intended for, AMD has basically no change in catching up mhz-wise until their next gen core, which is a long ways off...
such as your penis?
Way to trivialize what the jews went through in wwii...
and no one is even "coming for" anyone in this case... geez
Actually, oh reactionary one, I meant that they wouldn't have the courage to respond to his arguments...
and what do we have here... you didn't respond to this argument...
Such cases are incredibly rare though...
I doubt there are any published numbers on it, they are so rare...
So basically... who cares?
You get a cookie...
But course, no one will respond to this because they're liberal cowards...
In the name of fairness, I actually watched the whole movie before writing this. That movie is one of the stupidest, most idiotic "movies" of its type that I've seen. Yeah, I admit the camera work was actually well done, but I didn't come anywhere close to laughing at it once. Really a waste of time for anyone to dl it.
a fucking men brother
There is a certain logical fallacy called a slippery slope. You're committing it...
Let me make your reply a little more concise 1) gshare exists 2) icache access / branch predictions aren't necessary single cycle anymore
So man, whats your deal? You're just trying to see what kind of ridiculous architecture claims you can make and still get modded up? You want this dwain snyders guy to be spammed but you don't want to do it directly so you make up a fake 'anti spam' email address so people harass him and call him an idiot? Whats the reason for doing this? Your claims this time are more ridiculous than last time which leads me to believe that you're just treating this like a big joke... whatever...
If you have any details on the P4 branch prediction please post them... Oh thats right... you don't have any details on it do you, since it's such a closely guarded secret... stfu
This tired old article... that guy is writing from the assembly programmer's point of view, not the computer architect's point of view...
I can just as easily say that most atheists' morality is based on what is "convenient"... blah blah taking cheap shots is fun but not very productive is it?
If you can point me to some documentation of this fact I'd be grateful then...
What you've said is a little misleading... The intel proc has a pipelined FMAC (floating point multiply accumulate), so in a sense it can do two FP ops per cycle (a multiply and an add). Also, one of the FP pipelines in the K7 (still an infinitely cooler name than athlon) is for the fswap instruction, which is only necessary for maintaining the FP stack, and doesn't actually perform any truly "useful" work
Oh come on... this guy is lying... don't any of you know what VLIW is? AMD doesn't have any VLIW offerings... The Intel Itanium is basically a VLIW processor, and we all see how well that worked out...
feh
Score: 5 Interesting
Interesting point
About the memory stalls. What you said is actually false. I wrote a paper that is being presented in 2 weeks on way way to use SMT to attack memory stalls. You can view it here http://www-cse.ucsd.edu/users/tullsen/isca2001.pdf
No you're describing CMP (chip multi-processor)
Of course, you're too stupid to think for a second and would rather shoot from the hip...
Is not used the Cliff used it. Misuse of this expression is one of my hugest pet peeves...
Yeah and Japan doesn't have the highest teen suicide rate of any country or anything...
As far as FP vs INT... well... I don't know... I mean, if all you care about is FP, then your work is 99% likely to be easily parallizable. Thus, just buy 10 1 gig athlons and be happy... but whatever :)