This still won't solve the immigrants from the Xenoplxyt slum in Mars city from letting their lunar lawns grow over. First it starts with not mowing, and then it's lunar rovers and landing craft on concrete blocks in front of the habitat.
Next thing you know they'll be bringing solar powered magnetometers into our schools. Kids these days...
Right, because it takes no science at all to create 500 million transistors at 65nm on a piece of silicon no bigger than your thumbnail. None. It also takes no science whatsoever to overcome the limitations of conventional lithography and be the first company to ever use 90 or 65nm technology.
Man, thanks for opening my eyes! I'm going to quit RIGHT NOW and go work for Transmeta, because they have their act together!
I put my hard-to-remember PWs on a sticky note, inside a locked drawer, taped to the bottom of my desk (inside the drawer). I figure if anyone can get into the desk and find the note, they probably deserve a prize anyway.
Also, I have a small card in my wallet of phone numbers. Some of the "phone numbers" are really account numbers and their PINs, but they're formatted exactly the same as the real numbers... I was always pretty proud of myself for that one.
Believe it or not, Apple licensed a short run of non-Apple macs. I cannot find any links, but the idea of a non-Apple macs is not new. Incidentally, it was right around the time of this movie that they were available.
True, but it's important to realize that immersion opens up doors not possible with standard methods. The main one being that, since the numerical aperture is the SIN of the half angle of the cone of diffraction orders able to be captured by a given lens, it should technically NEVER exceed 1.0 (-1 0). Since the diffraction orders are almost 100% captured by the bead of water due to total internal reflection effects, and subsequently amplified by focus, it's possible to get NAs higher than 1.0(!) - the physics of it is a little more dense, but the important bit is to see that tis allows you to exceed the CDs possible with standard imaging practices which have a gap between the lens and wafer.
This is known as immersion lithography. Intel has kept it off its official roadmap because they're able to push their current technology to 45nm and possibly beyond. AMD on the other hand has started purchasing immersion steppers and it looks like they're trying to get them operational in production by 2006.
A few small corrections to your comment: it's not water, and there's no "flow". The fluid used is engineered to increase something called the "numerical aperture" of the lens (or, the NA). Typical fluids include ethylene glycol and certain other alcohols diluted with deionized water. In reference to the "flowing," the steppers simply pick up a bead of water and use it. When the wafer comes out of the stepper it's essentially dry.
One potential downside to this process is the sensitivity of the resist reaction to water. Unfortunately in order to work at the low end the wafers must be post-exposure baked immediately coming out of the stepper. This reduced throughput time since you can't do an entire lot of wafers at once unless you set up 25 hot plates.
Rochester Institute of Technology recently revealed that they have been able to push immersion lithography with high NA fluids to 31nm lines and spaces, which is only 2 generations from the proposed physical limit of silicon gate transistors (11 nm).
Doppler shift may cause the genetic links between african and european swallows to become obfuscated. However, by measuring the relative red shifts, we might finally settle which one is faster...
5 nm is not the size of a molecule, unless you're talking about entire DNA chains or amino acids. A typical atom is 0.5 to 3 Ang, or 0.05 to 0.3, and a single water molecule is about 0.958 Ang.
molecules of 5nm could concievably change the performance of a silicon device by shortening effective channel widths (considering channel widths are targeted for the 45nm range, +/- a mere 0.3 nm).
Lithography "generations" are determined by an international consortium of semiconductor companies. Long ago Intel, IBM, et al. realized they would not be able to afford the research necessary to advance the the industry (this was all before we were able to go sub-micron). As a result, the ITRS (http://public.itrs.net/) was developed to lay out the necessary groundwork for research and lithography landmarks for the industry. Current generation 90nm, next is 65nm, and 45nm after that. Eventually there's supposed to be a 32nm node, then 11nm with a potential stop over in the 25nm range.
Past that it's anyone's guess. 0.3nm is about the size of a silicon atom, so considering we need to be able to pattern polysilicon and copper at these sizes it doesnt make me too convinced that we'll make it to 11nm reliably...
Then again, they said we'd never make it below 1000nm...
For those who are interested, one of my writers from PimpedOutCases wrote a little article on the event, with plenty of pictures. He was involved, although they booted him (and all other AMD folks) from the final run since apparently the AMD systems were buggering up the computations. As has been mentioned here, it could have been an issue with the nForce ethernet, however my writer says it had something to do with the AMD systems completing their pieces of the computation too fast...although that seems a bit fishy to me.
If you care to see what he had to say, check it out here: POC Special: Coverage From Flashmob I
(Apologies in advance if anyone feels this is spam. I figured some of you would like to see it.)
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This still won't solve the immigrants from the Xenoplxyt slum in Mars city from letting their lunar lawns grow over. First it starts with not mowing, and then it's lunar rovers and landing craft on concrete blocks in front of the habitat.
Next thing you know they'll be bringing solar powered magnetometers into our schools. Kids these days...
Right, because it takes no science at all to create 500 million transistors at 65nm on a piece of silicon no bigger than your thumbnail. None. It also takes no science whatsoever to overcome the limitations of conventional lithography and be the first company to ever use 90 or 65nm technology. Man, thanks for opening my eyes! I'm going to quit RIGHT NOW and go work for Transmeta, because they have their act together!
I'm an Intel Engineer. How's that?
I put my hard-to-remember PWs on a sticky note, inside a locked drawer, taped to the bottom of my desk (inside the drawer). I figure if anyone can get into the desk and find the note, they probably deserve a prize anyway. Also, I have a small card in my wallet of phone numbers. Some of the "phone numbers" are really account numbers and their PINs, but they're formatted exactly the same as the real numbers... I was always pretty proud of myself for that one.
Believe it or not, Apple licensed a short run of non-Apple macs. I cannot find any links, but the idea of a non-Apple macs is not new. Incidentally, it was right around the time of this movie that they were available.
Carrie Anne Moss used nmap in Matrix Reloaded. Maybe she wants the position.
True, but it's important to realize that immersion opens up doors not possible with standard methods. The main one being that, since the numerical aperture is the SIN of the half angle of the cone of diffraction orders able to be captured by a given lens, it should technically NEVER exceed 1.0 (-1 0). Since the diffraction orders are almost 100% captured by the bead of water due to total internal reflection effects, and subsequently amplified by focus, it's possible to get NAs higher than 1.0(!) - the physics of it is a little more dense, but the important bit is to see that tis allows you to exceed the CDs possible with standard imaging practices which have a gap between the lens and wafer.
This is known as immersion lithography. Intel has kept it off its official roadmap because they're able to push their current technology to 45nm and possibly beyond. AMD on the other hand has started purchasing immersion steppers and it looks like they're trying to get them operational in production by 2006.
A few small corrections to your comment: it's not water, and there's no "flow". The fluid used is engineered to increase something called the "numerical aperture" of the lens (or, the NA). Typical fluids include ethylene glycol and certain other alcohols diluted with deionized water. In reference to the "flowing," the steppers simply pick up a bead of water and use it. When the wafer comes out of the stepper it's essentially dry.
One potential downside to this process is the sensitivity of the resist reaction to water. Unfortunately in order to work at the low end the wafers must be post-exposure baked immediately coming out of the stepper. This reduced throughput time since you can't do an entire lot of wafers at once unless you set up 25 hot plates.
Rochester Institute of Technology recently revealed that they have been able to push immersion lithography with high NA fluids to 31nm lines and spaces, which is only 2 generations from the proposed physical limit of silicon gate transistors (11 nm).
Doppler shift may cause the genetic links between african and european swallows to become obfuscated. However, by measuring the relative red shifts, we might finally settle which one is faster...
5 nm is not the size of a molecule, unless you're talking about entire DNA chains or amino acids. A typical atom is 0.5 to 3 Ang, or 0.05 to 0.3, and a single water molecule is about 0.958 Ang. molecules of 5nm could concievably change the performance of a silicon device by shortening effective channel widths (considering channel widths are targeted for the 45nm range, +/- a mere 0.3 nm).
Lithography "generations" are determined by an international consortium of semiconductor companies. Long ago Intel, IBM, et al. realized they would not be able to afford the research necessary to advance the the industry (this was all before we were able to go sub-micron). As a result, the ITRS (http://public.itrs.net/) was developed to lay out the necessary groundwork for research and lithography landmarks for the industry. Current generation 90nm, next is 65nm, and 45nm after that. Eventually there's supposed to be a 32nm node, then 11nm with a potential stop over in the 25nm range.
...
Past that it's anyone's guess. 0.3nm is about the size of a silicon atom, so considering we need to be able to pattern polysilicon and copper at these sizes it doesnt make me too convinced that we'll make it to 11nm reliably...
Then again, they said we'd never make it below 1000nm
For those who are interested, one of my writers from PimpedOutCases wrote a little article on the event, with plenty of pictures. He was involved, although they booted him (and all other AMD folks) from the final run since apparently the AMD systems were buggering up the computations. As has been mentioned here, it could have been an issue with the nForce ethernet, however my writer says it had something to do with the AMD systems completing their pieces of the computation too fast...although that seems a bit fishy to me.
If you care to see what he had to say, check it out here: POC Special: Coverage From Flashmob I (Apologies in advance if anyone feels this is spam. I figured some of you would like to see it.)