Just FYI, the skin depth of a 2.4GHz EM wave should be on the order of 50nm - the heat sink alone should be more than enough to stop virtually all microwave radiation from your laptop
2) The Xbox 360 is using 2.4GHhz wireless controllers last I heard. Not a bad concept, but what happens when the battery dies mid-game? What about the cost of batters that add up over time? What happens if I have some other 2.4GHz device such as a phone or wireless router in the near location? I'm not the most knowledgable about wireless communications, but could this cause some interference?
Most current games on the PS2 and XBOX pause the game if the controller is unplugged (it's come in useful quite a few times when my dog get tangled in the cord).
It wouldn't be that difficult to work up something that's just as workable for a wireless controller...
Kid, you live in Austin - if you look up semiconductor in your local yellow pages, you'll see hundreds of pages (I found 166 searching on smartpages)
If you still have a year (or two or three) left, see if your high school has a "life skills" type program that lets you work for class credit - I know that there are a lot of large companies that work with high schools (I'm in Houston, but I think it's about the same in Austin) that have kids come in and work 3 2 hour shifts a week - it's unpaid some places, but a few years from now when you're applying for an internship (in college) that experience will make it that much easier for you to find one.
I don't know what you're trying to do for sure, but if it's technical, there are probably 2 dozen companies that do it. I know IBM, AMD, and Intel all have Design||Test||Fab facilities in the area.
The fact that as a high school student, you could potentially be around for a year or two (wouldn't hurt to mention that you're considering the University of Texas[if you are], which would stretch that out to 6 or seven years) would make most employers EXTREMELY eager to pick you up - the co-op programs at the big 3 that I mentioned would probably be able to find a place for you based simply off that fact.
The parent post is full of good advice, but you may want to contact the co-op/internship coordinator instead of the HR, it just depends on how the company is structured.
Another thing you might try [if you'll be attending U.T.] is find out when U.T. is having engineering job fairs, and go - give your resume to local employers, and explain your situation. The easiest way might just be to make it a point to meet people who know people - Austin is a fairly small city, surely you know someone who has a technically oriented parent - talk to them and find out who to talk to at their place of employ.
Just remember that you CAN do it, but that the only person who can do it is YOU - if you don't take the initiative, no one else will.
This is probably the biggest reason my typing speed improved from 25-~60wpm my freshman year of college (might have had something to do with my grades dropping some too...)
I suggest tsunami.thebigwave.net:23 - the wars and pvp action mean you either type very fast or suck
The cores on a processor do not have to be identical, but having different cores would GREATLY increase the difficulty of the design/debug process.
Having to do (in effect) 2 separate processor designs, then ensuring that the arbitration logic works correctly, the list just goes on and on. Having both cores identical greatly reduces design costs.
In reality, manufacturing costs are not that different from a top of the line core and a commodity core, one just bins out at a higher speed. What might be doable is running one core on one clock multiplier, and runnning the other core on a different (much lower) clock multiplier, and disabling the faster core when the proc is under a low load...
Motorola HC12 (sub $30)
Any generic RC car (sub $30)
A few bucks on diodes/breadboards/etc, and you can build a decent line follower, maze racer, GPS guided bot
Be forewarned - if you're doing this, I don't think there's any kind of high level compiler for the HC12, so you'll be writing in assembly (but for simple robots, I don't think it'll matter)
Electrical test of IC's and usability testing on a consumer electronics devices are COMPLETELY unrelated
Usability testing is something done very rarely (probably only a handful of times) during the development of the product, basically getting people to use the device and give some feedback
Electrical test is something done to EVERY die (usually multiple times per die) that gets shipped out of a wafer fab, is usually quite thorough, and is done by machines costing anywhere from $100k on up
Eliminating test (or even going to only testing on a sample basis) would allow a very large cut in the manufacturing costs of IC's, considering you could also eliminate burnin, and a significant chunk of your equipment overhead - DRAM chips are simple enough you could probably do it - it'd probably even be possible to have the savings from eliminating test be greater than the expense of the returns
It has to do with how many gate stages the processor had in each pipeline stage - if the worst case stage has 14 gate delays, then the processor would theoretically be able to run at about 600/14GHz.
HOWEVER, there is no way the chip would actually get that close - this 604GHz oscillator is probably a single ring on a chip containing many oscillators. The average speed could easily be more in the 400-500GHz range.
Also, these transistors are BJTs, which are useless in very large xtor count chips due to their much higher current density, so it's unlikely you'll see a computer made out of them ever (processors have been almost exclusively CMOS for over 20 years)
Would you really want to fly into airspace where the servers in the air traffic control centers are run by processors that are good enough...
Or bank with a bank whose data center processors are good enough...
While we're at it, let's get rid of process/product qualification - this could save thousands of parts for each digital chip out there. We could also get rid of burn in and any kind of stress testing, since we obviously wouldn't care if we had any parts out there that were 'walking wounded'
Hell, we could even get rid of any kind of functional test...
Seriously it's already difficult enough to test and get reasonable levels of coverage on current processors already - if the chips are going to be used in ANY kind of mission critical applications (or even in my home PC) I want a chip that is as good as current test processes can guarantee it to be.
How irritating would it be to have a processor with a hard fault in that caused errors on excercising a certain block of logic.
People have already mentioned that quite a few products already use defective ram chips, and engineers desigining various products are aware that parts like these are available, and are (or should) be using them where ever possible to reduce cost.
It might be interesting to go through some analysis to see if the increase in DPPM (and subsequent increase in returns) would be low enough to not completely cancel out the gains you would get from increased yields.
The school I attended had a 3-4 people that could check out projectors/laptops/etc.
The first was sys admin for the department's computers. The others were the 2-3 students that ran the stockroom (EE, so all the students needed to check out scopes/supplies for their labs).
Even if your department doesn't already have students working in this capacity, if the department you work in has >120 faculty, it should not be difficult to justify a $5/hour student assistant.
For checking things out, it was a simple checkout sheet that the person checking things out would put their name/id number on, and they and the person manning the stockroom would sign. The solution may not be high-tech, but it does have the benefit of helping out a few students with some extra money (which they always need), and keeping you more involved with students (which is the kind of thing that will improve the chances the students recommending your school, assuming you are fairly nice to them)
While there may be separate clock domains per core, the clock multiplier circuitry may be contained in the arbitration logic, as this could probably improve the arbiter's efficiency.
I think that the design specifics of the arbitration logic (specifically, what speed it communicates with the cores, and how core-to-core communication is handled) is the determining factor in how feasible multi-frequency dual core circuits are.
The main problem with this is that the processors share a clock tree and arbitration logic - if the clock multiplier is contained in the arbitration logic, then having one core at one speed and another at a different speed would be impossible.
If the clock multiplier is contained separately in each core, it would be possible - however, having different clock ratios on each core would considerably complicate the arbitration logic, since it would have to deal with different setup and hold timings when sending data to one core vs. the other - this would probably greatly increase your chances of inducing a processor error.
Trying to do this could also require a great deal more design difference between the two cores, which might cause many problems. It also would make it much more difficult to sell single core versions of dual core chips (i.e. one core fails, the other core is good - blow a few fuses to get the chip to look like a single core chip, and sell at as a single core)
The power increase between a single core processor and dual core processor is probably less than you think: I would not be surprised if it is in the 20% range on average.
Simply running the clock (and not performing any operations) on most processors will draw ~60-70% of the parts max power, which suggests that the loading on the part determines how much of that extra 30-40% is being dissipated.
Working under this assumption, worst case, a dual core processor would draw 40% more power than a single core processor, while effectively doubling your maximum throughput.
As for cost, I would be surprised if these processors debuted at more than 50% more than their single core cousins, and the prices would probably drop fairly rapidly
Sun has UltraSPARC, Opteron and Xeon models
IBM has POWER and Opteron models
HP has Itanium, Xeon and Opteron models
And it only took me 5 minutes to look at the specs of all the above models.
Just look at the entry level servers or high end workstations on most manufacturers web sites...
Some clarification for you.
Oh, your next to the last sentence (whole eV thing) is pretty much completely wrong...
The IR drop you refer to across serial lines (global interconnects) is generally taken care of through the reuse of repeaters in long wires - they increase speed, and improve operating margins.
The problem with unpredictable logic in new/extremely small transistors:
1. new transistors run at much lower voltages than older chips - 90nm trahsistors run at ~1V, 65nm will run in the 800-900mV range (these are the nominal voltages these parts use in systems, not actual vmins)
2. every reduction in operating voltage reduces the separation between vil/vih and vol/voh in the various circuit subblocks
3. increases in operating speed will lead to more noise on power busses
So, 30 years ago, when parts ran on 5V, in the low MHz range, vol/voh would generally be in the 0.5/4.5V range, with vil/vih in the 2/3V range, you had >1V noise margin, with very little noise on the power busses.
For modern processors, the noise margin is generally in the 100mV range, and if you look at what the voltage looks like on a power bus, dips or spikes that are on the order of magnitude of the noise margin are not unusual at all.
There are tricks, such as not using stacked logic, etc that can help improve your operating margins, but most of these come with a performance hit.
All Intel's excess capacity in their fabs probably doesn't have much to do with this guys research, also...
And to make you feel better, you're not just paranoid, you have a terrible understanding of device physics/operation/modern electronics
Cell would probably not make the best server processor.
Although its performance has been tweaked to be able to vector calculations EXTREMELY quickly, it looks like the only thing it has in its favor as a server processor is the extremely high memory BW.
A better example of a server processor designed under the same type of methodology (lots of little parts doing things in parallel) would probably be Sun's Niagara - similar design concept to cell, but teaked to perform server operations, not floating point vector calculations, very quickly.
234M transistors is not the problem.
As the grandparent pointed out, the primary problem is the die size - a secondary problem could be the odd floorplan (long and narrow), as this could cause greater cross die process variation
Depending on defect density, 221mm^2 die could limit cell to somewhere near 30% yields - even with 300mm wafers, you'll still only be yielding 60-80 functional die per wafer - by comparison, a Pentium/Opteron, which is ~1/2 the size could yield 300-400 die per wafer.
This chip will most likely be fairly difficult to fab - at the least, manufacturing costs will probably be at least 4x what they would be for other mainstream processors
Since the there is no structural change to the semiconductor during the photovoltaic process, the lifetime of the parts should basically be limitless - the thing that I would worry about more than the cell failing is that the installation method would lend itself to wear-our
Slashdot Mirror
1 Hz = 1 cycle/second
2GHz = 2.4 billion cycles/second
The GHz is measuring EXACTLY the same thing
Just FYI, the skin depth of a 2.4GHz EM wave should be on the order of 50nm - the heat sink alone should be more than enough to stop virtually all microwave radiation from your laptop
don't forget http://dealnews.com/
2) The Xbox 360 is using 2.4GHhz wireless controllers last I heard. Not a bad concept, but what happens when the battery dies mid-game? What about the cost of batters that add up over time? What happens if I have some other 2.4GHz device such as a phone or wireless router in the near location? I'm not the most knowledgable about wireless communications, but could this cause some interference?
Most current games on the PS2 and XBOX pause the game if the controller is unplugged (it's come in useful quite a few times when my dog get tangled in the cord).
It wouldn't be that difficult to work up something that's just as workable for a wireless controller...
According to checkout info, shipping is only $3.99 (sounds like a bargain to me!)
As someone from texas:
Kid, you live in Austin - if you look up semiconductor in your local yellow pages, you'll see hundreds of pages (I found 166 searching on smartpages)
If you still have a year (or two or three) left, see if your high school has a "life skills" type program that lets you work for class credit - I know that there are a lot of large companies that work with high schools (I'm in Houston, but I think it's about the same in Austin) that have kids come in and work 3 2 hour shifts a week - it's unpaid some places, but a few years from now when you're applying for an internship (in college) that experience will make it that much easier for you to find one.
I don't know what you're trying to do for sure, but if it's technical, there are probably 2 dozen companies that do it. I know IBM, AMD, and Intel all have Design||Test||Fab facilities in the area.
The fact that as a high school student, you could potentially be around for a year or two (wouldn't hurt to mention that you're considering the University of Texas[if you are], which would stretch that out to 6 or seven years) would make most employers EXTREMELY eager to pick you up - the co-op programs at the big 3 that I mentioned would probably be able to find a place for you based simply off that fact.
The parent post is full of good advice, but you may want to contact the co-op/internship coordinator instead of the HR, it just depends on how the company is structured.
Another thing you might try [if you'll be attending U.T.] is find out when U.T. is having engineering job fairs, and go - give your resume to local employers, and explain your situation. The easiest way might just be to make it a point to meet people who know people - Austin is a fairly small city, surely you know someone who has a technically oriented parent - talk to them and find out who to talk to at their place of employ.
Just remember that you CAN do it, but that the only person who can do it is YOU - if you don't take the initiative, no one else will.
Good Luck
they showed buckyballs (which are a single molecule, i think) can do this during my freshman year (1999)...
This is probably the biggest reason my typing speed improved from 25-~60wpm my freshman year of college (might have had something to do with my grades dropping some too...)
I suggest tsunami.thebigwave.net:23 - the wars and pvp action mean you either type very fast or suck
The cores on a processor do not have to be identical, but having different cores would GREATLY increase the difficulty of the design/debug process.
Having to do (in effect) 2 separate processor designs, then ensuring that the arbitration logic works correctly, the list just goes on and on. Having both cores identical greatly reduces design costs.
In reality, manufacturing costs are not that different from a top of the line core and a commodity core, one just bins out at a higher speed. What might be doable is running one core on one clock multiplier, and runnning the other core on a different (much lower) clock multiplier, and disabling the faster core when the proc is under a low load...
Motorola HC12 (sub $30)
Any generic RC car (sub $30)
A few bucks on diodes/breadboards/etc, and you can build a decent line follower, maze racer, GPS guided bot
Be forewarned - if you're doing this, I don't think there's any kind of high level compiler for the HC12, so you'll be writing in assembly (but for simple robots, I don't think it'll matter)
Electrical test of IC's and usability testing on a consumer electronics devices are COMPLETELY unrelated
Usability testing is something done very rarely (probably only a handful of times) during the development of the product, basically getting people to use the device and give some feedback
Electrical test is something done to EVERY die (usually multiple times per die) that gets shipped out of a wafer fab, is usually quite thorough, and is done by machines costing anywhere from $100k on up
Eliminating test (or even going to only testing on a sample basis) would allow a very large cut in the manufacturing costs of IC's, considering you could also eliminate burnin, and a significant chunk of your equipment overhead - DRAM chips are simple enough you could probably do it - it'd probably even be possible to have the savings from eliminating test be greater than the expense of the returns
It has to do with how many gate stages the processor had in each pipeline stage - if the worst case stage has 14 gate delays, then the processor would theoretically be able to run at about 600/14GHz.
HOWEVER, there is no way the chip would actually get that close - this 604GHz oscillator is probably a single ring on a chip containing many oscillators. The average speed could easily be more in the 400-500GHz range.
Also, these transistors are BJTs, which are useless in very large xtor count chips due to their much higher current density, so it's unlikely you'll see a computer made out of them ever (processors have been almost exclusively CMOS for over 20 years)
If you go and buy a handful of 5% resistors, you will find ~0 that are within 2% of their value - if you buy 2%, none w/in 1%, etc...
Manufacturers are VERY aware they can charge a larger premium for better parts
Would you really want to fly into airspace where the servers in the air traffic control centers are run by processors that are good enough...
Or bank with a bank whose data center processors are good enough...
While we're at it, let's get rid of process/product qualification - this could save thousands of parts for each digital chip out there. We could also get rid of burn in and any kind of stress testing, since we obviously wouldn't care if we had any parts out there that were 'walking wounded'
Hell, we could even get rid of any kind of functional test...
Seriously it's already difficult enough to test and get reasonable levels of coverage on current processors already - if the chips are going to be used in ANY kind of mission critical applications (or even in my home PC) I want a chip that is as good as current test processes can guarantee it to be.
How irritating would it be to have a processor with a hard fault in that caused errors on excercising a certain block of logic.
People have already mentioned that quite a few products already use defective ram chips, and engineers desigining various products are aware that parts like these are available, and are (or should) be using them where ever possible to reduce cost.
It might be interesting to go through some analysis to see if the increase in DPPM (and subsequent increase in returns) would be low enough to not completely cancel out the gains you would get from increased yields.
Here's an article saying handwritten returns are more likely to be audited.
u dit/
i don't have one ciding the 10X number (I read the article 2-3 years ago, sorry)
http://money.cnn.com/2004/02/27/pf/taxes/avoidana
which is exactly the reason hand-written returns are ~10x more likely to be audited
The school I attended had a 3-4 people that could check out projectors/laptops/etc.
The first was sys admin for the department's computers. The others were the 2-3 students that ran the stockroom (EE, so all the students needed to check out scopes/supplies for their labs).
Even if your department doesn't already have students working in this capacity, if the department you work in has >120 faculty, it should not be difficult to justify a $5/hour student assistant.
For checking things out, it was a simple checkout sheet that the person checking things out would put their name/id number on, and they and the person manning the stockroom would sign. The solution may not be high-tech, but it does have the benefit of helping out a few students with some extra money (which they always need), and keeping you more involved with students (which is the kind of thing that will improve the chances the students recommending your school, assuming you are fairly nice to them)
While there may be separate clock domains per core, the clock multiplier circuitry may be contained in the arbitration logic, as this could probably improve the arbiter's efficiency.
I think that the design specifics of the arbitration logic (specifically, what speed it communicates with the cores, and how core-to-core communication is handled) is the determining factor in how feasible multi-frequency dual core circuits are.
The main problem with this is that the processors share a clock tree and arbitration logic - if the clock multiplier is contained in the arbitration logic, then having one core at one speed and another at a different speed would be impossible.
If the clock multiplier is contained separately in each core, it would be possible - however, having different clock ratios on each core would considerably complicate the arbitration logic, since it would have to deal with different setup and hold timings when sending data to one core vs. the other - this would probably greatly increase your chances of inducing a processor error.
Trying to do this could also require a great deal more design difference between the two cores, which might cause many problems. It also would make it much more difficult to sell single core versions of dual core chips (i.e. one core fails, the other core is good - blow a few fuses to get the chip to look like a single core chip, and sell at as a single core)
The power increase between a single core processor and dual core processor is probably less than you think: I would not be surprised if it is in the 20% range on average.
Simply running the clock (and not performing any operations) on most processors will draw ~60-70% of the parts max power, which suggests that the loading on the part determines how much of that extra 30-40% is being dissipated.
Working under this assumption, worst case, a dual core processor would draw 40% more power than a single core processor, while effectively doubling your maximum throughput.
As for cost, I would be surprised if these processors debuted at more than 50% more than their single core cousins, and the prices would probably drop fairly rapidly
Sun has UltraSPARC, Opteron and Xeon models IBM has POWER and Opteron models HP has Itanium, Xeon and Opteron models And it only took me 5 minutes to look at the specs of all the above models. Just look at the entry level servers or high end workstations on most manufacturers web sites...
Some clarification for you. Oh, your next to the last sentence (whole eV thing) is pretty much completely wrong... The IR drop you refer to across serial lines (global interconnects) is generally taken care of through the reuse of repeaters in long wires - they increase speed, and improve operating margins. The problem with unpredictable logic in new/extremely small transistors: 1. new transistors run at much lower voltages than older chips - 90nm trahsistors run at ~1V, 65nm will run in the 800-900mV range (these are the nominal voltages these parts use in systems, not actual vmins) 2. every reduction in operating voltage reduces the separation between vil/vih and vol/voh in the various circuit subblocks 3. increases in operating speed will lead to more noise on power busses So, 30 years ago, when parts ran on 5V, in the low MHz range, vol/voh would generally be in the 0.5/4.5V range, with vil/vih in the 2/3V range, you had >1V noise margin, with very little noise on the power busses. For modern processors, the noise margin is generally in the 100mV range, and if you look at what the voltage looks like on a power bus, dips or spikes that are on the order of magnitude of the noise margin are not unusual at all. There are tricks, such as not using stacked logic, etc that can help improve your operating margins, but most of these come with a performance hit. All Intel's excess capacity in their fabs probably doesn't have much to do with this guys research, also... And to make you feel better, you're not just paranoid, you have a terrible understanding of device physics/operation/modern electronics
Cell would probably not make the best server processor. Although its performance has been tweaked to be able to vector calculations EXTREMELY quickly, it looks like the only thing it has in its favor as a server processor is the extremely high memory BW. A better example of a server processor designed under the same type of methodology (lots of little parts doing things in parallel) would probably be Sun's Niagara - similar design concept to cell, but teaked to perform server operations, not floating point vector calculations, very quickly.
234M transistors is not the problem. As the grandparent pointed out, the primary problem is the die size - a secondary problem could be the odd floorplan (long and narrow), as this could cause greater cross die process variation Depending on defect density, 221mm^2 die could limit cell to somewhere near 30% yields - even with 300mm wafers, you'll still only be yielding 60-80 functional die per wafer - by comparison, a Pentium/Opteron, which is ~1/2 the size could yield 300-400 die per wafer. This chip will most likely be fairly difficult to fab - at the least, manufacturing costs will probably be at least 4x what they would be for other mainstream processors
Since the there is no structural change to the semiconductor during the photovoltaic process, the lifetime of the parts should basically be limitless - the thing that I would worry about more than the cell failing is that the installation method would lend itself to wear-our
since 90nm fab times should be on the order of 4-5 months, I'd assume Intel is running these in fairly high volumes (and has been for a month or so)