The article _said_ it wasn't going to be released for a few days. I believe the designer is taking finals this week. Cut him a little slack. You can wait a few extra days.
In hardware it's a little more important that shipping code be bug free.
I've heard that there is an version of windows NT for Alphas, which are 64 bit. However, there was a story on/. several months ago about Microsoft stopping development of 64 bit stuff. I don't know what this all means.
Re:I'd sue, if I were an Intel engineer.
on
News on Pentium IV
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· Score: 1
>>Does anyone else think it's just wrong to have 5 separate chips based on the same cores...
I don't think that that is caused by "Marketing Dodos". I think that the following three factors are responsible:
1. Processor cores have increased in transistor count by several orders of magnitude. While improvements in manufacturing technologies have made this possible, improvements in design technologies and methodolgies have not kept pace. It takes much longer to design a modern processor that it took to design a processor 10 years ago.
2. Computers are used more now that they were 10 years ago. The market is larger, so more money is spent on the design stage. Since doubling the number of people on a design team usually doesn't help past a certain size, the additional money is spent having multiple design teams. The Pentium IV core, P7, was designed by the team the made the the Pentium core, P5, not the team that made the PPro core, P6. (I'm not completely sure on that)
3. Intel has a monopoly, and Intel must fight to maintain it. The biggest factor helping them is the cost of entering the market. Intel does everything it can to maximize that cost. Intel does this by choosing chip design strategies that maximize complexity (and thus design costs, which Intel can afford and their competitors can't). Since Intel competitors must produce chips that run programs optimized for Intel chips, they can't depart very far from Intels architecture. That is why Intels IA64 Merced is trying to find more instruction level parrallelism instead of the multi-core or multithreading core approaches Sun and Alpha and other non-x86 compatible chip designers are pursueing.
What exactly does "mapped" mean? Does that mean they know what all the bases are in the average human? My understanding was than many bases varied a lot between individuals and ethnicities and what-not. Does this imply any knowledge of the pattern of such variations? Does it imply any knowledge of the function of the encoded proteins?
A biology class I took said that human DNA was 96% junk (not protein encoding).
Was this biology class wrong?
Is there an enormous devation in percentage of junk from chromosone to chromosone?
Or did a Douglas Adams fan do some subtle hack on the results?
>> As for the depth of human color perception I have to plead ignorance. But why would everyone be making such a big deal about 32bit color if no one could see the difference?
Writting up some quick programs to display simple scenes, my eyes can easily tell the difference between two adjacent colors at 16 bpp, but have a hard time at 18 bpp. I can't consistently tell the difference at 21 bpp.
Of course, if you're using some technique like random dithering then you can trade off screen resolution for color depth... at 1600x1200 randomly dithered 15 bpp looks about as close as undithered 18 bpp.
The smallest unit of valid data in public key algorithms is directly proportional to the key size.
In other-words, to encrypt one bit at a time is impossible unless you use _extremely_ small keys, or your willing to expand your data _a lot_.
Of course you can send out your encrypted packets one bit at a time, but that's not a true streaming cipher, and you won't be able to reconstruct any part of such a packet until you have the entire packet. And, as everyone has pointed out already, you can use public encryption to securely exchange cipher keys.
I keep a text file around that contains vague descriptions of all my passwords. Things I can remember them from that wouldn't be very usefull to anyone else, like "a *judicious* injection of ____ ; a mountain" Unfortunately, I don't have a PDA, so I often don't have access to that file... so for some of my less important accounts I share passwords and/or use simple permutations to make things easier to remember. Unsecure, but for a hotmail account who cares?
Most posts so far are either complaints about the interview or questions so insulting it would make/. look bad to ask them. This post is a list of the most serious questions asked so far, followed by a few of my own (I know nothing about security):
by NME
There are a lot of security information sites on the net, of varying quality. Why should I read AntiOnline? I suppose I'm wondering what you feel that you're adding/offering that makes you unique.
by mochaone
Why are you hated so damn much and do you care?
by Rabbins
How do you define your current role? -and- How do you see your role in the future?
by platypus
What were your most important works in the security related area, ie. posting to relevant(!) mailing lists (let's say bugtraq, ntbugtraq, RISK), articles in magazines, papers or lectures?
by Kintanon
What is the basis for your attacks on security experts such as Attrition.org?
by imac.usr
What's your opinion on the security of wireless standards like 802.11? Are devices like the AirPort secure enough, and if so, for how long?
Additional question of my own:
/.s attitude towards you has been universally negative, and your attitude towards slashdot has also been extemely negative (I seem to recall some claims about being a den of hackers, and blocking viewers from/.). So why are you willing to be interviewed, and why do you think/. is willing to do the interview?
Why are you so law-suit happy with your detractors and rivals? A lot of people have critized you for this, from fellow security sites to Forbes magazine. How does it help you (if it does)? If it doesn't help you then why do you do it?
What that means is that running your microwave will generate noise in your processor. Fortunately your processor is small enough this won't be a signifigant issue... but when the memory bus starts reaching frequencies where it can hear your household appliances... hardware debugging will get fun!
Imaging going through your kitchen and turning off all the appliances so that your overclocked system will be stable enough for running Quake 3!
>> 1) If I'm not mistaken, the L1 cache in the PIII is at least 64k (32+32). According to the screenshot (which can easily be faked) it's 16 and 16.
The L1 cache on a PIII is identical to the L1 cache on a PII, 16k+16k.
>> 2) The L2 cache of the 733 PIII is 256 kb ONBOARD! Why is this important? Well first of all, there is nothing listed under the L2 setting. Did they have to DISABLE THE L2 CACHE to get it to work? If this is not the case, then why isnt' the L2 amount shown? If it was indeed disabled, then it's extremely doubtful that those benchmarks are reliable.
The L2 cache on CuMine is new and (slightly) different. Many programs and some BIOSes that were released before the CopperMine don't know about the new L2 and missidentify it. It's no big deal so Don't Panic.
Laser vision is still under the influence of Amdals Law (spelling?). It's improving geometrically. Considering that it's wetware not hardware, I'd wait for things to slow down a little.
I've noticed that people tend to give cache speeds in Mhrz, which is somewhat missleading, as different caches have different numbers of cycles per issue and cycles of latency. Here's my attempt to educate people on caches.
Pipelined internal caches have issue times at least 8 time as fast as the sort of external caches present on the K7 and pII/pIII. Internal L1 caches tend to have latencies either 2 (K6)to 3 (K7 & Pii/Piii) core cycles long. Internal L2 caches tend to have latencies from 6 to 12 (core) cycles long. External L2 caches tend to have latencies from 8 to 30 core cyles long (about 20 on both the K7 and Pii/Piii, although it will be slightly worse on the 750 mhrz k7).
The CuMines cache should be about the same overall speed as the K7s cache. It's FPU will still be a ways behind though. The CuMine is a lot cheaper to manufacture.
I don't believe that AMD produces their own cache chips. The limiting factor on AMDs external cache speed is price, I think. Intel produces some, but not all of their own cache chips.
I am a junior in Computer Science. A typical school (judging from the two I've been to, one a reputable engineering school, the other a disreputable school) requires:
Personally, I think that this is a reasonable mix (although I could do without the Theory class:). I would like to see better support to the "statistically abnormal" students though. The real problem with CS is that some people go into CS without any background while others have been programming since they were three. Of course this problem isn't specific to CS, but I think it's slightly worse in CS than in most other fields. An alternate degree that requires fewer credits if they're all in senior-level & graduate courses would really help some people.
Specific languages aren't very important, althought the paradigms they're members of can be. I have very little experience programming professionally... but both projects I was paid for were in languages that I didn't know.
There are 2 REAL problems: 1. courses are taught to the lowest common denominator, and 2. administrations purpose for existance is to make things hard on me. Both of those problems apply to all majors, or I'd consider switching.
P.S. Is it my imagination, of is school quality inversely proportion to the performance of the school football team?
Integrate those processors onto one chip, convert the translation stage over to hardware and integrate that too, and remove the redundant parts. What you end up with is a modern super-scalar decoding processor -- a lot like a Pentium II/III.
Some company makes a single-chip collection of 64k 1-bit microprocessors. I'm pretty sure those were being sold back when 0.35 micron was the standard, so these days a million ought to be a reasonable target.
Some state is using an artificial neural network to read zip-codes off envelopes. Also, some credit card companies use artificial neural networks in evaluating credit histories n' stuff.
The military likes to use neural networks all over the place. I don't know of any other applications actually at the commercial stage.
Of course non-artificial neural networks are used for lots of good stuff:)
Slashdot Mirror
Of course, simulated logic isn't your best place to do RC5 cracking, even if it is hardware simulated (programable logic).
And... /. did not acquire VA Linux. VA Linux acquired /. There is a BIG difference.
In hardware it's a little more important that shipping code be bug free.
I've heard that there is an version of windows NT for Alphas, which are 64 bit. However, there was a story on /. several months ago about Microsoft stopping development of 64 bit stuff. I don't know what this all means.
I don't think that that is caused by "Marketing Dodos". I think that the following three factors are responsible:
1. Processor cores have increased in transistor count by several orders of magnitude. While improvements in manufacturing technologies have made this possible, improvements in design technologies and methodolgies have not kept pace. It takes much longer to design a modern processor that it took to design a processor 10 years ago.
2. Computers are used more now that they were 10 years ago. The market is larger, so more money is spent on the design stage. Since doubling the number of people on a design team usually doesn't help past a certain size, the additional money is spent having multiple design teams. The Pentium IV core, P7, was designed by the team the made the the Pentium core, P5, not the team that made the PPro core, P6. (I'm not completely sure on that)
3. Intel has a monopoly, and Intel must fight to maintain it. The biggest factor helping them is the cost of entering the market. Intel does everything it can to maximize that cost. Intel does this by choosing chip design strategies that maximize complexity (and thus design costs, which Intel can afford and their competitors can't). Since Intel competitors must produce chips that run programs optimized for Intel chips, they can't depart very far from Intels architecture. That is why Intels IA64 Merced is trying to find more instruction level parrallelism instead of the multi-core or multithreading core approaches Sun and Alpha and other non-x86 compatible chip designers are pursueing.
A biology class I took said that human DNA was 96% junk (not protein encoding).
Was this biology class wrong?
Is there an enormous devation in percentage of junk from chromosone to chromosone?
Or did a Douglas Adams fan do some subtle hack on the results?
In the first page or two was a line about pouring "many kilowatts of prayer into the Heavens".
Writting up some quick programs to display simple scenes, my eyes can easily tell the difference between two adjacent colors at 16 bpp, but have a hard time at 18 bpp. I can't consistently tell the difference at 21 bpp.
Of course, if you're using some technique like random dithering then you can trade off screen resolution for color depth... at 1600x1200 randomly dithered 15 bpp looks about as close as undithered 18 bpp.
In other-words, to encrypt one bit at a time is impossible unless you use _extremely_ small keys, or your willing to expand your data _a lot_.
Of course you can send out your encrypted packets one bit at a time, but that's not a true streaming cipher, and you won't be able to reconstruct any part of such a packet until you have the entire packet. And, as everyone has pointed out already, you can use public encryption to securely exchange cipher keys.
Um, I thought that Mao Zetsung was the guy in charge of the Tiananmen Square massacre?
I keep a text file around that contains vague descriptions of all my passwords. Things I can remember them from that wouldn't be very usefull to anyone else, like "a *judicious* injection of ____ ; a mountain" Unfortunately, I don't have a PDA, so I often don't have access to that file... so for some of my less important accounts I share passwords and/or use simple permutations to make things easier to remember. Unsecure, but for a hotmail account who cares?
by NME
There are a lot of security information sites on the net, of varying quality. Why should I read AntiOnline? I suppose I'm wondering what you feel that you're adding/offering that makes you unique.
by mochaone
Why are you hated so damn much and do you care?
by Rabbins
How do you define your current role? -and- How do you see your role in the future?
by platypus
What were your most important works in the security related area, ie. posting to relevant(!) mailing lists (let's say bugtraq, ntbugtraq, RISK), articles in magazines, papers or lectures?
by Kintanon
What is the basis for your attacks on security experts such as Attrition.org?
by imac.usr
What's your opinion on the security of wireless standards like 802.11? Are devices like the AirPort secure enough, and if so, for how long?
Additional question of my own:
Why are you so law-suit happy with your detractors and rivals? A lot of people have critized you for this, from fellow security sites to Forbes magazine. How does it help you (if it does)? If it doesn't help you then why do you do it?
Imaging going through your kitchen and turning off all the appliances so that your overclocked system will be stable enough for running Quake 3!
The L1 cache on a PIII is identical to the L1 cache on a PII, 16k+16k.
>> 2) The L2 cache of the 733 PIII is 256 kb ONBOARD! Why is this important? Well first of all, there is nothing listed under the L2 setting. Did they have to DISABLE THE L2 CACHE to get it to work? If this is not the case, then why isnt' the L2 amount shown? If it was indeed disabled, then it's extremely doubtful that those benchmarks are reliable.
The L2 cache on CuMine is new and (slightly) different. Many programs and some BIOSes that were released before the CopperMine don't know about the new L2 and missidentify it. It's no big deal so Don't Panic.
Laser vision is still under the influence of Amdals Law (spelling?). It's improving geometrically. Considering that it's wetware not hardware, I'd wait for things to slow down a little.
You didn't notice the "stuff that matters" part?
Pipelined internal caches have issue times at least 8 time as fast as the sort of external caches present on the K7 and pII/pIII. Internal L1 caches tend to have latencies either 2 (K6)to 3 (K7 & Pii/Piii) core cycles long. Internal L2 caches tend to have latencies from 6 to 12 (core) cycles long. External L2 caches tend to have latencies from 8 to 30 core cyles long (about 20 on both the K7 and Pii/Piii, although it will be slightly worse on the 750 mhrz k7).
The CuMines cache should be about the same overall speed as the K7s cache. It's FPU will still be a ways behind though. The CuMine is a lot cheaper to manufacture.
I don't believe that AMD produces their own cache chips. The limiting factor on AMDs external cache speed is price, I think. Intel produces some, but not all of their own cache chips.
'cause marketing hasn't figured out a real name yet. No conspiracy there. Except on AMD's "SledgeHammer".
However it is that you pronounce that, there will be a name-space collision with something important. Because of that, it's not going to stick.
2 courses in: C/C++ (intro to programming)
3 courses in: Data Structures / Algorithms
2 courses in: Assembly / Embedded / Op. Sys.
2 courses in: HLLs (e.g. lisp) & alternate paradigms
1 course in: Theory
1 course in: Software Engineering (CS meets real-world)
3 courses in: Other (e.g. unix, internet, databases, network architecture, AI, buzzword-of-the-month, parallel processing, etc.)
Personally, I think that this is a reasonable mix (although I could do without the Theory class:). I would like to see better support to the "statistically abnormal" students though. The real problem with CS is that some people go into CS without any background while others have been programming since they were three. Of course this problem isn't specific to CS, but I think it's slightly worse in CS than in most other fields. An alternate degree that requires fewer credits if they're all in senior-level & graduate courses would really help some people.
Specific languages aren't very important, althought the paradigms they're members of can be. I have very little experience programming professionally... but both projects I was paid for were in languages that I didn't know.
There are 2 REAL problems: 1. courses are taught to the lowest common denominator, and 2. administrations purpose for existance is to make things hard on me. Both of those problems apply to all majors, or I'd consider switching.
P.S. Is it my imagination, of is school quality inversely proportion to the performance of the school football team?
Public Education System Ministry of Truth
Integrate those processors onto one chip, convert the translation stage over to hardware and integrate that too, and remove the redundant parts. What you end up with is a modern super-scalar decoding processor -- a lot like a Pentium II/III.
Some company makes a single-chip collection of 64k 1-bit microprocessors. I'm pretty sure those were being sold back when 0.35 micron was the standard, so these days a million ought to be a reasonable target.
The military likes to use neural networks all over the place. I don't know of any other applications actually at the commercial stage.
Of course non-artificial neural networks are used for lots of good stuff :)