Or you could read the article and realize that the place the facebook lawyers are searching for their evidence is on Ceglia's computer, which he has provided due to a court order.
lol. google was a late entrant into the search provider space. there were at least a dozen others already by the time the came along and finally taught everyone how too make money off of internet advertising...;)
And in other news...well traveled street corners are magnets for pan handlers. Details at 11!!
Now we know where to look for these people online. Who knew?
Of course, this doesn't mean that facebook doesn't have other users. I mean...does the fact that a pan handlers hangs out near the place that you walk by every day to pick up a cup of coffee mean that every one else you see walking by that spot is also a pan handler?
You are correct that discrete graphics isn't going anywhere, but your argument for why gaming performance is so important in integrated graphics contradicts that. I think the same argument applies there: the thing that people riding on Intel for the performance of their integrated gpu's and who are predicting that AMD will spank them in the integrated gpu space are forgetting is: 1) heat, 2) power, and 3) bw. When you integrate the GPU with the CPU you have to share the heat, power, and bw budget with the CPU.
It will be interesting to see what AMD comes up with when they have an integrated GPU, but frankly, the fact that it has taken them so long to get to that step since acquiring ATI tells me that they are likely finding it rather difficult to do well. I will be very happy if they somehow come up with something that can "spank" Intel in the integrated gpu space, but I wouldn't be surprised to find that they had to cut out so many features to get it into the power/bw budget that it ends up being...about the same.
Other point worth keeping in mind is that a huge portion of the market where intel's gpus do reign is the business desktop space where the only thing the machine needs to do is run web browsers, email apps, and office applications. Blue ray decoding? In that space, it doesn't matter.
even several meters across, let's say 10 for simplicity, is 100 square feet of area illuminated at a time. If you had a 1000 square foot area to send the warning to, that means if you want to get the warning out in say 5 minutes, you would be able to send your signal to each location in your danger zone for 120 seconds. That is slow enough to give everyone a chance to see it, assuming that everyone in the warning zone has the habit of looking up at the sky in the direction of the satellite at least once every 120 seconds (not bloody likely).
In reality though 1000 square feet is actually a rather small. The way Tsunami's propogate out in a circular pattern from the point of the shock, 10000 square feet of area is more likely, in which case to get the warning out in 5 minutes to the entire area with a 100 square foot beam, you would be able to illuminate each area for only 0.5 seconds. That obviously isn't going to work.
That all sets aside the fact that it won't work when the weather is poor since visual light doesn't penetrate cloud cover, and also sets aside the other point that a warning system that relies on visual queues is utterly useless if people are indoors or asleep.
i was saying that because any other way of implementing would render the thing so inneffictive that it would end up warning fewer people than a 16th centery town crier. Moving a pencil beam across a 1000+ square mile area (100 miles of coast line up to 10 miles inland) slow enough for people to see it means the tsunami is going to hit land before you even had time to sweep once across the entire area. Moving it fast enough that it can sweep across the whole of the effected area in short enough time and it will be flipping by in front of people so fast that their conscious mind, even if they were looking right at it, wouldn't register that it had even occurred.
exactly, if it is a pencil beam the chance that anyone will see it, assuming it is bright enough to be seen at all, is essentially zero. Which would make it the most expensive and most ineffective early warning system ever.
you seriously think that the battery used to power an electric car has enough energy to illuminate 100s of miles of coastline from orbit? I don't think you have a clear sense of how much energy it takes to get a beam of light to travel such a large distance.
And even if you had a satellite with enough energy, what is your warning system going to do when it is cloudy in the area where the tsunami is going to hit?
and even if you solved that problem too somehow, what if the people you are warning are asleep because it is night time? how are they going to see your warning system? what if they are awake but inside a building?
vastly more effective would be the systems that are already in place: a siren so loud that it is essentially impossible for people not to hear it unless they are deaf.
I am thinking the same. Now that they've made the decision that their new business model is to sell user data, they are going to buffer and protect what they have if they weren't doing so previously.
The problem you are eluding to as I see it is not that the memory architecture does not serve the instruction sets. The problem is that latencies from the core to memory are very long and writing code that is tolerant of those kinds of latencies is either impossible (or impossibly difficult) to do for the majority of typical (desktop in particular) applications. Any code that has a lot of branches (think: any software you write that has a lot of "if" or "switch" statements) invariable ends up reaching the point where the processor cannot perform any more useful work toward running code until it evaluates the condition of the logical expression. And eventually, unless your code fits in the processor's cache, that means stalling and waiting on memory to retrieve some data.
Code needs to be very deeply pipelined to tolerate those kinds of latencies, for some applications that is easy to do, for some it is possible, but very difficult, for many, it simply isn't possible.
Real problem there is that processing speeds in the core have been increasing very fast over the last few decades, and memory technology simply isn't improving at the same rate.
If you look back to the early days (original Pentium was the last time this was true I believe) the speed of the processor and the depth of the processor pipelines actually did match the latency to memory and the cores were slow enough that they were able to absorb a memory latency hit without incurring long multi-cycle stalls. But now the cores are just too fast. Now, if your code needs to wait for a result from memory, its going to wait for a large number of cycles because the cores are so much faster.
You explain away the fact that PowerPC never performed any better than the corresponding x86 counterparts as manufacturing differences yet fail to offer an explanation for why those two are related. Economies of scale mean you can make more chips cheaper. If you think that mass producing something magically makes an inferior product perform better then a product that isn't mass produced please explain how. THere isn't any industry I'm aware of where that happens. You might be trying to argue that PowerPC failed because it didn't have economies of scale and would likely be right. Nonetheless, if RISC was really so much better, it would have been performing better back when Apple was using it and it basically, didn't.
No point in arguing about whether Itanium is RISC or not. It has some EPIC features, but it still uses a reduced instruction set architecture at its core. If you chose to not call that RISC, I am curious what you think RISC means.
People have been arguing as you are that x86's bloated CISC instruction set was inferior to a cleaner RISC architecture for the last 20+ years. Nobody has ever proven that the elegance of the instruction set matters with hard data though.
What evidence we do have goes against that argument.
Apple machines used a cleaner RISC architecture for a while in the desktop space. They never performed any better than equivalent x86 based machines, and in the end Apple abandoned RISC and moved to x86.
Intel came out with a cleaner RISC based instruction set that that the Itanium line uses. If x86 was really as bad as you say, Itanium chips would be running circles around the x86 based server chips provided by both Intel and AMD. That isn't happenning.
Another thing you might not realize: all x86 chips, from both Intel and AMD, once you strip them down to the micro-code level ARE RISC designs under the hood. RISC is the cleaner way to implement the micro code and the underlying execution architecture, but all historical data seems to indicate that the question of whether the instruction set that sits on top of that is RISC or CISC is irrelevant to performance. It is arguably more complicated to design a CISC based chip like x86, but that clearly has not been an obstacle to competing with RISC on the performance end for Intel or AMD engineers.
if you insist on comparing the products that Intel/AMD release into the desktop space with the products that they release into the server space 6-12 months later then yeah. But you are comparing apples and oranges here...
How long before game makers right code that supports this new chip? Answer: a very long time. This is a xeon part designed for large database servers. It isn't intended for desktops. Some fool might try to put it into a gaming rig eventually, but that person...really will be worth of the title "fool". That would be like putting an engine designed for a freight train into a ferrari.
When will other software vendors have code that supports this many cores? Answer: they already do. the companies that write database management software for very large backend database servers already have code that scales to very large core counts. As do many HPC software vendors. That is the intended market segment for this chip and that market segment has lots of software that is ready to burn through all those cores now.
he didn't say that the earthquake was caused by a pact with the devil explicitly.
he did say that he believes the nation is suffering because they made a pact with the devil.
more importantly, in that interview in which the discussion was haiti he spent most of the time talking with the pact with the devil and no time at all talking about the natural disaster. he clearly thinks this pact is very important, and more relevant to what is happenning in that country right now than the earthquake itself.
that fact alone, in my mind, is proof positive that mr. robertson is a closed minded fool. if he possessed the ability to see beyond his narrow world view he would realize that a time like this is NOT the time to be pointing fingers and making accusations, however indirect they may be.
while I agree that the school completely over reacted, there was no science fair involved. this was a science project the kid was working on at home that he brought to school just to show his classmates. the article makes no mention of it being a class project or part of any science fair.
to add to my own comment. this problem with manufacturing costs is surely the reason AMD has spun off their fabs into a separate company. It will be interesting to see if they can be more successful now that they do not have to directly maintain their own fabs.
Back in the Athlon days, AMD lacked the manufacturing capacity to control 50% of the market. If all their fabs were running at 100% at that time, and every chip they made was being sold, the total number of chips sold wouldn't have been anywhere near 50% of the market.
Intel doesn't actually have to do anything illegal or sleezy to stay ahead on market share. The fact is that no matter how bad their chips might suck the big manufacturers like Dell et. al. will still have to use Intel chips in the majority of the machines they sell because AMD isn't physically capable of making enough.
That is the fine line AMD has to tread. They have to constantly stay ahead in performance while slowly growing their market share and then use the profits to invest in increased manufacturing capacity. It takes years to build a new plant afterall, and if you build too many too quickly, you'll end up with manufacturing capacity you cannot use and you lose tons of money because maintaining a microprocessor manufacturing plant is enormously expensive.
It's about programmers lacking basic knowledge (or at least failing to take account) of how a computer works internally. well written and well validated software doesn't have problems like this.
You need to keep in mind the reason that CPUs are not designed the way that GPUs are designed. GPUs are very good at easily parallelizable repetitive computations. GPU performance grinds to a snails pace as soon as you have to take a branch.
Unless you are writing the kind of code in which if statements are nearly non-existent, you are not likely to find programming for a GPU-style pipeline to be very palatable.
You do need to keep in mind one of the primary reasons CPUs are designed the way that GPUs are designed. GPUs are very good at doing massively parallel repetitive computations like what you need to do when processing an image for a display or like some small segments of the HPC market regularly do. But GPU performance grinds to a halt as soon as your code needs to take a branch.
Unless you write the kind of code in which if statements are nearly non-existent, you are likely to find programming for a GPU-style architecture to be unhelpful.
agreed. which suggests the companies problem, if there really is one, is that they are not buying the machines that best fit the needs of their software stack.
You are probably right. It'd be nice if he could say what precisely he thinks they are lying about. I mean, I know marketing is always exaggerated to some degree, but as rule, it seems to me that AMD and Intel processors do generally perform the way the companies claim they will if you look past the hype at the technical details.
lenovo is really just trying to motivate me to stop being lazy and finally uninstall all the software they pre-installed on the laptop I purchased earlier this year.;)
I'm bemused that he implies the problems with his servers are due to Intel and AMD no delivering with their chips, yet at the same time he admires google for how good a job they do in building out their machines.
he must be aware that google uses Intel and AMD chips.
Slashdot Mirror
Or you could read the article and realize that the place the facebook lawyers are searching for their evidence is on Ceglia's computer, which he has provided due to a court order.
lol. google was a late entrant into the search provider space. there were at least a dozen others already by the time the came along and finally taught everyone how too make money off of internet advertising... ;)
And in other news...well traveled street corners are magnets for pan handlers. Details at 11!!
Now we know where to look for these people online. Who knew?
Of course, this doesn't mean that facebook doesn't have other users. I mean...does the fact that a pan handlers hangs out near the place that you walk by every day to pick up a cup of coffee mean that every one else you see walking by that spot is also a pan handler?
I suppose it might. :p (j/k)
You are correct that discrete graphics isn't going anywhere, but your argument for why gaming performance is so important in integrated graphics contradicts that. I think the same argument applies there: the thing that people riding on Intel for the performance of their integrated gpu's and who are predicting that AMD will spank them in the integrated gpu space are forgetting is: 1) heat, 2) power, and 3) bw. When you integrate the GPU with the CPU you have to share the heat, power, and bw budget with the CPU.
It will be interesting to see what AMD comes up with when they have an integrated GPU, but frankly, the fact that it has taken them so long to get to that step since acquiring ATI tells me that they are likely finding it rather difficult to do well. I will be very happy if they somehow come up with something that can "spank" Intel in the integrated gpu space, but I wouldn't be surprised to find that they had to cut out so many features to get it into the power/bw budget that it ends up being...about the same.
Other point worth keeping in mind is that a huge portion of the market where intel's gpus do reign is the business desktop space where the only thing the machine needs to do is run web browsers, email apps, and office applications. Blue ray decoding? In that space, it doesn't matter.
even several meters across, let's say 10 for simplicity, is 100 square feet of area illuminated at a time. If you had a 1000 square foot area to send the warning to, that means if you want to get the warning out in say 5 minutes, you would be able to send your signal to each location in your danger zone for 120 seconds. That is slow enough to give everyone a chance to see it, assuming that everyone in the warning zone has the habit of looking up at the sky in the direction of the satellite at least once every 120 seconds (not bloody likely).
In reality though 1000 square feet is actually a rather small. The way Tsunami's propogate out in a circular pattern from the point of the shock, 10000 square feet of area is more likely, in which case to get the warning out in 5 minutes to the entire area with a 100 square foot beam, you would be able to illuminate each area for only 0.5 seconds. That obviously isn't going to work.
That all sets aside the fact that it won't work when the weather is poor since visual light doesn't penetrate cloud cover, and also sets aside the other point that a warning system that relies on visual queues is utterly useless if people are indoors or asleep.
i was saying that because any other way of implementing would render the thing so inneffictive that it would end up warning fewer people than a 16th centery town crier. Moving a pencil beam across a 1000+ square mile area (100 miles of coast line up to 10 miles inland) slow enough for people to see it means the tsunami is going to hit land before you even had time to sweep once across the entire area. Moving it fast enough that it can sweep across the whole of the effected area in short enough time and it will be flipping by in front of people so fast that their conscious mind, even if they were looking right at it, wouldn't register that it had even occurred.
exactly, if it is a pencil beam the chance that anyone will see it, assuming it is bright enough to be seen at all, is essentially zero. Which would make it the most expensive and most ineffective early warning system ever.
you seriously think that the battery used to power an electric car has enough energy to illuminate 100s of miles of coastline from orbit? I don't think you have a clear sense of how much energy it takes to get a beam of light to travel such a large distance.
And even if you had a satellite with enough energy, what is your warning system going to do when it is cloudy in the area where the tsunami is going to hit?
and even if you solved that problem too somehow, what if the people you are warning are asleep because it is night time? how are they going to see your warning system? what if they are awake but inside a building?
vastly more effective would be the systems that are already in place: a siren so loud that it is essentially impossible for people not to hear it unless they are deaf.
I am thinking the same. Now that they've made the decision that their new business model is to sell user data, they are going to buffer and protect what they have if they weren't doing so previously.
The problem you are eluding to as I see it is not that the memory architecture does not serve the instruction sets. The problem is that latencies from the core to memory are very long and writing code that is tolerant of those kinds of latencies is either impossible (or impossibly difficult) to do for the majority of typical (desktop in particular) applications. Any code that has a lot of branches (think: any software you write that has a lot of "if" or "switch" statements) invariable ends up reaching the point where the processor cannot perform any more useful work toward running code until it evaluates the condition of the logical expression. And eventually, unless your code fits in the processor's cache, that means stalling and waiting on memory to retrieve some data.
Code needs to be very deeply pipelined to tolerate those kinds of latencies, for some applications that is easy to do, for some it is possible, but very difficult, for many, it simply isn't possible.
Real problem there is that processing speeds in the core have been increasing very fast over the last few decades, and memory technology simply isn't improving at the same rate.
If you look back to the early days (original Pentium was the last time this was true I believe) the speed of the processor and the depth of the processor pipelines actually did match the latency to memory and the cores were slow enough that they were able to absorb a memory latency hit without incurring long multi-cycle stalls. But now the cores are just too fast. Now, if your code needs to wait for a result from memory, its going to wait for a large number of cycles because the cores are so much faster.
You explain away the fact that PowerPC never performed any better than the corresponding x86 counterparts as manufacturing differences yet fail to offer an explanation for why those two are related. Economies of scale mean you can make more chips cheaper. If you think that mass producing something magically makes an inferior product perform better then a product that isn't mass produced please explain how. THere isn't any industry I'm aware of where that happens. You might be trying to argue that PowerPC failed because it didn't have economies of scale and would likely be right. Nonetheless, if RISC was really so much better, it would have been performing better back when Apple was using it and it basically, didn't. No point in arguing about whether Itanium is RISC or not. It has some EPIC features, but it still uses a reduced instruction set architecture at its core. If you chose to not call that RISC, I am curious what you think RISC means.
People have been arguing as you are that x86's bloated CISC instruction set was inferior to a cleaner RISC architecture for the last 20+ years. Nobody has ever proven that the elegance of the instruction set matters with hard data though.
What evidence we do have goes against that argument.
Apple machines used a cleaner RISC architecture for a while in the desktop space. They never performed any better than equivalent x86 based machines, and in the end Apple abandoned RISC and moved to x86.
Intel came out with a cleaner RISC based instruction set that that the Itanium line uses. If x86 was really as bad as you say, Itanium chips would be running circles around the x86 based server chips provided by both Intel and AMD. That isn't happenning.
Another thing you might not realize: all x86 chips, from both Intel and AMD, once you strip them down to the micro-code level ARE RISC designs under the hood. RISC is the cleaner way to implement the micro code and the underlying execution architecture, but all historical data seems to indicate that the question of whether the instruction set that sits on top of that is RISC or CISC is irrelevant to performance. It is arguably more complicated to design a CISC based chip like x86, but that clearly has not been an obstacle to competing with RISC on the performance end for Intel or AMD engineers.
if you insist on comparing the products that Intel/AMD release into the desktop space with the products that they release into the server space 6-12 months later then yeah. But you are comparing apples and oranges here...
How long before game makers right code that supports this new chip?
Answer: a very long time. This is a xeon part designed for large database servers. It isn't intended for desktops. Some fool might try to put it into a gaming rig eventually, but that person...really will be worth of the title "fool". That would be like putting an engine designed for a freight train into a ferrari.
When will other software vendors have code that supports this many cores?
Answer: they already do. the companies that write database management software for very large backend database servers already have code that scales to very large core counts. As do many HPC software vendors. That is the intended market segment for this chip and that market segment has lots of software that is ready to burn through all those cores now.
he didn't say that the earthquake was caused by a pact with the devil explicitly.
he did say that he believes the nation is suffering because they made a pact with the devil.
more importantly, in that interview in which the discussion was haiti he spent most of the time talking with the pact with the devil and no time at all talking about the natural disaster. he clearly thinks this pact is very important, and more relevant to what is happenning in that country right now than the earthquake itself.
that fact alone, in my mind, is proof positive that mr. robertson is a closed minded fool. if he possessed the ability to see beyond his narrow world view he would realize that a time like this is NOT the time to be pointing fingers and making accusations, however indirect they may be.
while I agree that the school completely over reacted, there was no science fair involved. this was a science project the kid was working on at home that he brought to school just to show his classmates. the article makes no mention of it being a class project or part of any science fair.
to add to my own comment. this problem with manufacturing costs is surely the reason AMD has spun off their fabs into a separate company. It will be interesting to see if they can be more successful now that they do not have to directly maintain their own fabs.
Back in the Athlon days, AMD lacked the manufacturing capacity to control 50% of the market. If all their fabs were running at 100% at that time, and every chip they made was being sold, the total number of chips sold wouldn't have been anywhere near 50% of the market. Intel doesn't actually have to do anything illegal or sleezy to stay ahead on market share. The fact is that no matter how bad their chips might suck the big manufacturers like Dell et. al. will still have to use Intel chips in the majority of the machines they sell because AMD isn't physically capable of making enough. That is the fine line AMD has to tread. They have to constantly stay ahead in performance while slowly growing their market share and then use the profits to invest in increased manufacturing capacity. It takes years to build a new plant afterall, and if you build too many too quickly, you'll end up with manufacturing capacity you cannot use and you lose tons of money because maintaining a microprocessor manufacturing plant is enormously expensive.
It's about programmers lacking basic knowledge (or at least failing to take account) of how a computer works internally. well written and well validated software doesn't have problems like this.
You need to keep in mind the reason that CPUs are not designed the way that GPUs are designed. GPUs are very good at easily parallelizable repetitive computations. GPU performance grinds to a snails pace as soon as you have to take a branch.
Unless you are writing the kind of code in which if statements are nearly non-existent, you are not likely to find programming for a GPU-style pipeline to be very palatable.
You do need to keep in mind one of the primary reasons CPUs are designed the way that GPUs are designed. GPUs are very good at doing massively parallel repetitive computations like what you need to do when processing an image for a display or like some small segments of the HPC market regularly do. But GPU performance grinds to a halt as soon as your code needs to take a branch.
Unless you write the kind of code in which if statements are nearly non-existent, you are likely to find programming for a GPU-style architecture to be unhelpful.
agreed. which suggests the companies problem, if there really is one, is that they are not buying the machines that best fit the needs of their software stack.
You are probably right. It'd be nice if he could say what precisely he thinks they are lying about. I mean, I know marketing is always exaggerated to some degree, but as rule, it seems to me that AMD and Intel processors do generally perform the way the companies claim they will if you look past the hype at the technical details.
lenovo is really just trying to motivate me to stop being lazy and finally uninstall all the software they pre-installed on the laptop I purchased earlier this year. ;)
I'm bemused that he implies the problems with his servers are due to Intel and AMD no delivering with their chips, yet at the same time he admires google for how good a job they do in building out their machines.
he must be aware that google uses Intel and AMD chips.
his reasoning just doesn't square.