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You mean a compiler like this?

http://www.intel.com/cd/software/products/asmo-na/ eng/266992.htm

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1. Debug a legitimate Windows BD player
is there an all software player? you need a bluray dvd player. what's in that thing? legit players depend on hardware support. they don't do the heavy lifting themselves. sometimes, your mobo has to support dvd playback. google intel g33 mobo chip. to defeat the chip, you need to defeat the epoxy guards. secureid. scanning, tunneling, electron microscope, maybe.
http://www.intel.com/personal/our-technology/viiv/ in-depth.htm READ READ READ ..ok now read past the bullshit
      2. Determine the data that goes to and from the BD+ program in the VM
it's a program. each program is different for each dvd. for each dvd you must dissassemble. enter a descendant of the halting problem.
      3. Replicate the data that goes to the BD+ program up to the point where the program is about to release the key (which must be stored unencrypted in RAM at some point anyway)
why? why must it be stored in RAM? why? fuck. jesus.
x = 7
x += 2
x += 9
i just added 11 to x without storing 11 in RAM. extrapolate. fuck.
here i'll do it again.
x = 7
for (i = 0;i++;i LESS THAN 11):
  x += 1
  x -=3
  x+=(1.5 * 2)
  y = x/4

here, quick, write down all the code variants that will add 11 to x. GET IT???

I guess what I'm saying is, how is this any different to an actual app that looks for a dongle?

you've got a different dongle in each dvd. the specific defeat for each dongle is achievable. the genereal defeat for all dongles requires solving a descendant of halting. no one has done it for x86. no one will do it for java, in ten years, and by my guess 100.

sorry, tired, and other things too. worn out. failed the captcha like three times already. I'M UNHOOMAN! they caught me.

The ZDNet blogger claims that Intel's XEON X5365 3.0 GHz quad-core CPU shipped back in April. However I can't find it in the current Intel pricelist, neither at any of the popular online retailers. Only a bunch of hardware websites have been able to review this processor. It looks like its not yet available to the general public. Am I missing something ?

from the summary (i refuse to read ZDNet articles):

(2.6GHz Barcelona quad core) with older Intel Xeon quad cores rather than currently shipping ones which would beat the (hypothetical) score AMD claims for the future Barcelona. I guess while even the much slower 2.0GHz Barcelona is due soon AMD didn't think results from the 2.0 would look good enough - even against the slower Xeons they picked. Maybe the right comparison should be either best cpu against best cpu - or compare ones at the same price -- and only shipped products."

I don't understand how the Xeon 5355 is "older than currently shipping ones". I'm not a server processor guru, but when I go to Intel's site and click on server processors, I only see Quad Core 3200 series and Quad Core 5300 Series. Of the 5300 series, the 5355 is the top of the line processor as shown here. So, it looks to me like AMD picked the top of the line, currently shipping processor from Intel.

And while I'd rather see benchmarks on the 2.0ghz Barcelona since they are going to release it first, I do appreciate seeing numbers on a clock-to-clock basis. This shows me that per clock, AMD's Barcelona is doing more work, so even at 2.0ghz I can expect it to do more work than an Intel quad core at 2.0ghz. But I think it's clear that AMD chose to run their Barcelona at 2.6ghz to match the clock speed of the currently shipping, top of the line Intel processor.

While any benchmarks released directly by the manufacturer need to be taken with a grain of salt, I think any story written by some one who works for ZDNet needs even more scrutiny.

Intel appears to have posted some clarifications and additional details on the solution: http://blogs.intel.com/research/2007/06/fair_onlin e_gaming_aka_antiche.html

The other half of the story is that, even if one considers just circuits that can be made in a single process, there is an economically optimum number of transistors that can be placed on one chip. If you go back and read Gordon Moore's original "Moore's Law" paper, you'll find that that's exactly what it says (despite all the other stuff you hear). If you put too few transistors on a chip (so that the chip area is too small), the number of chips you make per wafer goes up, and your testing, packaging and handling costs go up. If you put too many transistors on a chip (so that the chip area is too large), the number of fully-functioning chips you get per wafer (your yield) goes down, and your sales revenue falls. (Moore's Law is the observation that this economically optimum number increases over time as chipmaking technology improves.)

So even if you consider just one type of chip function, logic, putting all of the functions on one chip is likely to be past the economically optimum size, and therefore too expensive (even for Apple!).

Additionally, the manufacturing numbers for the iPhone, while (presumably) large by consumer electronic standards, are still very small by semiconductor standards. Most semi companies don't get interested in an ASIC (custom) design unless unit sales larger than 10 million units per year are mentioned, in order to recover their design costs. Smaller volumes typically require the payment of upfront NRE (Non-Recurring Engineering) fees.

"...it should be simple to find ANYTHING that was added to either one."

While it might not always have been simple, it was at least in theory possible to find anything installed on a computer prior to hardware virtualization technologies being introduced. The crux of this new challenge is that the newer chips from Intel and AMD have support for cpu-based virtualization. In other words, they implemeted some of the hard parts of VMWare in the processor itself.

With one of these newer processors, the host operating system on a machine can prepare one of the CPU for a guest operating system to run in a virtual session. When the guest operating system issues an interrupt to interact with hardware, say to read a block off of the hard drive, then the processor would let the host operating system handle the request transparently to the guest operating system rather than letting the hardware itself process the request. This means that if someone could install a malicious virus in the place of the host operating system and have it run your OS as the guest operating system, then it should, in theory, be impossible for your guest operating system to detect the virus.

Perhaps another way of stating it is that the virus isn't actually added to the "machine" that the operating system runs in; the virus is actually added to a host machine outside of the one the operating system runs in. This is why this type of attack is referred to as a "blue pill" attack. That name references the premise of the Matrix movies where the world that people thought they lived in was just a virtual world being hosted by a malicious "host world" in which other entities were taking advantage of the humans in the virtual world without their knowledge.

That's actually a bad article about a real issue. A better article is here.

Intel's AMT technology puts special purpose hardware in the network controller which recognizes UDP and TCP packets on ports 16992, 16993, 16994, and 16995. This is completely independent of the operating system. Various system administration functions can be performed. Anybody can inventory the machine and read its ID. Other functions, like power off/on, reboot, user disable (disables keyboard/mouse/on-off switch) and remote disk I/O require a password or crypto key.

This has been around for a while; the previous version was called IPMI, Intelligent Platform Management Interface. It talked UDP only. AMT also talks TCP and HTTP; there's a whole protocol stack in the network controller now just for this. This was originally a server farm management system, but now it's on desktops, too. If HTTP mode is enabled, you can control the machine from a web browser via port 16692.

It even works while the computer is "turned off"; it's part of "wake on LAN" functionality.

Supposedly, there is no valid default password or key, and the feature is supposedly off by default. But if any software ever enables this, you're 0wned.

The computer manufacturer can preload management keys. "An OEM may supply platforms with a PID-PPS pair already written to the Intel AMT Flash memory.", according to Intel. If a vendor does that, they 0wn your computer. Something to watch for. AMT can also be enabled from the Intel Management BIOS extension screen. (Password: "admin", it says in the manual.)

The normal way AMT keys get loaded in a corporate environment is that you plug in a USB key with a special file ("setup.bin") and power cycle the machine. The machine then tries to connect to the mothership on port 9971, doing a DNS lookup for "ProvisionServer" if no IP address was specified.

If you don't want AMT enabled, here's how to disable it:, "Intel AMT is returned to Factory Mode by selecting the Unprovision option on the BIOS Extension menu or by disabling Intel AMT from the BIOS extension Manageability Feature Selection."

The whole AMT system is reasonably designed; it even has Kerberos authentication. But it's so powerful and so hidden that if it's ever enabled, it's worse than a root kit. Even reinstalling the OS won't help.

Here's Intel's technical info about AMT.

That's actually a bad article about a real issue. A better article is here.

Intel's AMT technology puts special purpose hardware in the network controller which recognizes UDP and TCP packets on ports 16992, 16993, 16994, and 16995. This is completely independent of the operating system. Various system administration functions can be performed. Anybody can inventory the machine and read its ID. Other functions, like power off/on, reboot, user disable (disables keyboard/mouse/on-off switch) and remote disk I/O require a password or crypto key.

This has been around for a while; the previous version was called IPMI, Intelligent Platform Management Interface. It talked UDP only. AMT also talks TCP and HTTP; there's a whole protocol stack in the network controller now just for this. This was originally a server farm management system, but now it's on desktops, too. If HTTP mode is enabled, you can control the machine from a web browser via port 16692.

It even works while the computer is "turned off"; it's part of "wake on LAN" functionality.

Supposedly, there is no valid default password or key, and the feature is supposedly off by default. But if any software ever enables this, you're 0wned.

The computer manufacturer can preload management keys. "An OEM may supply platforms with a PID-PPS pair already written to the Intel AMT Flash memory.", according to Intel. If a vendor does that, they 0wn your computer. Something to watch for. AMT can also be enabled from the Intel Management BIOS extension screen. (Password: "admin", it says in the manual.)

The normal way AMT keys get loaded in a corporate environment is that you plug in a USB key with a special file ("setup.bin") and power cycle the machine. The machine then tries to connect to the mothership on port 9971, doing a DNS lookup for "ProvisionServer" if no IP address was specified.

If you don't want AMT enabled, here's how to disable it:, "Intel AMT is returned to Factory Mode by selecting the Unprovision option on the BIOS Extension menu or by disabling Intel AMT from the BIOS extension Manageability Feature Selection."

The whole AMT system is reasonably designed; it even has Kerberos authentication. But it's so powerful and so hidden that if it's ever enabled, it's worse than a root kit. Even reinstalling the OS won't help.

Here's Intel's technical info about AMT.

I am from Intel, and I thought I would give you our perspective. Months ago, we addressed a processor issue by providing a BIOS update for our customers that in no way affects system performance. We publicly documented this as an erratum in April. All processors from all companies have errata, and Intel has a well-known errata communication process to inform our customers and the public. Keep in mind the probability of encountering this issue is low. Specification Updates for the affected processors are available at http://developer.intel.com./ We feel we've resolved the issue and were open about it with customers and then publicly publishing it, but this is a good venue for ideas on how we could do better or more. I am interested in any constructive comments...

PI just bought a PC with an Intel CPU, in fact, this is the first PC I've owned with an intel CPU in 8 years Been building my own AMD computers since that time. But it's hard to build a UPPC so I got the new Samsung Q1U.

I was under the impression that the A110 series processor in it was a Core2 derivative, but the Intel site states it is a Pentium M derivative.

http://www.intel.com/design/mobile/datashts/316908 .htm

My gut feeling is that it has inherited deigns from both (since Core 2 is a Pentium M derivative).

So does it have a serious bug too? (that we haven't been told about yet)

(just got this in my mail from the OpenBSD mailing list)

Various developers are busy implimenting workarounds for serious bugs
in Intel's Core 2 cpu.

These processors are buggy as hell, and some of these bugs don't just
cause development/debugging problems, but will *ASSUREDLY* be
exploitable from userland code.

As is typical, BIOS vendors will be very late providing workarounds /
fixes for these processors bugs. Some bugs are unfixable and cannot
be worked around. Intel only provides detailed fixes to BIOS vendors
and large operating system groups. Open Source operating systems are
largely left in the cold.

Full (current) errata from Intel:

  http://download.intel.com/design/processor/specupd t/31327914.pdf

  - We bet there are many more errata not yet announced -- every month
      this file gets larger.
  - Intel understates the impact of these erraata very significantly.
      Almost all operating systems will run into these bugs.
  - Basically the MMU simply does not operate as specified/implimented
      in previous generations of x86 hardware. It is not just buggy, but
      Intel has gone further and defined "new ways to handle page tables"
      (see page 58).
  - Some of these bugs are along the lines of "buffer overflow"; where
      a write-protect or non-execute bit for a page table entry is ignored.
      Others are floating point instruction non-coherencies, or memory
      corruptions -- outside of the range of permitted writing for the
      process -- running common instruction sequences.
  - All of this is just unbelievable to many of us.

An easier summary document for some people to read:

  http://www.geek.com/images/geeknews/2006Jan/core_d uo_errata__2006_01_21__full.gif

Note that some errata like AI65, AI79, AI43, AI39, AI90, AI99 scare
the hell out of us. Some of these are things that cannot be fixed in
running code, and some are things that every operating system will do
until about mid-2008, because that is how the MMU has always been
managed on all generations of Intel/AMD/whoeverelse hardware. Now
Intel is telling people to manage the MMU's TLB flushes in a new and
different way. Yet even if we do so, some of the errata listed are
unaffected by doing so.

As I said before, hiding in this list are 20-30 bugs that cannot be
worked around by operating systems, and will be potentially
exploitable. I would bet a lot of money that at least 2-3 of them
are.

For instance, AI90 is exploitable on some operating systems (but not
OpenBSD running default binaries).

At this time, I cannot recommend purchase of any machines based on the
Intel Core 2 until these issues are dealt with (which I suspect will
take more than a year). Intel must be come more transparent.

(While here, I would like to say that AMD is becoming less helpful day
by day towards open source operating systems too, perhaps because
their serious errata lists are growing rapidly too).

If I remember it was more of a general, 'look at our new microcode update' press release attached to the releases about the recall.

http://support.intel.com/support/processors/pentiu m/fdiv/

I tried to find the press releases, but a quick search of Intel didn't help, and Google actually pointed me to this story when I searched for "Pentium 90" microcode. (Wow, Google is fast)

Intel has released an errata document.
For June 2007 it lists 3 new errata:

AH106
A memory access may get a wrong memory type following a #GP due to WRMSR to an MTRR mask.

AH107
PMI while LBR freeze enabled may result in old/out-of-date LBR information

AH5P
VTPR may lead to a system hang

However, the document states that there are no fixes available. So it's probably not what MS/Intel is addressing here.

You can download the software developers manual for Intel's line of processors, which covers pretty much everything you ever needed to know, lots you probably didn't, and then some.

It's historically been 3 volumes, but these days they have volume 2A, 2B, 3A, 3B, plus there is the optimization reference, and some changes and notes.

Have a blast!

It's how you Karma Whore. Observe:

This is a serious problem for Java and .NET as well, since both of those virtual machines have to translate this incorrect opcode into the correct functionality.

What this patch fails to realize is the problems with the instruction listed on Intel's website. A similar bug in all x86 chips manufactured since 2004 (yes, really!) requires that most compilers have to work around it. (The patch in BCB wasn't ready until late 2005, which is what lead to a 15% drop in their market share.) It has become a problem in real-world applications requiring time-critical code. It may not mean much to most "high-level" programmers, but SOME of us still get into the assembly code every now and then. It's a real nightmare, and it's not something that you expect from a company like Intel.

I refer you to the errata at http://docs.intel.com/kb2004/hwbugs/knownissues.ht ml

See what I mean? It totally looks like I know what I'm saying, but it's a complete fabrication. If I didn't put these lines bookmarking it as just plain dumbassedness, then I'd probably get modded up for it. Hell, I'll probably STILL get modded up. Some lazy mods (myself included) treat the mod points like a hot potato, or leprosy.

I think this post is funny, but then again, it's well past my bed-time.

It's hard to get the errata for intel's processors when your a post SI test engineer, working for intel. Marketing seems to keep a tight fist on bad news.

It's hard to get the errata for intel's processors when your a post SI test engineer, working for intel. Marketing seems to keep a tight fist on bad news.

If your interest is computer vision, don't forget about OpenCV: http://www.intel.com/technology/computing/opencv/ - actually some algorithms in NASA's framework are taken from OpenCV.

It's funny how things happen - just as I started researching how to calibrate cameras using only manual correspondences between images (no information about world geometry known - suggestions anyone?), NASA releases their framework... That I call luck.

So I went to Best Buy's web site, and decided to do a little digging around, say I wanted to try and figure out what the different hardware configurations were all about.

So I found this little gem:

http://www.intel.com/products/processor_number/pop up/index.htm

It lets you compare processors.

Just on this one page, there are 16 different processor choices.

Then you click on one.

You get lots of technical mumbo-jumbo. Architecture (65nm? Is that good?). Cache (more is usually better). Clock Speed (Is faster better? These days not always...). Front Side Bus (As opposed to the short bus?). Quad-core? Dual Core? Intel VT? Enhanced Intel SpeedStep Technology? Execute Disable Bit?

Come on. You expect people to make sense of any of this?

Look I'd /love/ to sit down like I did in the old days and ponder all this stuff and figure out all the whoosits and whatsits and trick up the ultimate custom system my pocketbook will allow. But it's just too damn complicated. I've got too many other things to worry about. It is easier and generally accurate to simply shop on price. The more expensive it is, the more likely it is to be better than the less expensive ones.

It's interesting that Intel themselves calls it an "entirely new system innovation for Windows Vista PCs..." and says that it "Works on Windows Vista only."

Perhaps you can point to the specification which would allow it to be used by other operating systems. If I have a dual-boot system, does the specification allow it to keep info for each? If so, how is it determined which OS gets use of how much of this memory?

It's interesting that Intel themselves calls it an "entirely new system innovation for Windows Vista PCs..." and says that it "Works on Windows Vista only."

Perhaps you can point to the specification which would allow it to be used by other operating systems. If I have a dual-boot system, does the specification allow it to keep info for each? If so, how is it determined which OS gets use of how much of this memory?

Tests run on customer reference boards and preproduction latest generation Intel® Centrino® processor technology with optional Intel® Turbo Memory enabled against like systems without Intel Turbo Memory. Results may vary based on hardware, software and overall system configuration. All tests and ratings reflect the approximate performance of Intel® products as measured by those tests. All testing was done on Microsoft Windows Vista* Ultimate (build 6000). Application load and runtime acceleration depend on Vista's preference to pre-load those applications into the Microsoft ReadyBoost* cache. See www.intel.com/performance/mobile/intel_turbo_memor y.htm for more information.

Which in turn yields:

Performance measurements collected on pre-production Lenovo ThinkPad* T61 with pre-production BIOS. Detailed Notebook Configurations

  PCMark05 Test from FutureMark is an application-based benchmarking tool used to measure overall PC performance. By using portions of real applications, this benchmarking tool can assess PC performance. (+36% improvement)

  Google* Earth loading a fly through of a national park followed by Adobe Photoshop* Elements 5.0 creating a slideshow showing pictures from the same park. The input files for Adobe Photoshop Elements are 48 digital photos with a resolution of 10 MPel. (+127%)

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit www.intel.com/performance/ or call (U.S.) 1-800-628-8686 or 1-916-356-3104.

But Sony is trustworthy, they'd never lie.

Intel Turbo Memory lets your notebook actually learn your habits to provide better system response. That's because it stores frequently used information near the processor, where it's more quickly available. Better CPUs run better with Intel Turbo Memory.

This entirely new system innovation for Windows Vista PCs is based on Performance Intel® NAND Flash Memory (like the memory in an iPod* or USB 'thumb' drive), together with supporting software. It works alongside your system's RAM to increase the efficiency of data movement between the processor and hard disk.

http://www.intel.com/design/flash/nand/turbomemory /index.htm">Intel® Turbo Memory


Sounds like slow off chip cache, a la certain L3 Cache made of flash memory. I wonder what makes it notable? Size? cost? speed? Does it really help anything? It seems a large enough main ram would invalidate this or even the mere presence of on chip cache.

copy and pasted URL from the javascript non-link in the html source

the intel product has somewhat more detail. it can be found here.

I hate to plug a manufacturer, but when I upgrade my home server I'm getting a motherboard with Intel Matrix RAID on it. I've got my two 320GB SATA drives - I'll configure a 400GB RAID-0 volume and a 100GB RAID-1 volume on them. Very efficient use of the drives - I've got no use for 320GB of redundant storage, and it's not cost-effective to buy smaller drives.

If I had 3 drives I'd probably instead go 100GB RAID-5/600GB RAID-0. Might still do that.

BTW I know the numbers don't quite add up, but I'm using round figures (and advertised, but not really, 320GB/drive).

First off, it's a Roland the Plogger story, so you know it's clueless. Roland the Plogger is just regurgitating a press release.

Here's an actual paper about the thing. Even that's kind of vague. The general idea, though, seems to be to insert a layer of code-patching middleware between the application and the hardware. The middleware has access to CPU instrumentation info about cache misses, power management activity, and CPU temperature. When it detects that the program is doing things that are causing problems at the CPU level, it tries to tweak the code to make it not do so much bad stuff. See Power Virus in Wikipedia for an explaination of "bad stuff". The paper reports results on a simulated CPU with a simulated test program, not real programs on real hardware.

Some CPUs now power down sections of the CPU, like the floating point unit, when they haven't been used for a while. A program which uses the FPU periodically, but with intervals longer than the power-off timer, is apparently troublesome, because the thing keeps cycling on and off, causing voltage regulation problems. This technique patches the code to make that stop happening. That's what they've actually done so far.

Intel's interest seems to be because this was a problem with some Centrino parts. So this is something of a specialized fix. It's a software workaround for some problems with power management.

It's probably too much software machinery for that problem. On-the-fly patching of code is an iffy proposition. Some code doesn't work well when patched - game code being checked for cheats, DRM code, code being used by multiple CPUs, code being debugged, and Microsoft Vista with its "tilt bits". Making everything compatible with an on the fly patcher would take some work. A profiling tool to detect program sections that have this problem might be more useful.

It's a reasonable piece of work on an annoying problem in chip design. The real technical paper is titled "Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization." (International Symposium on Low-Power Electronics and Design, August 2004). If you're really into this, see this paper on detecting the problem during chip design, from the India Institute of Technology in Madras. Intel also funded that work.

On the thermal front, back in 2000, at the Intel Developer Forum the keynote speaker after Intel's CEO spoke, discussing whether CPUs should be designed for the thermal worst case or for something between the worst case and the average case: "Now, when you design a system, what you typically want to do is make sure the thermal of the system are okay, so even at the most power-hungry application, you will contain -- so the heat of the system will be okay. So this is called thermal design power, the maximum, which is all the way to your right. A lot of people, most people design to that because something like a power virus will cause the system to operate at very, very maximum power. It doesn't do any work, but that's -- you know, occasionally, you could run into that. The other one is, probably a little more reasonable, is you don't have the power virus, but what the most -- the most power consuming application would run, and that's what you put the TDP typical."

From that talk, you can kind of see how Intel got into this hole. They knew it was a problem, though, so they put in temperature detection to slow down the CPU when it gets too hot. This prevents damage,

First off, it's a Roland the Plogger story, so you know it's clueless. Roland the Plogger is just regurgitating a press release.

Here's an actual paper about the thing. Even that's kind of vague. The general idea, though, seems to be to insert a layer of code-patching middleware between the application and the hardware. The middleware has access to CPU instrumentation info about cache misses, power management activity, and CPU temperature. When it detects that the program is doing things that are causing problems at the CPU level, it tries to tweak the code to make it not do so much bad stuff. See Power Virus in Wikipedia for an explaination of "bad stuff". The paper reports results on a simulated CPU with a simulated test program, not real programs on real hardware.

Some CPUs now power down sections of the CPU, like the floating point unit, when they haven't been used for a while. A program which uses the FPU periodically, but with intervals longer than the power-off timer, is apparently troublesome, because the thing keeps cycling on and off, causing voltage regulation problems. This technique patches the code to make that stop happening. That's what they've actually done so far.

Intel's interest seems to be because this was a problem with some Centrino parts. So this is something of a specialized fix. It's a software workaround for some problems with power management.

It's probably too much software machinery for that problem. On-the-fly patching of code is an iffy proposition. Some code doesn't work well when patched - game code being checked for cheats, DRM code, code being used by multiple CPUs, code being debugged, and Microsoft Vista with its "tilt bits". Making everything compatible with an on the fly patcher would take some work. A profiling tool to detect program sections that have this problem might be more useful.

It's a reasonable piece of work on an annoying problem in chip design. The real technical paper is titled "Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization." (International Symposium on Low-Power Electronics and Design, August 2004). If you're really into this, see this paper on detecting the problem during chip design, from the India Institute of Technology in Madras. Intel also funded that work.

On the thermal front, back in 2000, at the Intel Developer Forum the keynote speaker after Intel's CEO spoke, discussing whether CPUs should be designed for the thermal worst case or for something between the worst case and the average case: "Now, when you design a system, what you typically want to do is make sure the thermal of the system are okay, so even at the most power-hungry application, you will contain -- so the heat of the system will be okay. So this is called thermal design power, the maximum, which is all the way to your right. A lot of people, most people design to that because something like a power virus will cause the system to operate at very, very maximum power. It doesn't do any work, but that's -- you know, occasionally, you could run into that. The other one is, probably a little more reasonable, is you don't have the power virus, but what the most -- the most power consuming application would run, and that's what you put the TDP typical."

From that talk, you can kind of see how Intel got into this hole. They knew it was a problem, though, so they put in temperature detection to slow down the CPU when it gets too hot. This prevents damage,

Intel seems to think High-definition audio exists.
http://www.intel.com/design/chipsets/hdaudio.htm
But who is Intel, anyway?

Intel is already moving to 45nm by the end of 2007 or earlier http://www.intel.com/technology/silicon/45nm_techn ology.htm

The Intel presentation clarifies this to some extent. Look at slide 7. The core is simply a compute element with a router. They have put stacked memory as future implementation. Also here's Intel's Teraflop site.

The Intel presentation clarifies this to some extent. Look at slide 7. The core is simply a compute element with a router. They have put stacked memory as future implementation. Also here's Intel's Teraflop site.

...check out these tools

I went to the Game Developers Conference and went to a session where a gentleman from either IBM or Intel gave a talk on how to utilize extra cores and yet not penalize those that did not have multicore. As an aside, Intel also offers something called the "Building Blocks" library which parallelizes primitive things such as for loops. Anywho, back to something game specific, a few of the suggestions below:

Particle physics for client-side visual effects (omit on non multi-core machines)
Animate faces more, smoother more natural animations when walking up stairs/inclines (again more static and rigid on single core machines)
Animate cloth/hair

And my personal favorite
Dynamic texture/model tessellation. (models far away are less complex than models close up, make the transition smoother)


So, whats my opinion? It's the libraries and programming languages and compilers that will change, the programmer just needs to have an idea of synchronization issues and whatnot.

It is not difficult to justify parallel programming. Ten years ago, it was difficult to justify because most computers had a single processor. Today, dual-core systems are increasingly common, and 8-core PC's are not unheard of. And software developers are already complaining because it's "too hard" to write parallel programs.

Since Intel is already developing processors with around 80 cores, I think that multi-core (i.e. multi-processor) processors are only going to become more common. If software developers intend to write software that can take advantage of current and future processors, they're going to have to deal with parallel programming.

I think that what's most likely to happen is we'll see the emergence of a new programming model, which allows us to specify an algorithm in a form resembling a Hasse diagram, where each point represent a step and each edge represents a dependency, so that a compiler can recognize what can and cannot be done in parallel and set up multiple threads of execution (or some similar construct) according to that.

But do those nVidia and ATI cards have open source drivers? The Intel chips do!

Do Intel's X3000 open-source drivers have support for the T&L units and vertex shaders built-in to the X3000? The Windows drivers certainly don't, even after 9 months on the market!

Almost 3 months ago, beta drivers were promised, but they have yet to surface. The X3000 is still using the processor to perform vertex shading / T&L, just like the GMA 900 / 950, and that's why it still gets beat by the old Nvidia GeForce 6150.

• $50,000 Intel Scholarships for Three Winners at the Intel International Science and Engineering Fair
• The Intel Computer Clubhouse Network
• Intel Involved Campaign to help communities where it is present
• Intel's Environmental Work and Awareness

• $50,000 Intel Scholarships for Three Winners at the Intel International Science and Engineering Fair
• The Intel Computer Clubhouse Network
• Intel Involved Campaign to help communities where it is present
• Intel's Environmental Work and Awareness

• $50,000 Intel Scholarships for Three Winners at the Intel International Science and Engineering Fair
• The Intel Computer Clubhouse Network
• Intel Involved Campaign to help communities where it is present
• Intel's Environmental Work and Awareness

• $50,000 Intel Scholarships for Three Winners at the Intel International Science and Engineering Fair
• The Intel Computer Clubhouse Network
• Intel Involved Campaign to help communities where it is present
• Intel's Environmental Work and Awareness

In 1995 the Pentium Pro introduced 36-bit addressing and combined with windows PAE at the time, could address 64 gibibytes (yes, "gibibytes") of memory.

Do you make a habit out of reading the first sentence of a post and then commenting on it with a smart response?

The second sentence of my post, for your reference:

Most motherboards don't support PAE (either due to lack of re-mappable PCI address space, or even lack of 36-bit address lines!), so we have a hard-limit of 2-3GB in the most popular version of Vista (32-bit).

PAE is not some magic bullet. Support is required in three places: OS, chipset and motherboard itself.

Vista supports PAE just fine, so that's not a problem. The problem lies in the hardware:

Most consumer motherboard chipsets do not support the remapping of memory-mapped I/O space required to support PAE. Even then, some motherboards omit the extra 4 bits of address lines as a cost savings feature. You usually have to trade-up to server boards to get these types of features, and even some of those fall short.

While the limitations of 32-bit Vista may spark a renewed interest in motherboards having proper PAE support, it's too little, too late. I also consider PAE a pretty crappy band-aid for a problem that already has a solution (Vista 64). This was the focus of my original post: we could have avoided this whole memory mess if Vista were purely flat 64-bit.

Who cares? That's not relevant. Hardware companies still produce 16-bit chips but that doesn't mean most people are still using 16-bit desktop computers.

...some other users just want fully operational 2D graphics with dual head support.

I have to answer with a question -- by benchmark, do you mean 1) comparing yourself to other IT departments or 2) developing a system of measurement that proves you are effective and getting better.

I prefer the second approach -- develop an internal system of performance measurement. This is not a trivial exercise but it has been done. I suggest your get you CIO a copy of Martin Curley's book, "Managing Information Technology for Business Value." Here is a link to Intel Press http://www.intel.com/intelpress/offers/bundle5.htm /

Alex Callier of the Belgian band Hooverphonic uses a guitar with built-in laptop. It's a Fender Telecaster with a laptop built in, and allows for more flexibility in sound effects and between concerts he can use it to surf the web.

There are many results on Google, but almost all of them in Dutch apparently. Here's the only English result I found: http://www.newsenginepr.com/documents/intel.xml (see section 'Hooverphonic on tour with one of a kind Intel Guitar'). Ah, Intel has a page about it too, but without reference to Hooverphonic: http://www.intel.com/cd/corporate/pressroom/emea/e ng/248418.htm

Longer answer: AFAIK, Intel DuoCore chips beat the crap out of AMD in the performance section, and, more importantly to Apple, in the performance-to-power-consumption section. Apple makes a lot of money from schweet laptops, and they are not about to ditch the best laptop CPU money can buy for a contender. Also, Apple iPhone is going to use ARM CPUs (Apple, if I remember correctly, was one of the founders of ARM), and Io and Behold, Intel also has an offering in that area.

In any case, the future of (personal) computing is in the laptop/mobile segment. Apple knows this, and this is why they certainly won't buy AMD.

At $175 it's still less than half the price of an Intel Classmate, and the fact that the OLPC machine won't play all the x86 based entertainment software is a _huge_ advantage in a school setting.