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Flaws In Intel Processors Quietly Patched

Nom du Keyboard writes "According to this article in The Inquirer and this Microsoft Knowledge Base article, a fix for some significant problems in many of Intel's most recent processors has been quietly released — by whom is not clear. Patches are available on Microsoft's site. Affected processors include Core 2 Duo E4000/E6000, Core 2 Quad Q6600, Core 2 Xtreme X6800, XC6700, and XC6800. Details on just what has been fixed are scanty (it's called a 'reliability update'), however, it's probably more important than either Intel or Microsoft is openly admitting." There is no indication that Apple users are affected.

311 comments

  1. my 1.9432534656 cents worth... by ross.w · · Score: 5, Funny

    If they're releasing the patch so quietly, how will anyone know to apply it?

    --
    If my call is important, why am I talking to a recording?
    1. Re:my 1.9432534656 cents worth... by Jah-Wren+Ryel · · Score: 2, Insightful

      If they're releasing the patch so quietly, how will anyone know to apply it? It's probably a microcode update that your BIOS loads on boot. So, chances are it will be inconspicuously available as part of the next BIOS patch for most systems.
      --
      When information is power, privacy is freedom.
    2. Re:my 1.9432534656 cents worth... by Anonymous Coward · · Score: 0

      Today I read news of this patch on Slashdot, The Inquirer, The Register, and Digg.
      LOL @Very Quiet. Not a single computer enthusiast will know about its existence.

    3. Re:my 1.9432534656 cents worth... by jd · · Score: 3, Insightful

      What worries me is the idea of Microsoft Update mucking with the processor in the first place. And what is Genuine Disadvantage going to think of patching a non-Microsoft product anyway?

      --
      It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
    4. Re:my 1.9432534656 cents worth... by mrsteveman1 · · Score: 4, Informative

      Unless Intel has an update mechanism I'm not aware of, this is a Microcode update, and this is how they are always released.

      And for what its worth it doesn't patch anything, it loads into the processor at boot. Delete the microcode file or remove the OS and the processor will be just as you bought it.

      Just be glad they were smart enough to use such a system where the processor can be updated while running and temporarily, allowing you to revert back to its purchased state.

    5. Re:my 1.9432534656 cents worth... by SpaceLifeForm · · Score: 0, Troll
      You mean, in the next tuesday windows update. So, Microsoft is now providing BIOS upgrades instead of the motherboard manufacturer.

      Is there anyone out there that trusts this process?

      No thanks, but I'll not even put GNU/Linux on a machine with a motherboard that has been raped right up the BIOS.

      --
      You are being MICROattacked, from various angles, in a SOFT manner.
    6. Re:my 1.9432534656 cents worth... by Poltras · · Score: 4, Insightful

      It's not like windows couldn't mess with your machine anyway. If you don't trust your operating system, how can you trust your whole system.

    7. Re:my 1.9432534656 cents worth... by CTho9305 · · Score: 2, Informative

      Just be glad they were smart enough to use such a system where the processor can be updated while running and temporarily, allowing you to revert back to its purchased state.

      It's actually easier to just use an SRAM to hold microcode patches than to incorporate flash memory or other non-volatile reprogrammable storage on the die. Flash requires a special type of transistor, and fuses generally can't be unblown once they're blown (meaning you'd be very limited in how many patches you could ever apply to a given chip).

    8. Re:my 1.9432534656 cents worth... by Iam9376 · · Score: 1

      the processors microcode has nothing to do with the bios therefore there is no reason for motherboard manufacturers to release an update.

      my question is though: is this specific to windows, or will linux and other be affected as well?

      i'm guessing no, as intel is usually very good about supporting our community; but that is all hearsay without any foundation.

    9. Re:my 1.9432534656 cents worth... by Anonymous Coward · · Score: 1, Informative

      the processors microcode has nothing to do with the bios

      That is not true. There is a processor microcode update RAM in the processor, and it can be loaded with microcode updates by the BIOS.

    10. Re:my 1.9432534656 cents worth... by laejoh · · Score: 0

      This is a zen thing, isn't it? Like "If a tree falls in the forest and there is noone around does it make a sound?".

    11. Re:my 1.9432534656 cents worth... by expatriot · · Score: 2, Informative

      Neither NOR or NAND flash uses fuses. Fuses were used in the PROM technology from the 70's and 80's. (Though perhaps you were speaking figuratively.)
      The number of times flash memory can be reprogrammed means your PC will be in a landfill site long before the flash breaks.

    12. Re:my 1.9432534656 cents worth... by Nazlfrag · · Score: 1

      Did you hear from those responsible though? The ones who are quiet are the ones behind this project, not third party journalists.

    13. Re:my 1.9432534656 cents worth... by naasking · · Score: 3, Funny

      It's not like windows couldn't mess with your machine anyway. If you don't trust your operating system, how can you trust your whole system.

      Exactly, and I think Windows has adequately demonstrated that you can't trust it.

    14. Re:my 1.9432534656 cents worth... by pD-brane · · Score: 1

      I tend to agree.
      However, there are things like protected mode, privilege rings or other security measures between the hardware and the operating system. Couldn't this protect things like firmware from the OS?
      I also think about the fact that one needs a MS-DOS floppy to flash your BIOS. Doesn't this have something to do with that you need to be in real modus.

    15. Re:my 1.9432534656 cents worth... by j.a.mcguire · · Score: 0

      microcodes are stored in ROM, they're only ever stored in RAM EEPROM or Flash on development hardware, i.e. not a personal computer processor.

      Furthermore SRAM is volatile memory, so could not be used for this purpose.

    16. Re:my 1.9432534656 cents worth... by Joe+U · · Score: 2, Insightful

      Intel has a microcode update architecture. Basically, you can patch the CPU microcode into RAM on the CPU. It's been around since the Pentium bug that caused a recall.

    17. Re:my 1.9432534656 cents worth... by fishyfool · · Score: 1

      One doesn't need an MS-Dos floppy to flash one's Bios, One needs A Dos floppy. I've flashed my Bios from freeDos in the past.

      --
      Enjoy Every Sandwich
    18. Re:my 1.9432534656 cents worth... by Poltras · · Score: 1

      The hardware was ALWAYS meant to let the control goes to the operating system. If Windows wanna swipe your ass with your BIOS, no hardware will prevent it. The mechanism your describe are about preventing any process on your machine from messing with the computer without specific authorization. The OS is still the first program run, and it still have supreme power.

    19. Re:my 1.9432534656 cents worth... by init100 · · Score: 1

      Furthermore SRAM is volatile memory, so could not be used for this purpose.

      And that is why the microcode update has to be applied on each boot.

    20. Re:my 1.9432534656 cents worth... by Ilgaz · · Score: 1

      the processors microcode has nothing to do with the bios therefore there is no reason for motherboard manufacturers to release an update.

      my question is though: is this specific to windows, or will linux and other be affected as well?

      i'm guessing no, as intel is usually very good about supporting our community; but that is all hearsay without any foundation. I didn't use Linux for ages but isn't there a kernel device just exists for microcode updates?

      Also I am completely puzzled how a CPU software issue doesn't effect OS X/Mactel?
    21. Re:my 1.9432534656 cents worth... by petermgreen · · Score: 1

      did you actually read the post you replied to? He clearly mentioned both flash and fuses and the problems with both.

      --
      note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register
    22. Re:my 1.9432534656 cents worth... by CTho9305 · · Score: 1

      As petermgreen mentioned, I explained that flash also has problems. Flash memory uses transistors with two gates, one of which is floating; they requires special steps during the manufacturing process.

    23. Re:my 1.9432534656 cents worth... by CTho9305 · · Score: 1

      microcodes are stored in ROM, they're only ever stored in RAM EEPROM or Flash on development hardware, i.e. not a personal computer processor.

      There is a ROM that contains microcode, but there is also a RAM that is used to hold patches. This patent describes how some AMD processors load patches into a small RAM (scroll down to "BACKGROUND OF THE INVENTION" for the human-readable explanation).

      Furthermore SRAM is volatile memory, so could not be used for this purpose.

      The BIOS usually applies microcode patches at every boot. From patents and BIOS reverse-engineering, people have even figured out how to load their own patches. In this instance, it looks like MS is going to have Windows apply a microcode patch (which makes sense if you think about it - BIOS updates are a pain and very few people actually take advantage of them, but Windows Update can distribute this kind of thing to 95% of computers, and the OS can apply them at boot time).

  2. Heh by Anonymous Coward · · Score: 0

    Debian AMD64: Check. AMD X2: Check. Clear

    1. Re:Heh by Technician · · Score: 1

      Debian AMD64: Check. AMD X2: Check. Clear

      Last time I heard, Intel publishes errata sheets unlike many other suppliers. Microsoft may have a fix or patch simply becasue the data is known and published.

      With your chips, do you prefer open or closed?

      The advantage is bugs can be fixed.

      Here is a forum on Conroe errata.

      http://www.abxzone.com/forums/general-intel-platfo rm-discussions/105033-intels-conroe-has-67-errata- bugs.html

      Does AMD publish this?

      --
      The truth shall set you free!
    2. Re:Heh by be-fan · · Score: 3, Informative

      Everybody publishes errata. AMD's are at: http://www.amd.com/us-en/assets/content_type/white _papers_and_tech_docs/25759.pdf (starting on page 12)

      --
      A deep unwavering belief is a sure sign you're missing something...
    3. Re:Heh by Technician · · Score: 2, Interesting

      Everybody publishes errata.

      Things have changed for the better. I am not a programmer so I don't pay attention to errata. I remember that published and unpublished errata was an issue at about the time the Pentium 90 floating point bug was discovered. Since that major voluntary recall, Intel has taken steps to make CPU's patchable so minor bugs can be fixed. This patch is a good example of that working.

      --
      The truth shall set you free!
    4. Re:Heh by fbjon · · Score: 1

      I'm consistently amazed by the complexity of today's processors... Is there some walkthrough anywhere, that would explain just what all is stuffed into a typical modern x86 CPU?

      --
      True confidence comes not from realising you are as good as your peers, but that your peers are as bad as you are.
    5. Re:Heh by Tyger · · Score: 4, Informative

      You can download the software developers manual for Intel's line of processors, which covers pretty much everything you ever needed to know, lots you probably didn't, and then some.

      It's historically been 3 volumes, but these days they have volume 2A, 2B, 3A, 3B, plus there is the optimization reference, and some changes and notes.

      Have a blast!

    6. Re:Heh by mikael · · Score: 1

      Linux Pentium 4 Review

      Looking at Intels Prescott

      --
      Vintage computer adverts: http://www.vintageadbrowser.com/computers-and-software-ads
    7. Re:Heh by mikael · · Score: 1
      --
      Vintage computer adverts: http://www.vintageadbrowser.com/computers-and-software-ads
    8. Re:Heh by Short+Circuit · · Score: 1

      Here you go. I once spent two weeks straight doing little else aside from reading the articles in Ars's Technopaedia.

    9. Re:Heh by petermgreen · · Score: 1

      Everybody publishes errata
      but the quality of errata varies hugely.

      --
      note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register
  3. Intel Macs not affected? by Anonymous Coward · · Score: 5, Insightful

    There is no indication that Apple users are affected.

    What, magical pixie faries fixed the Intels in Macs? How could they not be affected?

    1. Re:Intel Macs not affected? by Anonymous Coward · · Score: 3, Funny

      Something to do with the unicorn semen and pink elephant droppings.

    2. Re:Intel Macs not affected? by shird · · Score: 4, Insightful

      I would guess the bug affects some Ring0 OS type of service/instruction (such as switching in and out of protected mode, paging, faults etc) which MacOS doesn't use. Hence the patch is part of the OS. I speculate that its a workaround in the OS rather than a patch to the actual CPU.

      --
      I.O.U One Sig.
    3. Re:Intel Macs not affected? by jmv · · Score: 1

      If they really are not affected (remains to be seen), it could possibly be either because 1) Apple shipped with a batch that isn't affected or 2) OS X isn't doing things that can trigger the bug.

    4. Re:Intel Macs not affected? by RuBLed · · Score: 1

      Either that or Apple has released theirs more quietly...

    5. Re:Intel Macs not affected? by Kingrames · · Score: 4, Funny

      It's not that they're not affected. It's that apple fanboys won't admit to it.

      --
      If you can read this, I forgot to post anonymously.
    6. Re:Intel Macs not affected? by Anonymous Coward · · Score: 1, Funny

      Macs are primarily for decoration. No one actually uses them for computing.

    7. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      After R'ingTFA I noticed its a microcode update, so probably not a OS workaround. But it could still be that MacOS doesn't trigger the bug.

    8. Re:Intel Macs not affected? by syzler · · Score: 1

      What, magical pixie faries fixed the Intels in Macs? How could they not be affected?

      The bug may be limited to systems that use BIOS which would mean that systems that use EFI would not be vulnerable. This would explain why Intel Macs, which use EFI, are not vulnerable.

      From the article:

      In the mobile world, people with the Core 2 Duo T5000 and T7000 need to visit Microsoft's site, while the server guys will want to use motherboard BIOSes if they do not rely on Microsoft Windows operating systems.

    9. Re:Intel Macs not affected? by R.Mo_Robert · · Score: 1

      Well, it only affects two models of the Core 2 Duos, which is the only processor that Apple uses for all its Intel Macs except the Xserve (Xeon) and the Mac mini (first-generation Core Duo, which is not affected). So, assuming Apple didn't use either the E4000 or the E6000 Core 2 Duo processors, that would explain why they are not affected.

      However, I do think the situation is interesting when we look at the Xserve, since they use Xeons. The article notes several affected models of them, which it says is just about every model ever made in the second-generation of Core processors. That kinda makes you wonder.

      But if this issue is so easily fixed with a software patch ... whose fault was it? (Apple also recently released a security update, but I don't think that had anything to do with this, since they seemed to be just Webcore/Webkit issues and it was issued for both PowerPC and Intel.)

      --
      R.Mo
    10. Re:Intel Macs not affected? by Penguin+Follower · · Score: 1

      Well, it only affects two models of the Core 2 Duos, which is the only processor that Apple uses for all its Intel Macs except the Xserve (Xeon) and the Mac mini (first-generation Core Duo, which is not affected).

      Well, I am sure I won't be the only person to point this out, but Apple does not use the Core 2 Duos in the MacPro towers, either. They use Xeons.

    11. Re:Intel Macs not affected? by DaveWick79 · · Score: 1

      The article is stupid because it's the Inquirer, but they mean the Entire E4000 and E6000 series. What they really mean to say is that every single Core 2 Duo processor is affected.

    12. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      they can have their microcode updated, but only with a dedicated bridged-bus eeprom burner ($15,000 or so).

    13. Re:Intel Macs not affected? by cpotoso · · Score: 1

      I do not think you're right: when I boot linux (an old RH8) I see a part of the boot message saying "applying microcode patch" (or something like that).

    14. Re:Intel Macs not affected? by MikeBabcock · · Score: 4, Informative

      they can have their microcode updated, but only with a dedicated bridged-bus eeprom burner ($15,000 or so).


      Incorrect. Microcode on Intel processors can be updated live by software. This has been possible for ages. For information on how this can be done in Linux for example, see here.
      --
      - Michael T. Babcock (Yes, I blog)
    15. Re:Intel Macs not affected? by JimDaGeek · · Score: 1

      Maybe... I recently got an Apple update that took Tiger from 10.4.9 to 10.4.10 on my Intel Macbook and Intel iMac. Maybe this release had the patch?

      --
      General, you are listening to a machine! Do the world a favor and don't act like one.
    16. Re:Intel Macs not affected? by jd · · Score: 4, Interesting
      Depends on the instruction(s) inflicted. Based on the limited information available, it could be anything from a mode that's unused outside of Windows to an instruction that the compiler used for Mac OS/X simply never generates. (A sub-optimal instruction, for example, would be skipped by any decent optimizing compiler as the same thing could be done in superior ways.)

      If anyone wants to place their machine at grave risk, I'd be interested to know what happens if you are running a Windows machine in one virtual container and Linux in another, then patch the microcode from Windows. How does it affect Linux? Do kernel tests, say in the LTP or one of the other testing kits, suddenly succeed where they'd otherwise fail, or vice versa?

      Likewise, if you use IE in WINE and pull the patch down, purely in a Linux environment, does it disrupt Linux, benefit it, or have no impact whatsoever?

      If we knew this, we should be able to figure out more what the defect actually is and what the patch does to correct it, as we can track what Linux is doing at the time something different happens.

      --
      It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
    17. Re:Intel Macs not affected? by X0563511 · · Score: 1

      Yes but you are not changing anything in hardware...

      --
      For large sets, this will be our guide even unto death, for the LORD will work for each type of data it is applied to...
    18. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      That gave me a big laugh :-)

      However, How would I apply the patch if I run linux? :-)
      If the patch is released via Windows Update, how will I get the patch? Seems weird.

    19. Re:Intel Macs not affected? by be-fan · · Score: 2, Insightful

      Since microcode isn't hardware, fixing it shouldn't require any changes to the hardware.

      --
      A deep unwavering belief is a sure sign you're missing something...
    20. Re:Intel Macs not affected? by crayz · · Score: 3, Insightful

      It's funny that everyone is asking where the Apple patch is. How about: where's the Linux patch?

    21. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      It's a fucking JOKE - DUMBASS.

      Remember when you wanted to upgrade your mac and all you could do is throw it out and replace it? Or were you too busy being serious at ITT and pretending that they were teaching something important?

    22. Re:Intel Macs not affected? by Fweeky · · Score: 4, Funny

      3) The on-board reality distortion field generator resolves the problem. At the expense of making nearby computers lacking such devices somewhat *less* reliable, of course.

      I swear, our servers have been behaving more strangely since the guy in the next rack over installed a few Mac Mini's; maybe the RDFG's emmit gamma rays from their embedded naked singularity...

    23. Re:Intel Macs not affected? by Sparr0 · · Score: 1, Informative

      Actually, it requires a significant number of elementary particles in the hardware, mostly electrons, to change state in one way or another. :-p

    24. Re:Intel Macs not affected? by dwater · · Score: 1

      Don't ask awkward questions. Just be thankful you use awesomely reliably Apple products and not those other (spit) ones.

      --
      Max.
    25. Re:Intel Macs not affected? by TheLink · · Score: 2, Informative

      Uh, almost everything has software nowadays, and that includes most x86 CPUs (microcode).

      To Joe Public, a wireless router would be all hardware. But to Joe Hacker, a wireless router would be mainly software.

      The manufacturer of one of my DVD drives released firmware updates that allowed it to support dual layer DVDs - over time they added better support and more features.

      --
    26. Re:Intel Macs not affected? by newr00tic · · Score: 1, Offtopic

      Warning: Unterminated comment starting line 8 in /vservers/crayz/htdocs/photo.php on line 8

      --
      A horse can't be sick, you know, even if he wants to.
    27. Re:Intel Macs not affected? by ben+there... · · Score: 3, Informative
      This sounds like it doesn't affect much of anyone with a real, existing Core 2 Duo, at least according to the summary...

      Affected processors include Core 2 Duo E4000/E6000, Core 2 Quad Q6600, Core 2 Xtreme X6800, XC6700, and XC6800.

      E4000 - doesn't exist
      E6000 - doesn't exist
      Q6600 - k, this one does exist
      X6800 - this one exists too
      XC6700 - doesn't exist
      XC6800 - doesn't exist

      Of course, they probably meant E4000 and E6000 series, and maybe they meant QX6700 and QX6800...

      I guess it was the inquirer's fault. But they probably could have just said "all Core 2 Duos, Extremes, and Quads."
    28. Re:Intel Macs not affected? by Dystopian+Rebel · · Score: 1

      Once installed inside an Apple case, Intel CPUs are immediately protected by the Jobsian Reality Distortion Field (JRDF).

      Install Intel in a PC, you've got problems.

      Install Intel in a Mac and... Boom! No problems.

      And you want an iPhone.

      --
      Rich And Stupid is not so bad as Working For Rich And Stupid.
    29. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      Ha, you got modded offtopic for pointing out that the summary is completely wrong. You should have talked about Macs in the Intel article like everybody else.

    30. Re:Intel Macs not affected? by crayz · · Score: 1

      Yea...shared box got upgraded fro php4->5 and shit happens. One day it'll all be ruby and I'll be happy

    31. Re:Intel Macs not affected? by newr00tic · · Score: 1

      Ok. -All will be fine then. :)

      --
      A horse can't be sick, you know, even if he wants to.
    32. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      Mac OS X might not use Ring 0, but virtual machine software from VMWare and Parallels very well might.

    33. Re:Intel Macs not affected? by IhuntCIA · · Score: 1

      When Apple switched on Intel it did its own research in new CPU's and did find more than hundred of instruction flaws / issues. Just search slashdot :)

      Unlike M$, Apple is paranoid and does care about its reputation.

      Intel had bad flaw in FPU unit on Pentium series. Intel never recalled flawed CPU's, in fact Intel did try to hide the issue, and coders were forced to use (slow) FPU emulation. The FPU flaw propagated on celeron and Pentium III processors.

      I had to switch to AMD.

      Well .. maybe the mac OS is harder to bot up.

    34. Re:Intel Macs not affected? by Anonymous Coward · · Score: 1, Insightful

      Feed the microcode file to the Linux microcode update driver and be happy!

    35. Re:Intel Macs not affected? by Tim+C · · Score: 1

      Unlike M$, Apple is paranoid and does care about its reputation.

      Also unlike "M$", Apple produce their own hardware and only have to support a limited number of chips, while Windows has to run on any x86-compatible chip.

    36. Re:Intel Macs not affected? by Dogtanian · · Score: 0

      I do not think you're right: when I boot linux (an old RH8) I see a part of the boot message saying "applying microcode patch" (or something like that). Do you seriously think that Linux (or any other OS) would attempt to update the CPU's microcode automatically, every time you booted the thing?!

      Of course it's possible to update the microcode; Intel included that facility in the CPU. But the idea that Linux would automatically attempt to make a fundamental (and very serious) change to your processor every time you booted is highly unlikely. My guess is that it's a workaround for a bug in the kernel.
      --
      "Slashdot - News and Chat Sites Deviant". (Click "homepage" link above for details).
    37. Re:Intel Macs not affected? by someone300 · · Score: 4, Informative

      The microcode needs to be updated every boot. It's volatile and resets when you turn off the system. See http://urbanmyth.org/microcode/

      As far as I know, all OSes do this.

    38. Re:Intel Macs not affected? by ocbwilg · · Score: 1

      This sounds like it doesn't affect much of anyone with a real, existing Core 2 Duo, at least according to the summary...

      Affected processors include Core 2 Duo E4000/E6000, Core 2 Quad Q6600, Core 2 Xtreme X6800, XC6700, and XC6800.

      E4000 - doesn't exist
      E6000 - doesn't exist
      Q6600 - k, this one does exist
      X6800 - this one exists too
      XC6700 - doesn't exist
      XC6800 - doesn't exist

      Of course, they probably meant E4000 and E6000 series, and maybe they meant QX6700 and QX6800...

      I guess it was the inquirer's fault. But they probably could have just said "all Core 2 Duos, Extremes, and Quads."


      If you look at other sources, they do say the E4000 series, E6000 series, etc. It also affects the Core 2 based Xeon's as well. I suspect that the reason that they didn't say "all Core 2 Duos, Extremes, and Quads" is because there is a 32-bit only Core 2 model (based on Yonah I believe) floating around that it doesn't affect.

    39. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      > it could be [...] an instruction that the compiler used for Mac OS/X simply never generates

      Ridiculous:

      mycomputer:~ fred$ as -version
      Apple Computer, Inc. version cctools-622.3.obj~2, GNU assembler version 1.38
      mycomputer:~

      What opcode do you want to include in your software?
      Mac OS X is probably vulnerable. Unless it is some obscure ring 0 TLB bug occurring in a mode that Mac OS X doesn't support, and that drivers can't use without crashing the OS.

      The truth is that NeXTstep (now OSX) generally didn't care about such obscure bugs (I used to crash NeXTstep 3 from userland with a single assembly opcode). I feel that OSX have quite a lot of holes, but not much exploits, so they don't care too much. Yet.

    40. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      EFI, OpenFirmware and BIOS are basically all the same, they just do things in a slightly different manner.

    41. Re:Intel Macs not affected? by John+Hasler · · Score: 1

      Why should there be a Linux patch for an Intel hardware problem?

      --
      Warning: this article may contain humor, sarcasm, parody, and perhaps even irony. Read at your own risk.
    42. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      Because the only processor MACs use are the GPUs.

    43. Re:Intel Macs not affected? by Dogtanian · · Score: 1

      Fair enough; I had assumed that the process was more like flashing the BIOS on a particular piece of hardware (i.e. permanent) instead of something that was lost on power down and had to be redone every time.

      --
      "Slashdot - News and Chat Sites Deviant". (Click "homepage" link above for details).
    44. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      If the patch is released via Windows Update, how will I get the patch? Seems weird.

      Wine?

    45. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      But the code is read from some flash or eeprom source, and the original source needs to be updated, no?

    46. Re:Intel Macs not affected? by init100 · · Score: 1

      That depends. The microcode update could either reside in the BIOS image, and be applied during BIOS startup, or reside in the operating system and be applied during the operating system startup process.

    47. Re:Intel Macs not affected? by X0563511 · · Score: 1

      Exactly. You are not changing hardware - only some bits stored in the hardware. You make a change to the microcode in some kind of volatile storage, and when the system is powered down the changes are lost and must be repatched next time the power comes back.

      --
      For large sets, this will be our guide even unto death, for the LORD will work for each type of data it is applied to...
    48. Re:Intel Macs not affected? by jZnat · · Score: 1

      Because Linux can use microcode updates as well.

      --
      'Yes, firefox is indeed greater than women. Can women block pops up for you? No. Can Firefox show you naked women? Yes.'
    49. Re:Intel Macs not affected? by init100 · · Score: 1

      I suspect that the reason that they didn't say "all Core 2 Duos, Extremes, and Quads" is because there is a 32-bit only Core 2 model (based on Yonah I believe) floating around that it doesn't affect.

      The Yonah is not a Core 2, but a Core processor. To add some confusion, the Core (Yonah) does not even use the Core microarchitecture, but the Pentium M microarchitecture. Thus, technically it would probably be correct to say that all processors of the Core microarchitecture are affected, but since Intel created such a confusing scheme (namely introducing the Core processor brand before the Core microarchitecture), they must explicitly exclude the Core Duo.

    50. Re:Intel Macs not affected? by Tim+C · · Score: 1

      But if this issue is so easily fixed with a software patch ... whose fault was it?
      It's patching the microcode that forms (part of) the processor's instruction set - essentially patching the processor itself. This is most definitely Intel's fault, and is nothing to do with the OS or any other ("traditional") software.
    51. Re:Intel Macs not affected? by jd · · Score: 1
      Gnu's C compiler and assembler do some very nice optimization and are entitled to ignore suboptimal or inferior methods. Just because the assembler can generate some instruction doesn't mean it will in practice. Unless you specify an assembler block AND tell it to do no optimization whatsoever AND specifically use some degenerate case of an opcode, you would never run into that situation in practice, using GCC and binutils.

      We already know that some Intel-isms are not used in GCC - PGCC was rejected utterly by the GCC developers, not because it produced poorer code, as it typically produced greatly superior code for Intel-specific processors, but because of disputes over what and how things should be done. If Intel's compilers are producing weird code, as is implicit in the PGCC disputes, then we can assume Intel's compilers will generate opcodes and sequences of opcodes that GCC never will in any practical, real-world situation. (Forced assembly code is neither practical nor real-world.)

      --
      It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
    52. Re:Intel Macs not affected? by m.dillon · · Score: 4, Interesting

      I couldn't find an exact errata reference but it looks like a ring 0 issue to me too, which means that the OS either doesn't trigger the conditions required or the OS can work around the problem. Some such issues can be fixed in microcode, some have to be dealt with by the operating system.

      There are several known TLB issues that are rather serious which all OSs have to have workarounds for. The most serious issue is that reducing the access permissions in a page table entry (such as turning off the valid bit or making the entry read-only) on one cpu can race another cpu's TLB trying to access that same entry. The race can cut an instruction into two pieces on the other cpu and (if e.g. a read-modify-write instruction) result in fireworks. All modern operating systems have to synchronize page table invalidations across all cpus that might be using the page table in question. So, e.g. in a heavily threaded environment if a page table is shared across three cpus invalidations made in that page table requires all three cpus operating systems to synchronize (usually with an IPI) to guarentee that none of them are accessing memory governed by the page table entry being changed. Kernel virtual memory is even worse, since that is shared by all cpus, which is why its better to just keep a cache of mapped memory instead of constantly mapping and unmapping pages in KVM.

      There are also serious issues with global pages and mixed TLB entries when switching from small pages to large pages, issues when operating in compatibility modes, issues when using address wrapping. Most of these issues only occur with absurd code sequences, such as an instruction which wraps the address space (which will never occur in real life so can be ignored as long as the issue does not cause a failure in the security model). 90% of the errata is not an issue in a nominally running environment.

      -Matt

    53. Re:Intel Macs not affected? by MikeBabcock · · Score: 1
      I was replying to the gp who said:

      they can have their microcode updated, but only with a dedicated bridged-bus eeprom burner ($15,000 or so).

      The fact that the hardware isn't changed is irrelevant -- microcode doesn't "live" in hardware traces so to speak, its a special form of software executed by the CPU at a very (extremely) low level.
      --
      - Michael T. Babcock (Yes, I blog)
    54. Re:Intel Macs not affected? by MikeBabcock · · Score: 1

      And are electrons really particles? lol

      Sorry, I had to, *runs*

      --
      - Michael T. Babcock (Yes, I blog)
    55. Re:Intel Macs not affected? by yppiz · · Score: 2, Insightful

      jd writes, in the parent post, "PGCC was rejected utterly by the GCC developers ... it typically produced greatly superior code for Intel-specific processors."

      I really wish gcc developers would choose performance over, well, whatever it is that they went for here.

      Two years ago, I compared C compilers for the AMD64 using the stream benchmark (I was developing an application that had similar performance characteristics to stream). The compiled code that gcc generated was, if I remember correctly, 30% slower than code generated by two closed-source compilers. In looking at the assembly, the chief difference was that the closed-source compilers were aware of the AMD64 series caches, and generated code that would disable or enable the caches as appropriate, resulting in much higher write speeds. gcc's code, on the other hand, appeared to be entirely unaware of the AMD64's capabilities, even with AMD64-specific command line flags enabled.

      If anyone in the gcc community is working on an Intel or AMD64-oriented performance fork, I would love to hear about it.

    56. Re:Intel Macs not affected? by petermgreen · · Score: 1

      why shouldn't it?

      usually an OS vendor wants to make thier OS run as reliablly as possible on as much hardware as possible. Presumablly that is why MS has shipped the patch for this issue and its a good reason for linux vendors to consider it too.

      --
      note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register
    57. Re:Intel Macs not affected? by MillionthMonkey · · Score: 1

      Why should there be a Linux patch for an Intel hardware problem?

      Because otherwise Linux would, oh, I don't know... suck? The hardware has been deliberately designed in anticipation of this type of snafu, to provide a mechanism so that a fix can be implemented in software, because they assumed at Intel that they would make mistakes, and they designed around that to allow a software workaround. That means it is now incumbent on Linux to address the issue like any other modern OS. "Oh well it was Intel's fault originally" would be a very revealing statement coming from a software engineer.

      Anyway, since I refuse on principle to let Windows Genuine Advantage creep onto my computer, no patch for me. This is where Linux could really shine.

    58. Re:Intel Macs not affected? by Wyzard · · Score: 1

      Anyway, since I refuse on principle to let Windows Genuine Advantage creep onto my computer, no patch for me. This is where Linux could really shine.

      A microcode update is volatile and has to be re-applied by the OS each time it boots. Installing the update in Linux won't give you updated microcode in Linux.

      However, some (most?) BIOSes do microcode updates, so your motherboard's next BIOS update might give you the fix for all OSes.

    59. Re:Intel Macs not affected? by Anonymous Coward · · Score: 0

      And? I don't see why you keep pointing that out...

    60. Re:Intel Macs not affected? by TheLink · · Score: 1

      Well the line between "some bits stored in the hardware" and hardware get quite blurry nowadays.

      If some change is nonvolatile is it hardware? And whether some change is difficult or easy quite depends on who is tasked to do the change (as I mentioned earlier - hacker or nonhacker).

      --
  4. Intel secrecy by jimmydevice · · Score: 1

    It's hard to get the errata for intel's processors when your a post SI test engineer, working for intel. Marketing seems to keep a tight fist on bad news.

    1. Re:Intel secrecy by tlhIngan · · Score: 4, Informative

      It's hard to get the errata for intel's processors when your a post SI test engineer, working for intel. Marketing seems to keep a tight fist on bad news.


      Yeah, because going to the processor's documentation page is hard to find. (Look under "specification update"). For the desktop Core2Duo processors, there are 59 pages(PDF) of errata documentation. Updated May 2007...
    2. Re:Intel secrecy by ajlitt · · Score: 1

      I think I now understand the root of the bug.

    3. Re:Intel secrecy by warrior · · Score: 1

      Typically the only people who know the true details of the errata are the engineers that own the circuits in question. Sometimes the cause is the result of a "perfect storm" of electrical events that wasn't seen as being possible in the pre-tapeout design phase, other times the cause is just plain igonorance/inexperience on the engineer's part. In any case you'll have only your most experienced engineers on the case and they'll be very tight-lipped about it. I know about a few of 'em, but I work over at AMD now, not that I could comment on this one even if I was still at Intel.

      --
      Intel transfer the difficult from Hadware to software, for get more power, programmer need more technology. -- chinaitn
  5. Is it a patch for DRM? by Anonymous Coward · · Score: 1, Interesting

    Smells like Digital Rights Management to me.
    You never know given the vague wording of the patch.

    1. Re:Is it a patch for DRM? by ettlz · · Score: 1

      Don't be so paranoid. Intel have been releasing microcode updates for ages, for processors much older than the current Core 2 models. This is nothing new and is not news.

    2. Re:Is it a patch for DRM? by IhuntCIA · · Score: 1

      Worse than that. I could be anything. Core power management, cache adjustment, performance altering. It could affect the CPU in major way. I do not like patching of the OS for the same reason, and I feel very bad about CPU patching.

    3. Re:Is it a patch for DRM? by Anonymous Coward · · Score: 0

      Then you'll be glad to know you can remove the fix by:
      (a) uninstalling the microcode patch from your system,
      (b) rebooting.

      Microcode patches like these are send to the CPU by the BIOS or the OS on each boot. There is no permanent change to the CPU itself.

      For that, you'll have to buy a new one (assuming they actually fix it with a later revision).

    4. Re:Is it a patch for DRM? by Anonymous Coward · · Score: 0

      You misspelled the word "Rights", it's spelt "Restrictions". :-)

  6. Linux users too... by EmbeddedJanitor · · Score: 1

    If it is a MS patch how will it fix an OS-independent CPU bug?

    --
    Engineering is the art of compromise.
  7. Microcode by bblount · · Score: 5, Informative

    This patch affects the microcode, which are the underlying machine instructions: http://en.wikipedia.org/wiki/Microcode

    How could this not affect Intel Macs? They use the same machine instructions that everyone else does!

    1. Re:Microcode by suv4x4 · · Score: 2, Insightful

      How could this not affect Intel Macs? They use the same machine instructions that everyone else does!

      Question is, how come you patch microcode hardware flaw with a software patch - is this affecting performance? Possibly.

      About the Macs not being affected: that was funny. Given how secretive the MS/Intel patches are, and we know Apple is totally open about stuff like that, right?

    2. Re:Microcode by Anonymous Coward · · Score: 0

      because they know that Macs aren't used for crunching numbers.

    3. Re:Microcode by antime · · Score: 1

      Question is, how come you patch microcode hardware flaw with a software patch - is this affecting performance? Possibly.
      If the patch replaces a very common hardcoded instruction then you will quite likely see a performance decrease. However, a slow instruction that produces the correct results is infinitely better than a quick one that doesn't.
    4. Re:Microcode by suv4x4 · · Score: 1

      However, a slow instruction that produces the correct results is infinitely better than a quick one that doesn't.

      Yup, but do you know what's better than both. A fast instruction that produced the correct results. In other words, if Intel drops $30 from the Core 2's I won't complain.

  8. Oh come on, it's nothing by Anonymous Coward · · Score: 5, Funny

    With two such large, trustworthy, open, and reliable organizations involved, which have always looked after the general well being of the industry because what's good us is good for them, do we really need to worry ?

  9. This is a possibility by EmbeddedJanitor · · Score: 1
    Microcode bugs will only bite you if you execute certain instruction sequences that trigger them.

    Perhaps this only happens on MS and not on Macs.

    --
    Engineering is the art of compromise.
    1. Re:This is a possibility by bblount · · Score: 1

      You are certinaly correct in that, but it seems quite unlikely that there are instructions that no other OS is taking advantage of.

    2. Re:This is a possibility by jmitchel!jmitchel.co · · Score: 1

      Then again, maybe Apple just hasn't released a patch for this yet. Dell calls this an URGENT update for the BIOS. Good bet that both MacOS and Linux are actually affected.

    3. Re:This is a possibility by Anonymous Coward · · Score: 0

      its not a single instruction. Its an instruction _sequence_

    4. Re:This is a possibility by Anonymous Coward · · Score: 0

      Hmm.. seems like people have a vague idea of what's going on, but the bottom line is that if a processor has a bug in its microcode, it will affect users on every OS, probably most or all of them. The codebase of modern operating systems and their associated userlands is far too vast to assume that *any* microcode will not be exercised. However, any _compiler_ worth its salt will try to use every bit of microcode it can to optimize for a given architecture or microarchitecture, so you can bet your ass that someone (more likely thousands of someones) have written programs which will trigger this bug (or whatever you want to call the defect that triggered this patch). All that said, the chances of this being more of a showstopper than even the relatively minor FDIV bug are remote, at best. This is due to a multitude of factors; Intel's newfound paranoia in verifying their chips through simulation, formal methods, and emulation, the number of users who seem to be coasting along just fine on all these processors, etc..

    5. Re:This is a possibility by larry+bagina · · Score: 1

      many of the old krufty 8086 era CISC instructions are implemented in microcode. Modern compilers won't generate them, but windows still supports 16-bit DOS programs that may use them. Heck, windows still has 16-bit compatibility code. OS X (and linux, freebsd, solaris, etc) are modern, 32 bit clean, so they aren't affected.

      --
      Do you even lift?

      These aren't the 'roids you're looking for.

    6. Re:This is a possibility by Anonymous Coward · · Score: 0

      Except that the 64 bit versions of the various MS operating systems removed the 16-bit compatibility code. So if the problem was 16 bit apps, the x64 OSes wouldn't need it.

      I suspect the problem affects Macs as well; it is known to affect Linux as well as MS, so I doubt Macs are immune. But who knows, maybe Apple pushed out the patch themselves as part of a larger update a while ago. This microcode problem has been known and fixed in the BIOS for many machines since early April; given Apple's control of the hardware they may have
      A) Done a BIOS update during a patch push
      B) Had the OS perform the microcode update on each boot

    7. Re:This is a possibility by be-fan · · Score: 3, Informative

      It's actually quite likely. CPU errata tend to effect corner cases. Eg: CPU returns wrong data if you read from an I/O port while servicing a TLB miss (or something like that). These bugs tend to be highly timing and sequence dependent, and its very likely that no two OSs use exactly the same sequence that triggers the bug.

      --
      A deep unwavering belief is a sure sign you're missing something...
    8. Re:This is a possibility by be-fan · · Score: 4, Informative

      . However, any _compiler_ worth its salt will try to use every bit of microcode it can to optimize for a given architecture or microarchitecture

      Actually, compilers try to avoid micro-coded instructions like the plague. On most x86 processors, micro-coded instructions can only issue out of a single issue slot at a fixed rate, and hence their use drastically lowers performance. Modern compilers generally treat the x86 like a RISC with a weird condition register and fancier addressing modes.

      --
      A deep unwavering belief is a sure sign you're missing something...
    9. Re:This is a possibility by Anonymous Coward · · Score: 0

      like

      nop
      nop
      nop
      nop

      Windows optimised

    10. Re:This is a possibility by sumdumass · · Score: 1

      Maybe the issue is taking advantage of the instructions in a particular way. Like the old, old pentuim flaw that caused the calculator program in windows 3.1/95? to display an incorrect result if numbers were calculated a certain and specific way.

      Apple might be taking advantage of it, but it might not be on the same way Microsoft does.

    11. Re:This is a possibility by antime · · Score: 1

      The errors described in that article were most certainly not caused by the FDIV bug, but by far simpler software flaws. IIRC, earlier versions of the calculator used straight floating-point calculations which obviously won't yield correct answers in a huge number of cases. Newer versions use arbitrary-precision math and don't suffer from these problems.

    12. Re:This is a possibility by antime · · Score: 1

      but the bottom line is that if a processor has a bug in its microcode
      Very few instructions are microcoded anymore, but Intel's processors have a feature where a hardcoded instructions can be patched out with loaded microcode. That is how these updates work, and I assume AMD have similar features.
    13. Re:This is a possibility by Anonymous Coward · · Score: 0

      But unless the other OS vendors can guarantee that sequence will never occur, ever, they have to patch. For instance, if Windows is vulnerable, what happens when you run Windows virtualized under a hypervisor?

    14. Re:This is a possibility by Anonymous Coward · · Score: 0
      > Very few instructions are microcoded anymore,

      Really? If you can think of a way to do an

      add mem_addr eax
      without microcode we'd all love to hear it.
    15. Re:This is a possibility by antime · · Score: 1

      The same way the microcode is implemented, only with a lot more transistors.

    16. Re:This is a possibility by Chatterton · · Score: 1

      I think he wanted to say hardwired and not microcoded.

    17. Re:This is a possibility by sumdumass · · Score: 1

      Yawn.

      I didn't say the problem was the FDIV bug. I was suggesting that Microsoft was effect and apple might not because they access things differently. In the same sense that Calc.exe would produce it but adding the same numbers in Excell formulas wouldn't. Or when some statements could be completed one way with a different result if you reversed the process. (315 + 5 apposed to 5 + 315)

      "Apple might be taking advantage of it (the instruction), but it might not be on the same way Microsoft does"

    18. Re:This is a possibility by be-fan · · Score: 1

      I'm not saying that they don't need to patch it, I'm just saying that it's very likely that people on other platforms have never run into it.

      --
      A deep unwavering belief is a sure sign you're missing something...
  10. ah, time to dig up the bluewave tagline file... by jollyreaper · · Score: 5, Funny

    How many Pentium designers does it take to screw in a light bulb? 1.94
    Pentiums and Deodorants - When being close is all that matters
    Highlander Pentium: There can be only 1.0101002913491!
    Talking Barbie and the Pentium-90 agree! "Math is hard!"
    "Go forth and multiply... divide only if not on a Pentium..."
    "I am Pentium of Borg--prepare to be approximated"
    Pentium: Making tomorrow's mistakes today
    Pentium slogan: Why Do You Think It's Called *Floating* Point?
    Pentium slogan: Nearly 300 correct opcodes!

    Yeah, I know that Intel bashing is old, that's why I used old jokes.

    --
    Kwisatz Haderach
    Sell the spice to CHOAM
    This Mahdi took Shaddam's Throne
    1. Re:ah, time to dig up the bluewave tagline file... by minion · · Score: 3, Funny

      Man, it was just last week I finally decided to clear out all pre-95 taglines from my BlueWave ONELINER.TXT file. Doh!
       
      I do have these gems still though:
       
      Win2k: "It's not so much that it's only 65,000 bugs, it's just that they stopped at 65,535 to prevent an overflow."
       
      Sun believes the only place for 63,000 bugs is a rain forest.
       

      --

      -- If we don't stand up for our rights, now, there will be no right to stand up for them later.
    2. Re:ah, time to dig up the bluewave tagline file... by Enderandrew · · Score: 1

      That takes me back.

      "If Windows were an ice cream, it would be hoggin' dos!"

      I miss my BBS'in days.

      --
      http://blindscribblings.com - Tasty pop-culture in conceptual fashion.
    3. Re:ah, time to dig up the bluewave tagline file... by Nefarious+Wheel · · Score: 1

      Do you know why they called it the Pentium? They added 100 to 486 and kept coming up with 585.911323457

      --
      Do not mock my vision of impractical footwear
    4. Re:ah, time to dig up the bluewave tagline file... by Alioth · · Score: 1

      Q. The Pentium has an IEEE-compliant floating point unit. If you are on an aircraft, with onboard systems powered by a Pentium, how is IEEE pronounced?
      A. Aaaaaiiieeeeeeeeee!

    5. Re:ah, time to dig up the bluewave tagline file... by Anonymous Coward · · Score: 0

      Talking Barbie and the Pentium-90 agree! "Math is hard!" I'm kind of disappointed that you're picking on the Pentium-90 here. IIRC, only the Pentium-60 was affected which is why the computers at the University I was attending were all upgraded to Pentium-75s, and we didn't get Pentium-90 machines until much later.
    6. Re:ah, time to dig up the bluewave tagline file... by Overzeetop · · Score: 1

      Actually, it was the P90s. I had to petition to get three new machines new chips when I worked at NASA, since all of them were involved with finite element modeling of critical spaceflight hardware. That was back when I was hot shit for getting a P75 and overclocking it to 120Mhz (133 was unstable), and dropped $640 on 8MB of ram so I could run NT at home. *shakes head*

      --
      Is it just my observation, or are there way too many stupid people in the world?
    7. Re:ah, time to dig up the bluewave tagline file... by smellsofbikes · · Score: 1

      My favorite: Intel, where quality is job #0.99997863456!

      --
      Nostalgia's not what it used to be.
  11. Why Mac OSX not affected by Anonymous Coward · · Score: 5, Funny

    Mac OSX does not make use of the new x86 BNDOVR opcode, unlike Windows which is dependent on it.

    1. Re:Why Mac OSX not affected by Nazlfrag · · Score: 1

      Yeah, they just use the FAIRPLY one instead.

  12. Some more details by macemoneta · · Score: 5, Informative
    I had submitted some additional details in a rejected submission:

    Two months ago, Intel introduced microcode updates for all systems with an Intel® Core(TM) 2 Duo processor. According to an HP Tech Support Document:

    While the implications of the issue are difficult to quantify, any of the following symptoms can occur:

    * The system may stop responding to keyboard or mouse input.
    * A system operating in a Microsoft Windows environment may generate a blue screen.
    * A system operating in a Linux environment may generate a kernel panic.

    This was the first I had heard of this; probably a good time to check for BIOS or microcode updates."

    The HP link also indicates the nature of the problem, which should not be OS specific:

    This Intel microcode update addresses an improper Translation Lookaside Buffer (TLB) invalidation that may result in unpredictable system behavior such as system hangs or incorrect data.

    --

    Can You Say Linux? I Knew That You Could.

    1. Re:Some more details by ibentmywookie · · Score: 4, Informative

      For those that are wondering, the Translation Lookaside Buffer is what is used to map Virtual Addresses to physical page addresses. The TLB is a cache of recent translations between Virtual and Physical addresses. So what could happen with incorrect invalidation is that the WRONG physical page could be resolved and bogus data accessed by the operating system.

      More here.

      --
      -- The doctor said I wouldn't get so many nose bleeds if I just kept my finger out of there!
    2. Re:Some more details by Kingrames · · Score: 1

      "* A system operating in a Microsoft Windows environment may generate a blue screen."

      So this is a "sky is blue" type of error then?

      --
      If you can read this, I forgot to post anonymously.
    3. Re:Some more details by Bacon+Bits · · Score: 1

      Yes, it looks like MS is releasing this to cover systems that aren't expected to get BIOS updates or to be used in lieu of a BIOS update.

      Still seems odd to me, but the quietness of the issue doesn't encourage any suspicion for me.

      MS often releases non-security and non-critical updates in a graduated manner:
      First, you must call PSS to be able to download the patch. MS just wants to be sure the patch fixes the problem. You're a beta tester.
      Next, they release the patch for public download. Affected users will find or be directed to the KB article and apply the update.
      Finally, if enough people download the update, they release it to Windows Update for general download.

      Most updates that make it to stage 2 are rolled into the next Service Pack, as are all the updates from the last stage.

      --
      The road to tyranny has always been paved with claims of necessity.
    4. Re:Some more details by SpaceLifeForm · · Score: 4, Interesting
      From an exploit point of view, this is better than a buffer overflow. Load some data page with some magic, force the bug to occur. Lots of fun.

      --
      You are being MICROattacked, from various angles, in a SOFT manner.
    5. Re:Some more details by Forkenhoppen · · Score: 1

      The system may stop responding to keyboard or mouse input.

      Hmm, that sounds suspiciously like the behavior I've been having with an Athlon X2 and a 64-bit Suse 10.1 install.

    6. Re:Some more details by John+Hasler · · Score: 1

      You cant execute these sorts of instructions from user space.

      --
      Warning: this article may contain humor, sarcasm, parody, and perhaps even irony. Read at your own risk.
    7. Re:Some more details by John+Hasler · · Score: 1

      Why did Slashdot eat my apostrophe? Now it is eating my double quotes as well!

      --
      Warning: this article may contain humor, sarcasm, parody, and perhaps even irony. Read at your own risk.
    8. Re:Some more details by Megane · · Score: 2, Informative

      Geez, people, turn off the stupid damn "smart quotes" in your Internet Exploder already. Or stop editing your message in Microsoft Weird and then pasting it into IE.

      --
      #naabhaprzrag, #sverubfr-000, #agi-fcbafberq, negvpyr[pynff*=' negvpyr-ary-'] { qvfcynl: abar !vzcbegnag; }
    9. Re:Some more details by Kalriath · · Score: 1

      Um, IE doesn't have "smart quotes"

      Lay off the crack.

      But yes, don't edit your messages in Microsoft W0rd before posting. That's just nasty. If you really must spellcheck it, use Firefox.

      --
      For a site about things like basic rights, Slashdot users sure do like to censor "dissent".
    10. Re:Some more details by Anonymous Coward · · Score: 0

      The TLB is not an instruction so much as something that happens transparently when paging is enabled. What the poster is referring to is, some user program could set up a page in memory with an exploit vector and then wait for the cache bug to manifest itself. Then the the CPU might erroneously think that the exploit vector is in some ring0 location.

  13. More useful information on the update (possibly) by Anonymous Coward · · Score: 0

    There was a microcode update released as part of system BIOSes a couple months back; this may be a workaround for people who cannot or will not update their system BIOS.

    The most complete information I could find was posted as part of HP's BIOS update: http://h20000.www2.hp.com/bizsupport/TechSupport/D ocument.jsp?objectID=c01020735&dimid=908755463&dic id=alr_apr07&jumpid=em_alerts/us/apr07/all/xbu/ema ilsubid/mrm/mcc/loc/rbu_category/alerts

    Looks like the primary problem is system stability, though I suspect imaginative people could probably find a security vulnerability with the TLB.

  14. Dell told me "Windows only" by whoever57 · · Score: 1

    My company was contacted by Dell about a month ago regarding our rack mount server that uses a 5100-series CPU. However, they told me it only affects Windows.

    --
    The real "Libtards" are the Libertarians!
    1. Re:Dell told me "Windows only" by DaveWick79 · · Score: 1

      That's because Dell is pretty much only "Windows only". Why should they care about anything else?

    2. Re:Dell told me "Windows only" by whoever57 · · Score: 3, Informative

      That's because Dell is pretty much only "Windows only". Why should they care about anything else?
      You do know that Dell offers Red Hat Linux on most if not all servers, don't you?
      --
      The real "Libtards" are the Libertarians!
    3. Re:Dell told me "Windows only" by DaveWick79 · · Score: 1

      You're right, I wasn't really thinking server. I was thinking more about the non-existent Linux 'support' they have on the workstation/desktop side. I've never had to contact server support for linux so I don't know how well or if they give a rat's arse about those customers.

    4. Re:Dell told me "Windows only" by ArbitraryConstant · · Score: 2, Informative

      My dealings with Dell on the server side have been pretty satisfactory, even running Slackware or OpenBSD.

      My only complaint is the satisfaction survey they send you after the issue is resolved (not kidding).

      --
      I rarely criticize things I don't care about.
    5. Re:Dell told me "Windows only" by Fallen+Kell · · Score: 1

      No its because Dell doesn't want to have to release a BIOS update for all the affected systems, which would be any system that uses socket 775 or 771 motherboards made/sold in the last 3-5 years. So they basically say that it is a Windows only issue so they can use the built in Windows microcode loader which layers the microcode onto the CPU at every boot (since it is lost when it reboots).

      --
      We were all warned a long time ago that MS products sucked, remember the Magic 8 Ball said, "Outlook not so good"
  15. the next big thing in operating systems by uepuejq · · Score: 0

    maybe they're working on testing a system for installing software to processors. why build a machine to do it when you can test it in theory on tons of free machines? maybe microsoft and intel are working on the next big shift in our software and processors. modern processors are gaining cores rapidly, why not have these cores programmed to execute specific operations?

  16. flash the CPU Microcode - YIKES! by mosel-saar-ruwer · · Score: 2, Insightful


    Uhh, you can flash the CPU Microcode from within a Microsoft OS?!? [Other than DOS?!?]

    Wouldn't this pose like the Mother of All Possible Challenges to the Black Hat community - how to right a worm that could flash CPU's, thereby rendering nearly limitless power over every possible sandboxing or anti-virus countermeasure?

    Kinda the Helen of Troy [or Anne Boleyn] of Hax0r/Crax0r Wet Dreams?

    Seriously - how can you hope to maintain the illusion of Virtual Machines if you can write to the microcode?

    1. Re:flash the CPU Microcode - YIKES! by Anonymous Coward · · Score: 0

      It's not so much flashing... and it would be pointless to do it from DOS. Microcode updates don't persist between boots. The patch would have to be applied on start-up every time.

      That said, I don't know the security implications. It would be a little unnerving if one could punch through a VM that way.

    2. Re:flash the CPU Microcode - YIKES! by andreyw · · Score: 4, Insightful

      Uh, read the fine documentation. Microcode updates don't survice power-off. Nevermind that the microcode is a blackbox format, dependent on the chip and likely with a bajillion signatures the silicon checks.

    3. Re:flash the CPU Microcode - YIKES! by timmarhy · · Score: 2, Insightful

      1. blackbox does not make it saver 2. so what if it doesn't survive a boot, just reprogram it with your hacked code every boot

      --
      If you mod me down, I will become more powerful than you can imagine....
    4. Re:flash the CPU Microcode - YIKES! by crypticgeek · · Score: 1

      Of course it is. Especially now with virtualization, the ultimate hack is controlling the cpu at the virtualization level. You don't have to necessarily control the OS, but if you control the virtualization you can control it by proxy and the OS would have NO IDEA what was going on. Sort of like the Matrix. How would you know you're inside it? You couldn't. Neither could the OS. Search "blue pill attack" for discussion on the security implications of these cpu virtualization implementations.

    5. Re:flash the CPU Microcode - YIKES! by GauteL · · Score: 3, Insightful

      "so what if it doesn't survive a boot, just reprogram it with your hacked code every boot"

      Which makes it no worse than any other hack, virus or worm. You can already take complete control over the computer without resorting to microcode.

      If it had been permanent and survived reboots, then a complete format and reinstall would not remove the hack. That would have been scary indeed, but luckily that is not the case.

    6. Re:flash the CPU Microcode - YIKES! by un1xl0ser · · Score: 1

      Which makes it no worse than any other hack, virus or worm. You can already take complete control over the computer without resorting to microcode. I think that what this would get down to is detectability. It is also above most script k1ddi3z to reverse engineer signed (most likely) black-box microcode in the first place, let alone make it do anything that would be useful to an OS. Most likely, I would think that one could come up with a series of instructions in a very particular order, that when run, would crash the system. If you had a reliable way to make the OS trigger this condition, especially remotely, you could have a lot of fun.

      That could be hard to detect, considering that there is nothing in the OS to blame, just some microcode that a lot of people would o overlook.
      --
      v4sw6PU$hw6ln6pr4F$ck 4/6$ma3+6u7LNS$w2m4l7U$i2e4+7en6a2X h
    7. Re:flash the CPU Microcode - YIKES! by oojah · · Score: 1

      This is also possible under Linux as well, in case you don't know. This is from "Processor type and features -> /dev/cpu/microcode - Intel IA32 CPU microcode support" help when configuring the linux kernel:

      CONFIG_MICROCODE:

      If you say Y here and also to "/dev file system support" in the 'File systems' section, you will be able to update the microcode on Intel processors in the IA32 family, e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4, Xeon etc. You will obviously need the actual microcode binary data itself which is not shipped with the Linux kernel.

      For latest news and information on obtaining all the required ingredients for this driver, check: <http://www.urbanmyth.org/microcode/>.

      --
      Do you have any better hostages?
    8. Re:flash the CPU Microcode - YIKES! by Megane · · Score: 1

      1. blackbox does not make it saver

      No, but "dependent on the chip" does, because then you don't have a monoculture. Even if you figure out something useful with one chip, it doesn't necessarily apply to any other chip.

      It's also rather hard to reverse engineer without lots of special expensive hardware that probably doesn't exist outside of Intel's (or AMD's) labs. Remember, if you do something even a little wrong that locks up the CPU, you will have to hard reboot and try again.

      And before you bring up the F00F bug as a denial of service, this is not something that the average user has access to run. The F00F bug worked in unprivileged user mode.

      --
      #naabhaprzrag, #sverubfr-000, #agi-fcbafberq, negvpyr[pynff*=' negvpyr-ary-'] { qvfcynl: abar !vzcbegnag; }
    9. Re:flash the CPU Microcode - YIKES! by Joe+U · · Score: 1

      Considering that the microcode patcher has to run every single time the system is booted, why not just detect that file?

      And why would an AV company overlook Mcupdate_genuineintel.dll vs somerandom.dll?

      Sorry, your theory won't work, It would require too many 'what ifs'. Besides, if they were able to reverse engineer a signed dll, why would they bother updating the microcode in the cpu? They would own the OS at that point, you can do much more once you have control of the OS.

    10. Re:flash the CPU Microcode - YIKES! by TheRaven64 · · Score: 1
      Microcode can only be updated from ring 0. If you've already compromised ring 0, there are a lot of simpler things you can do to take control of the computer (in fact, by definition, you already have total control of the computer).

      Note for pedants: On VT-i machines, replace 'ring 0' with 'ring 0 in VMX root mode.'

      --
      I am TheRaven on Soylent News
  17. Big freaking deal by Anonymous Coward · · Score: 0

    Microcode updates get released all the time. XP SP2 shipped with around 100 microcode patches for various processors, and that wasn't even all the updates available. The update driver had a limited catalog so only the most popular updates could be included. I don't know how many updates ship with Vista but there had to have been dozens more over the last few years.

  18. Comment removed by account_deleted · · Score: 4, Informative

    Comment removed based on user account deletion

  19. quietly ... by barra.ponto · · Score: 1

    > has been quietly released...

    One of the files in the update is called Update-bf.mum. That's why they're keeping it quiet :-)

  20. Of course Apple users aren't affected... by Anonymous Coward · · Score: 0

    Because Macs don't have bugs.... ever.... ... ... ...
    They have "error codes". 32767 to be exact.

  21. Linux may not be affected by laing · · Score: 3, Interesting

    True story:

    I ran an AMD Athlon in an Asus MB as a Linux server for 4 years with no trouble (other than noticing that mplayer didn't work right). A few years after I decomissioned the MB, I decided to set it up as an XP box for my 4 year old. I was very surprised to discover that it just would not work right. After some troubleshooting, I found that the CPU had a bug in some of the MMX instructions. By this time it was too late to exchange the chip for a functional one so I just threw it away and bought another one from eBay. My 4 year old is happy with his computer.

    1. Re:Linux may not be affected by kestasjk · · Score: 1

      It speaks badly about GCC's reluctance to use MMX/SSE instructions.

      --
      // MD_Update(&m,buf,j);
    2. Re:Linux may not be affected by monsterlemon · · Score: 2, Informative

      No it doesn't. Many (possibly most?) Linux distributions by default target non-MMX processors for the sake of wider compatibility.

      And we're not all Gentoo-style rice, er, I mean D-I-Y-ers who just have to build everything for ourselves.

      In fact, these days I would expect that most Linux users are unlikely to build software for themselves very often, if at all.

    3. Re:Linux may not be affected by innocent_white_lamb · · Score: 1

      What, were you serving X11?
       
      Something wrong with that?

      --
      If you're a zombie and you know it, bite your friend!
    4. Re:Linux may not be affected by Mr2cents · · Score: 1

      Are you implying that GCC will use MMX instructions out of its own? I once ran into the "vector" keyword, like in vector int bla[3]; so I think you have to write code specifically for MMX.

      Disclaimer: I could be totally wrong.

      --
      "It's too bad that stupidity isn't painful." - Anton LaVey
    5. Re:Linux may not be affected by Anonymous Coward · · Score: 1, Informative

      Nowadays GCC can use SSE/SSE2 for floating-point math if you ask it to (it's quicker than x87 code, but doesn't support 80-bit extended precision). There's also the vector extensions you encountered, and there's a new vectorizer that can automatically convert code into parallel operations.

    6. Re:Linux may not be affected by Grimbleton · · Score: 0

      What, you're not allowed to listen to music while updating something on a server?

    7. Re:Linux may not be affected by TheRaven64 · · Score: 1
      The vector keyword is an Apple/Motorola extension and only works for PowerPC. There are three ways of using vector ops in GCC:
      1. Lay out your data so a vector unit can operate on it (128-bit aligned, etc) and let the compiler do it for you (100% portable). Most modern compilers do some form of auto-vectorisation, which will attempt to turn groups of scalar operations into vector ops. It's a hard problem to get right though. It would be much easier with a language that allowed the compiler to define the memory layout, not the programmer.
      2. Use the vector intrinsics (things that look like functions but will compile down to a single SIMD instruction, maybe with a load and store). Since these are generally defined by the CPU manufacturer, they are fairly portable across compilers, but not across architectures.
      3. Use thevector_size __attribute__ to define a vector type and then use standard operations (+,-,/,*, etc) on it to get basic SIMD ops for your target architecture. This works with all architectures (on ones without a SIMD unit, it will generate scalar code), but ties you to GCC.
      See here for more info.
      --
      I am TheRaven on Soylent News
    8. Re:Linux may not be affected by Anonymous Coward · · Score: 0

      It will use them if you specify -mmmx or -msse on the command line. There are probably other flags for more specific versions of SSE also. Consult the GCC manpage.

    9. Re:Linux may not be affected by Wyzard · · Score: 1

      However, it defaults to x87 math on 32-bit processors, unless you tell it otherwise with "-mfpmath=sse". (And SSE math isn't even an option unless you tell it to compile for an SSE-capable target, with an option such as "-march=686"; the default is generic 386.)

      SSE math is the default on 64-bit systems, though.

  22. Looks like an OS update by DaveWick79 · · Score: 1

    Patches distributed by Microsoft, for microsoft products. Seems like an MS problem rather than an Intel issue, which kind of makes the title of this article misleading.
    However, this sounds very similar to the issue with Prescott CPU's and XP SP2, where an installation on a system with a CPU below stepping 8 would hard freeze on restart after the initial setup. In that case the fix was a BIOS update OR disabling L1 and L2 cache.

    1. Re:Looks like an OS update by ihavnoid · · Score: 1

      Not exactly. They said it is a microcode update, which updates the processor, not the operating system.

      The reason it only affects Microsoft Windows may be because only Windows triggers that processor bug, and other operating systems doesn't. Of course, there can be software workarounds (rewrite Windows to bypass the bug), but why rewrite code when Intel already released their 'patch' for their microprocessor?

      FYI, 'microcode' is simple code (not x86, an internal format) that runs inside the processor. Normally, simple instructions gets translated into a single 'internal operation', but if the instruction is complex, the internal 'microcode engine' kicks in, and runs the microcode that mimics the instruction's behavior. What's amazing, is that a microcode fix can eliminate so many kind of bugs (sometimes, by disabling hardwired logic and replacing it with microcode).

      Actually, Both Intel and AMD releases microcode updates frequently, fixing thousands of bugs even after product release.

      PS : I don't work for any of the companies mentioned above, so details may vary.

    2. Re:Looks like an OS update by jorghis · · Score: 1

      I work at a company that makes operating systems. It is not uncommon for us to issue workarounds when hardware problems are found with processors. Just because MS is issuing a patch doesnt mean that it is their fault.

    3. Re:Looks like an OS update by DaveWick79 · · Score: 1

      So apparently MS has a dll (or in XP's case, a .sys) file that has the capability of identifying a given processor and writing microcode updates to it. In one respect, I can see how this can be useful; on the other respect, if it ever got hacked we could be left with a whole lot of junk CPU's that couldn't be booted from.

    4. Re:Looks like an OS update by jorghis · · Score: 1

      I am not familiar with these updates, but I doubt that this is whats going on, it seems unlikely that MS is writing microcode updates for intel processors. Its probably modifications to the windows kernel to work around some bugs. As an oversimplified example one time I was working on a project and it was discovered that one of the processors we build for could generate a spurious interrupt under rare circumstances as a result of a tlb miss but the cache being hit at the same time. (it was more complicated than this, I am oversimplifying) So we simply added a check to the exception handler to see if the cache and tlb were in this state and ignoring the exception if it was. My point here is that software workarounds in the kernel for hardware problems are not unheard of or even that rare. In many cases they are absolutely necessary.

      Now all that being said, I have no idea what the content of MSs patches were. But it sounds like they are just working around intels bugs. :)

    5. Re:Looks like an OS update by atrus · · Score: 2, Informative

      Linux has it too (microcode updates have been available since the Pentium Pro days). The microcode update is soft though, the original microcode is restored on a reboot. The best fix would be a relevant BIOS update which loads the patched microcode much earlier.

    6. Re:Looks like an OS update by Wyzard · · Score: 1

      Why wouldn't they be loading the microcode update that Intel has already issued? There's no need for a software workaround when the processor's erroneous behavior can be fixed directly.

      Windows most likely already has a driver for loading new microcode into an Intel processor -- I'd be surprised if it didn't, since it's been supported by hardware as far back as the Pentium Pro -- so this update is presumably just a new microcode file to be loaded by that driver.

    7. Re:Looks like an OS update by jorghis · · Score: 1

      After looking around a little bit more it sounds like you are right. My bad.

  23. It is quite common for some instructions by EmbeddedJanitor · · Score: 4, Informative
    There are a whole set of instructions to do with cache handling and other OS-centric things that will often be used differently on diferent OSs and it could be one of these. This sort of bug would only manifest itself in certain OSs and in certain ways.

    Typically it is only sequences of instructions that would trigger these bugs. In other words, the CPU has to be in a certain state to trigger the bug. Some OSs will never get in that state. The bugs are surely something like this because otherwise crashes would be far more common than we see.

    The reason why I mention cache handlers is because those are notoriously tricky and have proven buggy before. The Core Duo 2 CPUs need new cache handlers to handle the dual (and more) cores and thus this area is more likely to be buggy.

    --
    Engineering is the art of compromise.
  24. Fixed for nVidia 680i with P28 BIOS by Anonymous Coward · · Score: 0

    Assuming this is the same microcode update that I think it is, anyone on a nVidia 680i motherboard who has kept up with the BIOS releases (namely, P28) has already fixed this.

  25. Intel price cuts? by sumdumass · · Score: 1

    I would be interesting to find how long Intel knew about this and if it had anything to do with rushing to market to compete with AMD and their recent price cuts.

    It's sort of chicken and eggish when talking hamburger, but is the defect because of the price cuts to compete or is the price cuts because of the flaw? Or is it totally unrelated with either and I'm just throwing balls at the side of the barn and missing?

    I am wondering though, doe this mean I would have a CPU that doesn't do everything it was supposed to do before the patch and flaw was know? I mean does the patch limit the processor or screw with it's abilities in anyway other then stopping errors? I'm dieing to know.

    1. Re:Intel price cuts? by Fallen+Kell · · Score: 1

      It is just a normal microcode fix. From what I have been able to gather it is a fairly rare set of conditions that need to occur, but if they do, the memory lookup will return with the incorrect address and thus potentially crash the system. This is nothing to do with the price cuts as the price cuts were announced back in November of 2006. This error also isn't a 1+1=1.91 type error, but more of a sequential combined instruction type error in which something was done out of order or didn't run a proper test. As such, it can be worked around with a microcode update to fix the sequence of instructions that the CPU performs, unlike the condition with a bad math processor or int to float conversion...

      --
      We were all warned a long time ago that MS products sucked, remember the Magic 8 Ball said, "Outlook not so good"
  26. May not affect Macs, or just not tested by Gothmolly · · Score: 2, Informative

    It might NOT affect Macs, because of the way the OSX kernel handles specific failures. Remember when the F00F bug came out, Linus himself quickly came up with a Linux patch that mapped it over to (IIRC) a page fault, which then was handled separately. DOS machines just died.

    For this PARTICULAR microcode issue, OSX _may_ do something interesting with it, and so not be affected. Or, they simply never tested/validated it, and so Apple has no patch.

    --
    I want to delete my account but Slashdot doesn't allow it.
  27. CPU's are Emulators by Effugas · · Score: 4, Informative

    So here's the deal.

    Intel processors don't directly execute instructions anymore. They translate x86 into a series of other operations -- an internal code, if you will. Sometimes there are bugs in the code that's generated. Microcode patches address those bugs.

    1. Re:CPU's are Emulators by Anonymous Coward · · Score: 0

      Anymore? There's nothing new about microcode. The only difference is that microcode is nowadays loaded from ROM into a "RAM" type storage, which can be updated at runtime. Therefore, these patches are actually applied at every boot, to keep bugs away. If you do a BIOS update, the new microcode is loaded already during POST.

    2. Re:CPU's are Emulators by kent.dickey · · Score: 1

      I don't believe the parent post is really correct about any recent Intel/AMD processor.

      I think the 25+ year old 8086 was fully microcoded, but recent processors have only limited microcode. Most instructions are natively executed--no microcode is involved. Granted, Intel converts "macro-instructions" into "uops" but this isn't really microcode--it's all hardwired to be fast. There is no "microcode table" that converts macro-ops to micro-ops.

      However, the x86 has so many complex instructions, that those are microcoded. For example, I would expect FSIN and FCOS and all the transcendental functions to be microcoded. It's also likely things like loading segment registers, taking interrupts, and TLB handling are all microcoded.

      After the FDIV bug, Intel realized that microcode could be a good way to patch bugs. So they came up with downloaded microcode. They added a hardware detected signature, so effectively only Intel can generate microcode patches. So it's safe for any OS to load it since the hardware checks the signature. But in general, the BIOS loads microcode patches so that the OS'es don't need to.

      I have no information on this, but I suspect the downloaded "microcode" can change chip features other than just the actual microcode. Now that chips have 100+ million transistors, it would seem to be wise to spend a few redundantly to allow clever patches to "hardwired" logic.

  28. It Just Works by sssssss27 · · Score: 1

    Haven't you seen the commercials? It just works don't ask questions.

  29. Of course they are not affected by Anonymous Coward · · Score: 0, Funny

    If they were, it would be called the iPatch.

    1. Re:Of course they are not affected by Belacgod · · Score: 1

      That's the one that addresses piracy?

  30. microcode update buggy for real-time applications by Anonymous Coward · · Score: 1, Interesting

    BEWARE: There is a bug in this microcode update that causes problems in some realtime video and audio applications, for instance, Pro Tools.

    At least, HP's new BIOS have this issue. Caused a major headache tracking this one down. Has something to do with erratic time values being returned when calls are made at high resolutions (for instance near 30 milliseconds...)

  31. Slashdot readers and microcode by mrsteveman1 · · Score: 4, Insightful

    After reading this thread its amazing to me how many Slashdot readers don't know how microcode works, making broad statements about how patching a processor is impossible without an EEPROM burner, or using a DOS boot disk.

    1. Re:Slashdot readers and microcode by zakeria · · Score: 1, Funny

      second that; perhaps they just ignore anything that begins with micro----

    2. Re:Slashdot readers and microcode by DigiShaman · · Score: 2, Informative

      Microcode is included with all modern BIOS updates. As such, when you update your BIOS revision, you might get a newer microcode update to included. This microcode get's loaded on POST (Power On Self Test).

      As others have pointed out, it resides in RAM (or would that be CPU cache?). So the update must loaded each time you power on the system.

      --
      Life is not for the lazy.
    3. Re:Slashdot readers and microcode by Anonymous Coward · · Score: 0

      mrs. tevenman1,

      eat a dick. ty.

  32. Sir, you will no doubt be shocked to learn.... by Anonymous Coward · · Score: 5, Funny

    that this neither comes with a silver platter, or chilled champagne. I know when this realization dawned on me, my monocle popped out and rolled under my desk. My gentleman's gentleman, Wheatley, has noted his displeasure with your oversight while remedying the situation.

  33. Waxing nostalgic by Enderandrew · · Score: 2, Interesting

    Intel was just waxing nostalgic and wanted to remember the good only days.

    http://en.wikipedia.org/wiki/Pentium_FDIV_bug

    --
    http://blindscribblings.com - Tasty pop-culture in conceptual fashion.
  34. Quiet? by frizz · · Score: 1

    According to this article in The Inquirer and this Microsoft Knowledge Base article, a fix for some significant problems in many of Intel's most recent processors has been quietly released.


    News of this errata fix is posted on The Inquirer, in a Microsoft Knowledge Base article, and now Slashdot. I wouldn't call this "quietly released."
    1. Re:Quiet? by Luvman5 · · Score: 1

      Are you retarded? Please.. It sure wasn't listed out on Intel's front page or announced publicly. There are literally thousands of knowledge based articles. Does every user have lots of time to go through every KNB there is? Unless you knew to look for it, you'd never find it. Slashdot and the Inquirer especially post news that isn't out in the general public & mainstream media. That's what they focus on -- the dirt and not-so-public info that 'inquiring minds want to know' (to steal a phrase from the National Inquirer). If you hadn't seen this article on Slashdot would you have known otherwise? Have you seen it all over the mainstream tech news? If it wasn't for them digging it up, you wouldn't know. Have you seen public announcements by Intel or critical updates on Intel's or Microsoft's website telling all their customers that they need to get this update? NO.... And you won't. Because Intel doesn't want a bunch of bad publicity or an image of 'we produce flawed processors' when they try to keep a pristine image purely of "we're the most reliable and stable processor available". That's been their marketing for years and it's worked well for them. How many times have system and network admins and MIS Directors and so on made standardizations on Intel purely because they had a mindset that Intel processors were the stable ones and that if they went with AMD that it would risk stability on their systems? The whole mindset that Intel has created is that their processors are THE standard for stability and perfection. That's why it's been kept quiet. Just because you're obviously a die-hard Intel fan doesn't mean you have to get instantly defensive. lol

  35. The reason MAC's are not effected... by Tibor+the+Hun · · Score: 0, Troll

    Is because they have such small user base, naturally. ;)

    --
    If you don't know what AltaVista is (was), get off my lawn.
    1. Re:The reason MAC's are not effected... by Jesus_666 · · Score: 0, Offtopic

      Of course MAC's computers only have a small user base, namely MAC. By the way, who is this MAC? Should I know him?

      --
      USE HOT GRITS WITH STATUE OF NATALIE PORTMAN (NAKED AND PETRIFIED)
    2. Re:The reason MAC's are not effected... by Anonymous Coward · · Score: 0
      A few things:
      • Mac is short for Macintosh, it's not an acronym so it shouldn't be capitalised.
      • You don't need an apostrophe for a plural.
      • It's affected not effected.
      • You're a retard.

      There, all fixed.
    3. Re:The reason MAC's are not effected... by Tibor+the+Hun · · Score: 1

      You've got to pay attention to the wink at the end.

      --
      If you don't know what AltaVista is (was), get off my lawn.
  36. Asleep at the wheel by edwardpickman · · Score: 4, Insightful

    What's up with the Moderators? I constantly see posts that say the exact opposite thing both modded Informative or Insightful. We need a category "Incorrect". If the Moderators don't know the correct answer they should refrain from moderating either Insightful or Informative. It may be informing but the post is informing people with incorrect information.

    1. Re:Asleep at the wheel by mrsteveman1 · · Score: 0, Offtopic

      I agree, a "-1 incorrect" mod is required at this point.

    2. Re:Asleep at the wheel by Beardo+the+Bearded · · Score: 4, Funny

      It's how you Karma Whore. Observe:

      This is a serious problem for Java and .NET as well, since both of those virtual machines have to translate this incorrect opcode into the correct functionality.

      What this patch fails to realize is the problems with the instruction listed on Intel's website. A similar bug in all x86 chips manufactured since 2004 (yes, really!) requires that most compilers have to work around it. (The patch in BCB wasn't ready until late 2005, which is what lead to a 15% drop in their market share.) It has become a problem in real-world applications requiring time-critical code. It may not mean much to most "high-level" programmers, but SOME of us still get into the assembly code every now and then. It's a real nightmare, and it's not something that you expect from a company like Intel.

      I refer you to the errata at http://docs.intel.com/kb2004/hwbugs/knownissues.ht ml

      See what I mean? It totally looks like I know what I'm saying, but it's a complete fabrication. If I didn't put these lines bookmarking it as just plain dumbassedness, then I'd probably get modded up for it. Hell, I'll probably STILL get modded up. Some lazy mods (myself included) treat the mod points like a hot potato, or leprosy.

      I think this post is funny, but then again, it's well past my bed-time.

      --

      ---
      ECHELON is a government program to find words like bomb, jihad, plutonium, assassinate, and anarchy.
    3. Re:Asleep at the wheel by WasterDave · · Score: 1

      We do need a category "incorrect", but it would just turn into a shitfight with everything being downmodded all the time. It would be nice if the community in general were able to use the "-1 Incorrect" button responsibly but, well, we're not ... are we?

      Still, what would I know? I still don't understand why i can't mod you up *and* reply to the post.

      Dave

      --
      I write a blog now, you should be afraid.
    4. Re:Asleep at the wheel by SkunkPussy · · Score: 1

      You have reached to the heart of Slashdot's rotten core. I salute you.

      --
      SURELY NOT!!!!!
    5. Re:Asleep at the wheel by Anonymous Coward · · Score: 0

      We do need a category "incorrect", but it would just turn into a shitfight with everything being downmodded all the time. No change there, then.
    6. Re:Asleep at the wheel by hackstraw · · Score: 1

      We need a category "Incorrect".

      We've been asking for this for years. Or -1 wrong, or something similar. Its frustrating to see completely incorrect informtion being moderated as insightful or informative when in fact its completely wrong, but sounds good.

      As long as we keep wishing for it, it will eventually come.

    7. Re:Asleep at the wheel by Anonymous Coward · · Score: 0

      An incorrect category would be a mod point sink. We need a "correct" category. I estimate it would only use up maybe 10-15 mod points per day.

  37. Is everyone here blind? by pallmall1 · · Score: 2, Interesting

    Good grief, put two and two together. No information about what the patch does, it's a Microsoft update, and Apple and Linux aren't affected. It's the DRM, stupid! -- (borrowed from the Bill Clinton 1992 campaign).

    --
    3 things about computers: they're alive, they're self-aware, and they hate your guts.
  38. In Soviet Russia ... by Anonymous Coward · · Score: 0

    You cann0t patch transistors of a microprocessor. Anyone remember the FDIV bug?

    1. Re:In Soviet Russia ... by cowbutt · · Score: 3, Insightful

      The FDIV bug and associated fallout shortly preceded Intel's introduction of the microcode update facility. I don't think the two issues are unrelated.

    2. Re:In Soviet Russia ... by Joe+U · · Score: 2, Informative

      Of course they're related. I remember Intel announcing the whole idea of the microcode update was to avoid another bug like that.

    3. Re:In Soviet Russia ... by cowbutt · · Score: 1

      Ah, I wasn't sure Intel ever made the link public and explicit.

    4. Re:In Soviet Russia ... by Joe+U · · Score: 1

      If I remember it was more of a general, 'look at our new microcode update' press release attached to the releases about the recall.

      http://support.intel.com/support/processors/pentiu m/fdiv/

      I tried to find the press releases, but a quick search of Intel didn't help, and Google actually pointed me to this story when I searched for "Pentium 90" microcode. (Wow, Google is fast)

  39. correct by r00t · · Score: 4, Informative

    The Linux kernel is not currently affected, though some multi-processor apps with homegrown assembly might be.

    The problem is some sort of atomic operation sequence. Somebody let slip a reference to the bug on a mailing list today, without any real details. Probably the details are still under NDA.

    1. Re:correct by Anonymous Coward · · Score: 0

      Hi r00t, do you have a link to the post in question? There could be huge security consequences on multiuser systems, I'm interested in tracking it down (by validation of all candidate operations if necessary).

    2. Re:correct by ocbwilg · · Score: 5, Informative

      The Linux kernel is not currently affected, though some multi-processor apps with homegrown assembly might be.

      The problem is some sort of atomic operation sequence. Somebody let slip a reference to the bug on a mailing list today, without any real details. Probably the details are still under NDA.


      I did some digging around, and it actually looks like this is a patch for a bug in the Translation Lookaside Buffer (TLB) that was discovered back in April. Microsoft has released a patch for people running current versions of Windows (Vista, XP, and server 2003) but if you're running anything else then you will have to get a new BIOS update to resolve the issue. If you check the major hardware vendors web sites (HP, IBM, etc) the are offering patches to their system ROMs regardless of the OS.

      I know that it's popular on Slashdot to claim that Linux isn't vulnerable to the same bugs that Microsoft operating systems are, but when it comes to processor bugs (errata, in Intel-speak) that's simply not the case. Linux does make use of the TLBs. Every modern OS does. If you look at the hardware vendors' web sites, you will see that they specifically state that the bug could lead to a BSOD on Windows or a kernel panic on Linux.

    3. Re:correct by GooberToo · · Score: 1

      I'm glad someone is hinting at what it may be. I'm not sure why people keep saying microcode updates are available for Windows or via BIOS. For years now during boot, the Linux distros I use attempt to locate microcode, and if found, it loads. No BIOS changes required.

    4. Re:correct by TheRaven64 · · Score: 1

      Hmm. From your comment, and another poster's indicating that this is related to VMX mode, I wonder if this was the cause of Parallels Desktop regularly causing kernel panics on my Core 2 Duo MBP. Most of the panics happened in the kernel module used for virtual memory support by Parallels. I wonder if the 10.4.10 update included a patch for it...

      --
      I am TheRaven on Soylent News
    5. Re:correct by Mattintosh · · Score: 1

      10.4.10, when installed, would reboot normally (from the Software Update dialog), then boot the gray Apple-logo screen, churn for a minute or two, then reboot from there and start up normally. I guessed there was a silent firmware update, but it's possible there was a patch for this issue in there as well. Note that it does this same process for my non-C2D MBP, as well as my PPC Mac Minis, but they took far less time to update than the MBP (30 seconds vs. 3 minutes).

    6. Re:correct by edxwelch · · Score: 1

      It's funny that you say that because I did notice my PC crashed now and again since I upgraded to a E6600.

  40. Ooops, I'm the blind one by pallmall1 · · Score: 1

    Looks like linux systems on Intel can generate a kernel panic. However, it would be interesting to know if this is only on systems from big vendors that also ship windows software (i.e. Dell), because the microsoft update filenames all have the word "genuine" in them. Big vendors use custom bios that may be the same whether they are shipping a linux server or a microsoft server, and ship versions of windows that will only run on their machines.

    Given the level of secrecy that Intel and Microsoft are giving to the nature of the bug, I still think that DRM is the true culprit.

    --
    3 things about computers: they're alive, they're self-aware, and they hate your guts.
    1. Re:Ooops, I'm the blind one by afaik_ianal · · Score: 5, Insightful

      Given the level of secrecy that Intel and Microsoft are giving to the nature of the bug, I still think that DRM is the true culprit.


      And given that I have no evidence either way, it must be the fairies. What kind of an argument is that? If they were being so secretive to hide the nature of the patches, why would they go and label them in the fricking file names?

      Isn't it more plausible that the file names have the word "genuine" in them because like many patches, they're only available to activated windows boxes, and that it's just some random bug in the microcode being fixed?

      I think you've had the tinfoil hat on a little bit too long.
    2. Re:Ooops, I'm the blind one by pallmall1 · · Score: 1

      I think you've had the tinfoil hat on a little bit too long.
      No, I've just had to deal with Microsoft patches, activations, viruses, hotfixes, dirty tricks, and drm for too long.
      --
      3 things about computers: they're alive, they're self-aware, and they hate your guts.
    3. Re:Ooops, I'm the blind one by cowbutt · · Score: 2, Informative
      ...because the microsoft update filenames all have the word "genuine" in them

      No, the phrase 'genuineintel' is used, because that's how Intel chips identify themselves using the CPUID opcode.

    4. Re:Ooops, I'm the blind one by ocbwilg · · Score: 3, Informative

      Isn't it more plausible that the file names have the word "genuine" in them because like many patches, they're only available to activated windows boxes, and that it's just some random bug in the microcode being fixed?

      The bug in question is the bug in the TLB that was discovered back in April. Here's HP's page on it. I think that the only reason it's news today is because Microsoft has either just released or re-released a patch to fix the issue on Windows boxes.

    5. Re:Ooops, I'm the blind one by Wyzard · · Score: 1

      However, it would be interesting to know if this is only on systems from big vendors that also ship windows software (i.e. Dell), because the microsoft update filenames all have the word "genuine" in them.

      "GenuineIntel" is the vendor string reported by Intel's processors. Do a "cat /proc/cpuinfo" on a Linux box sometime and look at the vendor_id field. This is not a DRM thing, and not related to Windows Genuine Advantage.

      I believe the use of the word "genuine" in the vendor string was for trademark reasons, to distinguish Intel's chips from compatible ones made by AMD, VIA, Cyrix, and the like. I don't know the details though.

  41. so? by prestorjohn · · Score: 1

    ....patch for problem no one has noticed yet released quietly. *sound of one hand clapping*

  42. I think I know that one by r00t · · Score: 1

    It's a bug in motherboard chipset.

    The BIOS hack uses SMM/SMI (system management mode) to emulate one clock chip by using a different one. (eeew)

    It causes massive problems for real-time code.

    1. Re:I think I know that one by Anonymous Coward · · Score: 0

      it just shows how sorry PC architecture realy is. /|\ - ATARI

  43. Blah - Old News by FuegoFuerte · · Score: 3, Interesting

    Blah I say. Blah. This is old news. I first read about it over a month ago when Dell shipped a "critical update" for some of their laptops for this issue. Check out this HP advisory from a couple weeks ago:

    http://h20000.www2.hp.com/bizsupport/TechSupport/D ocument.jsp?objectID=c01038053

    Dell released an update for PE2950 servers around the same time.

    So again I say, Blah.

    *YAWN*

    1. Re:Blah - Old News by FuegoFuerte · · Score: 1

      Yes - I'm replying to my own message. Just went back and actually looked at the link - The advisory was sent out on 4/26/06. So, this is now officially at least a 2-month old issue. Now on to The Onion for my timely news.

    2. Re:Blah - Old News by owlstead · · Score: 1

      "I first read about it over a month ago when Dell shipped a "critical update" for some of their laptops for this issue."

      I didn't know about it. And now I find out I could have heard about this interesting issue if you would have taken the time to post to slashdot. Who is the slacker, slashdot, the poster or you? Blah frickin' blah indeed.

  44. Windows? MacOS? by Anonymous Coward · · Score: 0

    Hello, is this News for Lamers, Stuff that we don't care about, or what?

  45. Re:microcode update buggy for real-time applicatio by Billly+Gates · · Score: 1

    Wow and iTunes occasional blue screen as well when launching. At least I have noticed this but its not often.

  46. Since when is /. an apple site? by YeeHaW_Jelte · · Score: 0, Troll

    All the constant blabbering about this iPhone thing, article upon article about a GSM phone, and now this:

    "There is no indication that Apple users are affected."

    Who cares about Linux?

    --

    ---
    "The chances of a demonic possession spreading are remote -- relax."
  47. yes, but... by r00t · · Score: 2, Insightful

    Normally a microcode update is flashed into the motherboard with a BIOS update. That is damn close to being the same thing. Not too many people upgrade their BIOS, and fewer still would consider downgrading. Not too many people replace motherboards separately from CPUs, especially these days with a new CPU socket shape being invented every other day.

  48. Also fixed a while ago by Lenovo by raphae · · Score: 1
    This was also fixed a while ago in BIOS updates for Core2 Duo systems from Lenovo. From a web page notifying owners of the update:

    This microcode update is being provided to eliminate two issues:
    A possible processor marginality
    A potential source of unpredictable system behavior .

    For my system, there has already been one other update released since the one that fixed the microcode.

    Also interesting to note what that they mention on the same page:

    This microcode update has no performance impact and is a complete solution for these issues.

  49. hmm.. what about macs running boot camp ?? by dahdahdah · · Score: 1

    as boot camp is just a boot loader, why wouldn't this bug also affect mac computers running windows (presumably only when running windows) ?

  50. This has been out for Linux for months.. by Anonymous Coward · · Score: 2, Informative

    Well, Intel does release these every so often -- the fact that Intel released updated microcode is hardly news. How these patches work is that Intel releases the Microcode. OS suppliers then take that Microcode and incorporate it into their OS's microcode update facility -- it's already released for Linux for crying out loud! The odds are that Apple have included this Microcode update, it's just been rolled into one of the other updates that nobody's noticed yet.

    These updates can also be loaded into your BIOS too so they're loaded prior to OS startup; it's just that it's usually a lot easier to update OS installations than reflashing lots of different BIOS variants. However, I suspect this is exactly what Apple have done -- they've incorporated this microcode update into their EFI updates and/or will include this version in the next round of updates.

    About the only surprising thing is that Micosoft have actually wrapped it up and released it. Usually they don't bother unless they've actually had issues that are fixed by microcode updates.

  51. Re:Ugh, I hated that bug. by Phroggy · · Score: 1

    My favorite Pentium bug was the "F00F" bug: create a file containing four bytes, F0 0F C7 C8 in hex, and save it with a .com extension. Double-click, and the whole thing just immediately stops. No error message, no blue screen of death, nothing.

    Linux has a workaround for this (I think it'll just segfault or something), but NT doesn't. Never tried it on 2000, and of course later CPUs aren't susceptible.

    --
    $x='S24;r)>63/* h@<5+oZ)32"5cz';$me='phroggy'x$];
    $x=~y+ -xz+\0-Tx+;print$_^chop$me for split'',$x;
  52. Linux not affected by alanw · · Score: 2, Informative

    The HP link also indicates the nature of the problem, which should not be OS specific: This Intel microcode update addresses an improper Translation Lookaside Buffer (TLB) invalidation that may result in unpredictable system behavior such as system hangs or incorrect data. This recent posting to the Linux Kernel Mailing List by Andi Kleen states that Linux is not affected.

    > It's been a while; is there any sign of the ucode updates being
    > available, especially in light of the C2D/Q incorrect TLB invalidation
    > + recent ucode to fix this?

    That microcode update is not needed on any recent Linux kernel; it flushes
    the TLBs in a way that is fine.
  53. Patch for Linux... when? by Joce640k · · Score: 1

    a) It won't change the BIOS...how could it?

    b) If it affects the CPU then it could also affect Linux. When will a patch be available for my Linux servers? I don't feel safe running them.

    --
    No sig today...
    1. Re:Patch for Linux... when? by Anonymous Coward · · Score: 0

      No update yet, but no doubt there will be shortly.

      http://www.urbanmyth.org/microcode/

    2. Re:Patch for Linux... when? by cowbutt · · Score: 4, Informative
      a) Presumably recent versions of Windows include equivalent functionality to Tigran Aivazian's microcode_ctl for Linux, which allows the CPU microcode to be updated from firmware files once the OS has booted. (The usual way is that the BIOS ships with a set of updated microcode firmwares for various supported CPUs and loads them during the pre-boot phase of startup).

      b) If you're running a Red Hat-derived distro, watch out for updates to the kernel-utils package, which provides microcode_ctl and /etc/firmware/microcode.dat. It might also be worth checking Tigran's site a bit more regularly. I note that his page includes a microcode.dat which is about 7 months newer than that currently provided by CentOS 4.5's kernel-utils package.

  54. Virus' dont' survive either, they simply reload... by Joce640k · · Score: 1

    Ummm.. Virus' dont' survive power off either, they simply reload themselves on the next reboot...

    --
    No sig today...
  55. sure by Anonymous Coward · · Score: 0

    Knowledge is not important, but your willingness to learn new things is.

    Do you know how a patch-clamp amplifier works when recording whole-cell in a voltage-clamp mode?

    Do you know how the inductively-coupled atomic emission spectroscope works, and how it is different from an atomic absorption spectroscope?

    Do you know how to calculate PI by hand to n-th decimal place?

    1. Re:sure by zakeria · · Score: 0

      nope... next

  56. IIRC, that was by LeadSongDog · · Score: 1

    "We are Pentium of Borg. Division is futile. Prepare to be approximated."

    --
    Oh, I'm sorry sir, I thought you were referring to me, Mr. Wensleydale.
    1. Re:IIRC, that was by jamesh · · Score: 1

      That one, and '667 - mark of the pentium' (or 666.666667 etc) were my favourites.

  57. Errata by oglueck · · Score: 3, Informative

    Intel has released an errata document.
    For June 2007 it lists 3 new errata:

    AH106
    A memory access may get a wrong memory type following a #GP due to WRMSR to an MTRR mask.

    AH107
    PMI while LBR freeze enabled may result in old/out-of-date LBR information

    AH5P
    VTPR may lead to a system hang

    However, the document states that there are no fixes available. So it's probably not what MS/Intel is addressing here.

    1. Re:Errata by Anonymous Coward · · Score: 0

      See the "Specification Clarification" on page 70.

    2. Re:Errata by Anonymous Coward · · Score: 0

      For the CPU bugs / flaws there are no fixes ever.
      Things can be worked around sometimes. Intel is microcoded, and there might be a way to work around some bugs. However it will change the way CPU works leading to more software related bugs, that will need more software patches.

      Things look bad for the average windows user.

  58. So much for this patch by jonfields · · Score: 1

    Just looking at the requirements, XP SP1 not supported. And no I have no plans to upgrade. Waitin for the bios upgrade.

  59. Re:Ugh, I hated that bug. by Wavicle · · Score: 5, Informative
    Oh did you?

    1) The Pentium FDIV bug produced an incorrect answer in 1 in 9 billion double precision floating point divides. It did not affect integer divides.
    2) The answer always contained at least 14 correct significant bits (usually more, but an error in the 15th significant bit was the worst case). The means that single precision calculations were almost invariably correct.
    3) Any hack to solve the problem would have been hundreds of times slower than just living with a small error in so few calculations.
    4) All games today get by just fine using single precision floats for rendering.
    5) It took a guy (Thomas Nicely) with a Ph.D. doing heavy research in computational number theory to find it, yet you found it while working on a game in QuickBasic.

    I think Nicely said it best in his FDIV flaw FAQ:

    Bear in mind, however, that the likelihood is 1000 to 1000000 times
    greater that any erroneous results obtained on a Pentium are due to
    software errors, rather than any error in the CPU.
    and also:

    Over a period of five years, no person was ever able to collect a
    reward offered for exhibiting (other than with a code artificially
    contrived to demonstrate the error), on either of two workplace
    systems intentionally left with flawed CPUs installed, an error
    caused by the flaw.
    --
    Education is a better safeguard of liberty than a standing army.
    Edward Everett (1794 - 1865)
  60. Re:Updating microcode from within a VM by Anonymous Coward · · Score: 2, Informative

    If anyone wants to place their machine at grave risk, I'd be interested to know what happens if you are running a Windows machine in one virtual container and Linux in another, then patch the microcode from Windows. How does it affect Linux? Do kernel tests, say in the LTP or one of the other testing kits, suddenly succeed where they'd otherwise fail, or vice versa?
    One of the errata listed by Intel explains that this isn't supposed to be possible, then warns that it is:

    AI88. Microcode Updates Performed During VMX Non-root Operation Could Result in Unexpected Behavior

    Problem: When Intel® Virtualization Technology is enabled, microcode updates are allowed only during VMX root operations. Attempts to apply microcode updates while in VMX non-root operation should be silently ignored. Due to this erratum, the processor may allow microcode updates during VMX nonroot operations if not explicitly prevented by the host software. Implication: Microcode updates performed in non-root operation may result in unexpected system behavior.

    Workaround: Host software should intercept and prevent loads to IA32_BIOS_UPDT_TRIG MSR (79H) during VMX non-root operations. There are two mechanism that can be used (1) Enabling MSR access protection in the VM-execution controls or (2) Enabling selective MSR protection of IA32_BIOS_UPDT_TRIG MSR. Status: For the steppings affected, see the Summary Tables of Changes.

  61. Not uncommon by Durzel · · Score: 1

    Microcode updates are applied to CPUs are done all the time via BIOS updates. The only element of this that is newsworthy is that this microcode update is applicable to Windows only (it would seem) as Microsoft are the ones providing it. Since it is not rated as a critical update (or even an automatic one) and the BIOS makers have seen fit to omit it from their own BIOS updates (despite the fact that Windows has a dominant market share), the smart money is on it patching something which is both very rare and very difficult to reproduce.

  62. This news is pure FUD by thisispurefud · · Score: 1

    This news is pure FUD, because this update is a reliable update and NOT a secuity update.

    1. Re:This news is pure FUD by phoenix321 · · Score: 1

      Not pure FUD, as for example DDOS attacks can be quite effective when abusing an "unreliable" feature. When the goal is disrupting the avaiability of a given resource, unreliable systems are as bad as insecure ones.

  63. That can't be right. by goombah99 · · Score: 3, Insightful

    Depends on the instruction(s) inflicted. Based on the limited information available, it could be ....an instruction that the compiler used for Mac OS/X simply never generates. (A sub-optimal instruction, for example, would be skipped by any decent optimizing compiler as the same thing could be done in superior ways.) That makes no sense. Apple can't know what compiler third party used to compile some piece of software. For that matter someone might have handcoded it. Your theory that it could be some mode not used in mac-os makes more sense since the OS might possibly prevent certain modes from being accessed by any non-apple software.
    --
    Some drink at the fountain of knowledge. Others just gargle.
  64. What counts as "hardware" anyway? by Dogtanian · · Score: 2, Informative

    Since microcode isn't hardware, fixing it shouldn't require any changes to the hardware. This is true; however, microcode *does* blur the line between software and hardware.

    (Disclaimer; I am not an expert on the subject matter, take the following with a pinch of salt).

    Consider this; do you really have x86 CPU "hardware" in your Intel-based PC? This depends on how you define "hardware".

    As far as I'm aware, all modern Intel "x86" CPUs (Pentium Pro/Pentium II onwards) have a RISC core. They have to convert the long and irregular (i.e. nothing like RISC) x86 code into the native RISC instruction set via microcode. So it could reasonably be argued that the CPUs aren't actually executing the x86 instructions themselves in hardware.

    Of course, all this is transparent to the user; as far as they are concerned, the CPU *is* "hardware", and I'm not sure if any of this is even visible from a system-designer's point of view (i.e. the processor is- I'd assume- still a "black box" for this purpose).

    Anyway, I assume they did this because- even with the overhead of translation and the added complexity- it would still have made optimising the design much easier. Generally speaking, this is one of the major benefits of RISC design; x86's CISC instructions (i.e. long, complex and irregular) would have presented a major headache to Intel's engineers.

    It's notable that the older Pentium-I had a CISC core; so internally the chip was *very* different from the Pentium Pro/P-II. I assume this means that it *was* based around the x86 instruction set to some extent, although I don't know how much- if any- conversion or translation of instructions via microcode was involved. I suspect that because the core hardware would have been based round the x86 instructions themselves and less reliant on microcode, fixing bugs (etc) via microcode would have been far harder- if it was possible at all.
    --
    "Slashdot - News and Chat Sites Deviant". (Click "homepage" link above for details).
  65. Direct Link by Anonymous Coward · · Score: 0

    Here is a direct link for the Windows XP version for all people who detest WGA:
    http://download.microsoft.com/download/3/5/e/35ecc f22-f333-4469-8209-fafc2d084e8f/WindowsXP-KB936357 -x86-ENU.exe

    1. Re:Direct Link by TheGratefulNet · · Score: 1

      confirmed. good link.

      --

      --
      "It is now safe to switch off your computer."
  66. Amazed? Why? Take a look at by wiredog · · Score: 1

    this Slashdot Meta Comment. Yes, it's also linked in my sig.

  67. Mo'Power, Mo'Power, Mo'Power by Sqreater · · Score: 1

    We now know why the National Security Agency has gone to Congress with a supplemental budget request of 800 Million Dollars for a power system upgrade.

    --
    E Proelio Veritas.
  68. OLD CPU microcode is old by Spikeles · · Score: 1, Informative

    Here is a story from April 29th.. Which actually tells you WHAT the microcode fixes http://www.rage3d.com/board/showthread.php?threadi d=33889730

    --
    I don't need to test my programs.. I have an error correcting modem.
  69. Re:Ugh, I hated that bug. by Anonymous Coward · · Score: 0

    Relax, he thinks a mythical being talks to him (did you read his laughable story?), so obviously he's not, how do I say this politely...

  70. And the T series... by Xocet_00 · · Score: 1

    The mobile Core 2 Duo chips (T7xxx) are 64-bit, but missing from the list as well.

    1. Re:And the T series... by ocbwilg · · Score: 1

      The mobile Core 2 Duo chips (T7xxx) are 64-bit, but missing from the list as well.

      True, but they are also affected nonetheless, both the T5000 and T7000 series.

  71. Stop modding this guy up as informative by geekoid · · Score: 1

    the link is a 'joke'.

    --
    The Kruger Dunning explains most post on /. http://en.wikipedia.org/wiki/Dunning%E2%80%93Kruger_effect
    1. Re:Stop modding this guy up as informative by Spikeles · · Score: 1

      Please explain by what you mean as a "joke"?

      If you follow the forum link you'll see two other links.
      One to HP's internal support site , another to IBM's internal support site and another to DELL's internal support site, all explaining about the microcode fixes and offering BIOS updates. And are dated in April and May.

      --
      I don't need to test my programs.. I have an error correcting modem.
  72. Storm in a teacup. by Anonymous Coward · · Score: 0

    1. Intel and AMD have been releasing microcode updates for ages.
    2. The current list of serious bugs in cpus that could cause crashes on AMD and Intel CPUs is reaching hundereds now. Every operating system has workarounds for bugs.
    3. It's nothing new. There are workarounds for bugs in MIPS, SPARC, VAX, etc.
    4. Core 2 is the buggiest CPU I've worked with this far, the TLB behavior on it is weird beyond belief.
    5. There will be _more_ of this kind of bugs in future CPUs, considering the weird things CPU designers have to do to squeeze out more performance in less tolerances, with shorter product life cycles.
    6. Update your BIOS and you'll be fine in most cases.

    1. Re:Storm in a teacup. by DrMindWarp · · Score: 1


      The voice of reason. Pity it is anonymous.

  73. Re:Ugh, I hated that bug. by Megane · · Score: 1

    All operating systems at the time quickly implemented a workaround for the bug.

    Wikipedia link
    More than you ever wanted to know about the F00F bug

    --
    #naabhaprzrag, #sverubfr-000, #agi-fcbafberq, negvpyr[pynff*=' negvpyr-ary-'] { qvfcynl: abar !vzcbegnag; }
  74. two possible counterattacks by mosel-saar-ruwer · · Score: 1


    Well, if that's true, and assuming that anti-virus software can become sophisticated enough to recognize microcode-flashing attempts on reboot, then here are two possible hax0r/crax0r countterattacks:

    1) Target machines, like servers, whose uptimes are measured in months, or even years [and if M$FT forces reboots for critical updates every Tuesday, forcing their uptimes down into the 7-day range, then target Intel/AMD servers with longer up-times, like FreeBSD, Linux, OSX, etc].

    2) Flash the motherboard BIOS with hax0red/crax0red code, so that it will flash the CPU microcode [on every reboot, if necessary]. Or heck, flash the video [or sound] card's BIOS with with hax0red/crax0red code, and let them corrupt the CPU [on every reboot, if necessary].

    But either way, the very fact that you can flash this stuff from within the OS just scares the bejeebus out of me.

  75. that's why they called it pentium by swschrad · · Score: 1

    because it wouldn't scan to call it the 585.89123230945390 instead of the 586.

    --
    if this is supposed to be a new economy, how come they still want my old fashioned money?
  76. Lots of fun until it blue screens... by DeadCatX2 · · Score: 1

    That exploit wouldn't work because the OS would trap the invalid page access and generate a blue screen or kernel panic.

    Just because the TLB returns an erroneous translation doesn't mean that the OS isn't still going to check to make sure your process has access to the address space in question.

    --
    :(){ :|:& };:
    1. Re:Lots of fun until it blue screens... by TheRaven64 · · Score: 1
      The OS isn't involved at all at this level. x86 uses hardware page tables. This means that the OS sets up page tables, and the CPU walks them, caching some of the entries in the TLB (there are instructions for invalidating TLB entries after page table updates). When the CPU can satisfy a translation request from the TLB, it does. If it can't, it walks the page tables. If it can't satisfy it from here, then it raises an exception and jumps to the operating system's page fault interrupt handler. This then either kills or signals the program that caused the fault or swaps in the missing page and sets the present bit (if it had been evicted to disk) and updates the page tables.

      If the operating system had to validate every memory access, it would be painfully slow. Early SPARC chips had pure software page tables. There were instructions for adding and removing TLB entries. Every page fault would cause a trap to the OS, which had to add the correct TLB entry. On a HyperSPARC, profiling showed that about 50% of the CPU runtime was spent in the page fault handler. To avoid this, modern SPARC chips have a second-level address cache in main memory that can be updated by the OS and stores a lot more entries. The CPU can consult this without trapping to the OS.

      --
      I am TheRaven on Soylent News
    2. Re:Lots of fun until it blue screens... by DeadCatX2 · · Score: 1

      So, if we can corrupt the TLB, then we can essentially skip all of the memory protection mechanisms? I know that you'd be able to skip around the whole invalid page fault stuff, but wouldn't a protected memory model keep you from reading/writing into memory that you shouldn't be touching? Or is memory protection applied before the CPU gets the physical address?

      --
      :(){ :|:& };:
    3. Re:Lots of fun until it blue screens... by TheRaven64 · · Score: 1
      Each page table entry (PTE) contains a number of fields. One is the page number of the physical page number corresponding to the PTE, which is used for translation. The others are permissions, and a few flags. The TLB caches all of the data in a PTE. If the PTE says a page can be read or written, then this information will be cached in the TLB, and used by the CPU's memory management unit (MMU) when performing loads or stores.

      If you can write arbitrary data into the TLB, then you can prevent the CPU from ever hitting the page tables, and access all of physical memory. If you can only corrupt the TLB, then you might be able to read some interesting data from somewhere else or, if you're really lucky, find a corrupt entry pointing into kernel space and tweak something to give you elevated privileges, but it's much more likely that you would just cause a spurious page fault.

      Basically, you have the CPU, the MMU (on die now, used to be a separate chip in old systems) and main memory (simplified to exclude cache). The CPU typically has two categories of addressing modes; those that work on physical memory, and those that work on virtual memory. The former is usually only allowed in some form of privileged mode. In the latter, every load or store goes via the MMU. This performs the translation and permissions checking[1], either by looking in the TLB, by walking the page tables (on architectures like x86), or be raising an interrupt and trapping to the kernel.


      [1] This is actually a spectacularly bad design choice, since translation and permission checking are orthogonal problems and often want to be updated at different times by different entities.

      --
      I am TheRaven on Soylent News
  77. Re:Ugh, I hated that bug. by thetagger · · Score: 1

    Not to mention that around the same time (and even later on) AMD was pumping out crappy processors that did floating point approximations so horrible you could be pretty sure to find the errors pretty much every time. But nobody cared.

    (glibc's tests always failed on AMDs)

  78. What Would Be Fascinating to Know by Nom+du+Keyboard · · Score: 1

    What would be fascinating to know here is if this affects the performance of the processor itself. Sometimes things are fixed by inserting wait states, or other, more inefficient ways, of performing the function. What if someone performed benchmarks before and after this patch, and found a 2% degradation in performance? Would that be news?

    --
    "It's the height of ridiculousness to say for those 9 lines you get hundreds of millions."
  79. Theo's take on this by scatterbrained · · Score: 1

    (just got this in my mail from the OpenBSD mailing list)

    Various developers are busy implimenting workarounds for serious bugs
    in Intel's Core 2 cpu.

    These processors are buggy as hell, and some of these bugs don't just
    cause development/debugging problems, but will *ASSUREDLY* be
    exploitable from userland code.

    As is typical, BIOS vendors will be very late providing workarounds /
    fixes for these processors bugs. Some bugs are unfixable and cannot
    be worked around. Intel only provides detailed fixes to BIOS vendors
    and large operating system groups. Open Source operating systems are
    largely left in the cold.

    Full (current) errata from Intel:

      http://download.intel.com/design/processor/specupd t/31327914.pdf

      - We bet there are many more errata not yet announced -- every month
          this file gets larger.
      - Intel understates the impact of these erraata very significantly.
          Almost all operating systems will run into these bugs.
      - Basically the MMU simply does not operate as specified/implimented
          in previous generations of x86 hardware. It is not just buggy, but
          Intel has gone further and defined "new ways to handle page tables"
          (see page 58).
      - Some of these bugs are along the lines of "buffer overflow"; where
          a write-protect or non-execute bit for a page table entry is ignored.
          Others are floating point instruction non-coherencies, or memory
          corruptions -- outside of the range of permitted writing for the
          process -- running common instruction sequences.
      - All of this is just unbelievable to many of us.

    An easier summary document for some people to read:

      http://www.geek.com/images/geeknews/2006Jan/core_d uo_errata__2006_01_21__full.gif

    Note that some errata like AI65, AI79, AI43, AI39, AI90, AI99 scare
    the hell out of us. Some of these are things that cannot be fixed in
    running code, and some are things that every operating system will do
    until about mid-2008, because that is how the MMU has always been
    managed on all generations of Intel/AMD/whoeverelse hardware. Now
    Intel is telling people to manage the MMU's TLB flushes in a new and
    different way. Yet even if we do so, some of the errata listed are
    unaffected by doing so.

    As I said before, hiding in this list are 20-30 bugs that cannot be
    worked around by operating systems, and will be potentially
    exploitable. I would bet a lot of money that at least 2-3 of them
    are.

    For instance, AI90 is exploitable on some operating systems (but not
    OpenBSD running default binaries).

    At this time, I cannot recommend purchase of any machines based on the
    Intel Core 2 until these issues are dealt with (which I suspect will
    take more than a year). Intel must be come more transparent.

    (While here, I would like to say that AMD is becoming less helpful day
    by day towards open source operating systems too, perhaps because
    their serious errata lists are growing rapidly too).

    --
    -- All that's left of me, is slight insanity, whats on the right, I don't know. -- Bob Mould
    1. Re:Theo's take on this by smithtodda · · Score: 1

      For those that wish to read the whole thread:

      http://marc.info/?l=openbsd-misc&m=118296441702631 &w=2

      --
      Why Vegan? No other food choice has a farther-reaching and more profoundly positive impact on all of life on Earth.
  80. Re:Ugh, I hated that bug. by petermgreen · · Score: 1

    All operating systems at the time quickly implemented a workaround for the bug.
    Neither of the sources you give backs up that statement.

    --
    note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register
  81. Re:Ugh, I hated that bug. by petermgreen · · Score: 1

    ok it seems the wikipedia article has a link to the MS knowlagebase which says it was fixed for NT 4 (first by a hotfix and then rolled up into service pack 4) but not for windows 95. There is no information for more modern versions of windows there and the wikipedia article doesn't seem to link to any information on the status under linux.

    --
    note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register
  82. Like Apple ever admits how bad they are anyway by Anonymous Coward · · Score: 0

    There is no indication that Apple users are affected.


    As if Apple would ever indicate their "house of cards" security is anything other than their propaganda has convinced people of.

    Look at the MoAB: if it weren't for that, every Apple zealot and Slashdotter would still be trying to say Apple is the most secure OS in history. And people are STILL in denial about the MoAB!!!

    Then, of course, there are the thousands of security researchers finding Apple 'sploits every day... which never get acknowledged or fixed.

    But hey, Security through Obscurity has always been the secret behind Apple's security.
  83. Intel Macs are being affected by *something* by myowntrueself · · Score: 1

    With the rate at which Intel-based Macs are failing after the latest 10.4.10 update I wouldn't be surprised if there was a processor update being slipped in quietly. And which may have gone terribly wrong for many users.

    I also wouldn't be surprised if the problems were, in part, due to sloppy Q&A what with many Apple developers and testers being pulled into the iphone project...

    --
    In the free world the media isn't government run; the government is media run.
  84. No, the problem with Parallels was CPU rendezvous by tlambert · · Score: 1

    No, the problem with Parallels was CPU rendezvous.

    They were incorrectly assuming that the CPU broadcast IPI would be handled synchronously, wwn they were hoisting up the OS and installing their hypervisor, so some CPUs would be running under it, and others would not. You can prove this to yourself by setting ncups=1 in the boot arguments (see the MacOS X kernel debugging tutorial on http://developer.apple.com/

    According to their web site (if you read it), this was fixed in the last beta release.

    -- Terry

  85. Re:No, the problem with Parallels was CPU rendezvo by TheRaven64 · · Score: 1

    Can you point to the release notes indicating the problem has been fixed? I can't seem to find them on the Parallels site. I'd really like to be able to use Parallels rather than a second laptop, but since I do actual work on my Mac, regular kernel panics are unacceptable.

    --
    I am TheRaven on Soylent News
  86. MS Says: by Anonymous Coward · · Score: 0

    This is from my correspondence from Microsoft. Sounds like a nifty BIOS update util. I found some more information about the Update.sys file. Please note that the update.sys loads any processor microcode update (that the BIOS should have installed) to the processors. If the BIOS is updated then it does nothing. It does what an up-to-date BIOS does. It checks to see if the microcode update it has within itself for the specific x86 processor stepping is newer than the one the BIOS has already loaded on the machine. If so, it will load the newer stepping and update the registry indicating that it has done so. Thus as new processors come on line and processor errata are discovered and fixed, we get new processor updates (Microcode) from Vendor which then need to be installed on the machine. These updates are included in any up-to-date BIOS for the machine. This is just a mechanism for Intel to get microcode updates installed on the various processors. By providing them the easier way, we ensure that the user gets the latest Microcode updates available and thus the machine runs more reliably. Like a service pack, each microcode update may contain fixes for any problems (erratum) found on the given Intel processor. Hence, instead of updating the BIOS from Floppy (the older way) we can do that from operating system and this update.sys loads any processor microcode update to the processors.