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The problem with this is that the CTA already operates at a loss, based purely on revenue from fares. City sales taxes in Chicago are already very high (>11%), and the state of Illinois subsidizes part of CTA's operating cost.

According to Wiki, the CTA provided 620.5 million rides in 2011. At an average of roughly $2/ride, free rides would mean over a billion dollars in fares not collected. Illinois' budget shortfall is currently about $1 billion, and the state is currently $6 billion in debt.

So where's the money going to come from? The CTA's proposed budget for 2014 is $1.4 billion, but critics point out that relying on state funding isn't a good idea. Tax increases are never popular, and $1.4B works out to roughly $140 per capita in the greater Chicago metropolitan area.

The 25-year-old ... died on Sept. 8 from head injuries he received Sept. 2 when [the driver] hit him with her car because she was downloading ring tones to her cell phone instead of paying attention to driving.

I just wanted to point that out, I think some posters are thinking about it incorrectly: "The 500 GHz mark was the goal when Feng and UI colleagues received a $2.1 million, five-year grant for the project from the Defense Advanced Research Projects Agency in October. In contrast, the transistors inside the central chip of a powerful personal computer run at around 50 or 100 GHz, Feng said. The fastest that such a chip runs as a package is currently around 3 GHz." http://www.news-gazette.com/news/local/2003/01/24/ fastest_transistor_made_at_ui/ In addition, University of Illinois broke 600 Ghz last year. http://www.physorg.com/news3662.html "The speeds quoted in this article are maximum rated *switching* speeds of a single transistor. Synchronous logic designs of the type found in microprocessors involve synchronous cells (known as flip-flops) and asynchronous gates providing boolean functions on the signals passing between flip-flops. The maximum rated frequency of any design is limited by the slowest path between flip-flops and this is what the clock signal will be set at. As the paths between the clocked flip-flops are typically anywhere between 2 and 10 logic cells deep and with each one comprising 10's of transistors (usually in complementary configuration to aid switching speed), the overall figure for an ASIC design such as a uProcessor would be at least 2-4 times slower than the maximum transistor switching speed (it's not quite cumulative, because as one transistor starts switching, the voltage at the at the `gate' of the next one has already started changing causing it to start conducting, and so on). I also have a suspicion that there would be other real-world constraints such as cross-talk (noise between transistors) and thermal problems. I'd hazard a guess that a production-quality chip would be somewhere in the region of a tenth the speeds quoted here! However, these new materials and structures still make for an impressive speed gain over traditional Silicon CMOS designs." (The speeds quoted in this article are maximum rated *switching* speeds of a single transistor. Synchronous logic designs of the type found in microprocessors involve synchronous cells (known as flip-flops) and asynchronous gates providing boolean functions on the signals passing between flip-flops. The maximum rated frequency of any design is limited by the slowest path between flip-flops and this is what the clock signal will be set at. As the paths between the clocked flip-flops are typically anywhere between 2 and 10 logic cells deep and with each one comprising 10's of transistors (usually in complementary configuration to aid switching speed), the overall figure for an ASIC design such as a uProcessor would be at least 2-4 times slower than the maximum transistor switching speed (it's not quite cumulative, because as one transistor starts switching, the voltage at the at the `gate' of the next one has already started changing causing it to start conducting, and so on). I also have a suspicion that there would be other real-world constraints such as cross-talk (noise between transistors) and thermal problems. I'd hazard a guess that a production-quality chip would be somewhere in the region of a tenth the speeds quoted here! However, these new materials and structures still make for an impressive speed gain over traditional Silicon CMOS designs." (http://www.physorg.com/news3662.html)

University of Illinois at Urbana-Champaign also had an article in the local paper. http://www.news-gazette.com/localnews/story.cfm?Nu mber=19284

Jerry Kohn is running as a Libertarian. Last I checked, he didn't want to ban polling and he actually shows up for debates, something neither Obama or Keyes seem willing to do.

Yours truly,
Mr. X

...let Badnarik debate...

Fertilizer tax, anyone?

Service tax?

Eliminate tax incentives?

Trucking registration fee increase?

The only thing worse than a tax-and-spend Democrat is a don't-tax-and-spend-anyway Republican.

"Modern" buildings tend to not age well

From another article:

The role of the building as a lab for the future, especially in a rapidly changing field like computer science, made its design a challenge.

"Any technology you deploy will soon be obsolete," Reed said. "Some things you think will happen turn out not to happen."

Accordingly, the Siebel Center was built to be flexible, Kubitz said. Many rooms are designed to be reconfigured with movable partitions, flooring and fixtures

From the article linked in the story:

"The 30 eighth- and ninth-grade girls at the camp, some from as far away as New York, used the skills they accumulated to design video games, which they presented on Friday in a game fair held at the camp's culmination."

And who's modding up someone called 'irc.goatse.cx troll'? Honestly, who throws a shoe?