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Dual Athlons Released
Malk-a-mite was one of the first to e-mail about the
announcement from AMD concerning their demonstration of a Dual Athlon workstation. It is using their "AMD-760 MP chipset, and next-generation Double Data Rate (DDR)
memory. "Update: 10/11 06:26 PM by H : My mistake. This was a dupe article - the older story went up yesterday - Microprocessor Forum.
It would be a good upgrade from my dual-celeron... ;)
BlackNova Traders
I wonder how long until someone uses the chipset to produce a motherboard...
...and can it scale to quad and higher processors?
BlackNova Traders
As with all articles of thsi nature, take it with a grain of salt. I don't expect to see such machine available to any "REAL" people on the street until Dec-Jan time frame. Thats at the earliest.
"Science is about ego as much as it is about discovery and truth " - I said it, so sue me.
Maybe the editors should actually read their own site/a&g t;.
But I wanted a quad! Really though, if they can do a dual how hard is it for them to add more processors? Anyone know? Would the Linux kernel currently handle SMP w/ AMD or do we hafta wait for an updated kernel?
At what price learning? At what cost wisdom? The price is a man's peace of mind, and the cost is his life.
Dual Athlons have not been released. A demonstration motherboard was displayed at the Microprocessor Forum 2000. They're close, but nothing has been released yet. :)<BR><BR>
<BR><BR>
Mind you, I'm drolling waiting for these things
Dave<BR>
'Round the firewall,
Out the modem,
Through the router,
Down the wire,
Barclay family motto:
Aut agere aut mori.
(Either action or death.)
Dual Athlons have not been released. A demonstration motherboard was displayed at the Microprocessor Forum 2000. They're close, but nothing has been released yet.
:)
Mind you, I'm drolling waiting for these things
Dave
'Round the firewall,
Out the modem,
Through the router,
Down the wire,
Barclay family motto:
Aut agere aut mori.
(Either action or death.)
Only demonstrated. Read the press release.
If you have a problem with my views, REPLY, don't moderate!
When has a business ever failed to bring to market a product held up by IP suits? (Possibly, but not very often) The position many, including Micron and AMD are taking is that Rambux IP claims are based upon patents which 1) are invalid 2) do not apply. AMD is challenged because the 760 set communicates with the DDR SDRAM, which Rambux contends if a product communicates using the exclusive protocol for required of their IP then that manufacturer owes them. Pretty tenuous, but when all you are is an IP firm, you hire a lot of sharks and begin to think like one.
--
Chief Frog Inspector
A feeling of having made the same mistake before: Deja Foobar
The great thing about the internet is the speed at which news travels! For instance: I read about this yesterday! Even though SlashDot.Org is a quality news site, I dont think its quite as good as the site that posted this same story yesterday. I think I'm going to stick to that other news site for more up-to-the-second news stories.
[sorry, the sarcasm key was stuck]
-----
If Bill Gates had a nickel for every time Windows crashed...
Will the current MP OSes run correctly and unchanged on this system?
I see in my BIOS that I can choose between MPS 1.1 and MPS 1.4. Does this refer to a hardware API that a MP OS utilises? If so, is the AMD product compatible with this, or the OSes have to be modified to handle some other standard (I thought I had heard AMD was doing things the same way as Alpha's).
The last time I checked, the MPS 1.1 and 1.4 specifications were owned by Intel and that was one of the many things keeping AMD from producing dual systems. While there was an effort underway known as OpenSMP, it never really saw the light of day. Were they forced into a licensing agreement? I'm really curious about some of the underlying issues on this one.
Interested in open source engine management for your Subaru?
Cautionary Statement
This release contains forward-looking statements, which are made pursuant to the safe harbor provisions of the U.S. Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words such as "plans," "expects," "believes," "anticipates" or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty that could cause actual results to differ materially from current expectations. Forward looking statements in this release include the risk that AMD will be not successfully introduce a commercially available multiprocessing solution and that such solution may not be accepted by the market. We urge investors to review in detail the risks and uncertainties in the Company's filings with the United States Securities Exchange Commission.
- I don't care if they globalize against free speech. All my best free thoughts are done in my head.
I'm running a pretty old box, and I'm looking for an upgrade for it. I'm just wondering if the new chipset will support the Duron too.
If not, what would be the reason?
If it does, this will probably be one of the best things to come out since the Abit BP6 w/ dual Celery's. I mean it would still be cheap (or at least fairly priced), and you'd also get great performance.
http://www.segfault.org/story.phtml?mode=2&id=39d
Dear Answer Guy,
I thought about buying an Athlon, but now my TV screams all the time about some Bi-Athlon and even Tri-Athlon. Is that just a vaporware or should I wait to buy such a beast?
-Ox Ford from Ohio
Dear Ox Ford,
Olympic Fever has struck the airwaves! Unknown to most people, the Athlon is the official microprocessor of the 2000 Olympic Games. To better suit Olympians, AMD came out with a Bi-Athlon and Tri-Athlon. These are actually multiprocessor units that have many advantages over their single-processor sibling. First, the processor speeds have been doubled, allowing the CPU to use time-sharing more efficiently (time-sharing is sometimes called "cycling," which is also an Olympic event). Processes can be re-prioritized in hardware, allowing certain applications to get a greater time share which causes it to run faster (also called "sprinting," which is an Olympic sport). Also, think of the Athlon as a unicycle, the Bi-Athlon as a bicycle, and the Tri-Athlon as a tricycle. The Bi-Athlon and the Tri-Athlon are much better at handling an unbalanced load, namely because they have more wheels. All of these things make the Athlon family the number one choice among Olympic athletes.
Wouldn't it be more appropriate to ask if Linux supports dual athlons?
Folks, now you know what to do if you want your news submitted. It's easy to get rejected on the submission queue, but apparently if you e-mail an editor, even redundant articles will get posted!
Do keep in mind though that e-mails from a large group of people might cause too much junk in the mailbox, but if e-mail is a good way to punish redundant posts or get higher priority than in a submission queue, by all means e-mail is the way to go!
I'll be quite happy to not bother drooling about this for another six months while AMD shakes out any bugs in implementations of mobos, memory interfaces, and distribution. And they should be "less than spectacularly expensive" by that point too...
If you're not part of the solution, you're part of the precipitate.
That statemen really doesn't mean anything. It's basically your standard disclaimer that *all* companies use when issuing a press release about products in developement. It's not meant to say, "Oh, by the way, we're talking ou of our ass, and none of this might actualy happen, and if it does, it could take 3 years." What it means, is that they are simply covering their butts, legally, so if unplanned and unexpected problems occur, they can't be held legally liable for it. If you search through press releases from any big company in which future or developemental products are mentioned, you'll see this exact same disclaimer.
Topher
A dual Duron system would be nice... but why settle for calling it a "dual Duron"... when you could call it a "Duron Duron"?
Quidquid latine dictum sit, altum sonatur.
This link to Toms Hardware has some info about the upcoming athlon chipsets. It looks like Via's SMP/DDR chipset (KX266) should be out by then end of the year.
Of course, I think I'll wait for the second itteration of these chipsets. By then they will have most of the kinks worked out, and the platform optimized. Also, by then the Athlon will be much faster per dollar.
--
"You never know when some crazed rodent with cold feet
might be running loose in your pants."
"You never know when some crazed rodent with cold feet might be running loose in your pants."
-Calvin
This is really embarrassing... repeat posting have been happening on almost a daily basis for the past few weeks. What the hell is going on it Andover? Is it such a chore for a /. editor to actually read /. before hitting "Submit"??
Also, anyone else notice that trolling/flamebaiting has gotten really bad lately? Especially the clever AC who launching personal attacks against active posters (maybe its Signal 11...) I'd hate to adjust my threshold to +2, but it looks like there isn't much choice anymore, since moderation sure as shit doesn't seem to be making a difference.
rant mode off... for now
----
---- I made the Kessel Run in under 11 parsecs.
Yes, this is based on the AMD chipset. AMD makes reference chipsets, and others (presently VIA) will make derivatives to supply the market. This is a sort of division of labor: AMD does (most) of the design, and VIA does (most) of the production.
It's not like VIA is competing with AMD. AMD designs reference chipsets because their processors (which are what they are really interested in selling) are unusable without. AMD can't make much money on selling chipsets, so they'd just as soon that somebody else take up that business. But somebody has to design the thing before it can be produced, and AMD foots the bill for that.
--Lenny
Did anyone say "Beowulf?"
The North Bridge that they use has a bus to each processor, so the current chipset will only handle two CPUs. I've heard rumor (but nothing from AMD themselves) that they will continue to work on chipsets to handle more processors. I suspect the reality of the situation is that IF they sell a lot of the dual processor chipsets, THEN they'll put development dollars into more complex chipsets.
More speed THEN light? Shouldn't that be "the more speed THAN light" dept.
Just my pet peeve on Slashdot.
The reason it's taken so long to get a dual
processor Athlon and no larger configurations
have appeared is that the Athlon's FSB makes it
difficult to do.
Unlike the intel processors, the Athlon connects
to the Northbridge via a point-to-point connection
(i.e. not really a "bus" at all). The interface
is named (inacurately) the "Socket 2000 bus" or
"S2K bus" for short.
The problems with S2K for SMP are several:
1) The Northbridge has to have a complete set of
data and address signals for each processer.
This is a lot of pins; especially if you're
talking about more than 2 proccessors.
2) Even if you had the pins, the drivers for S2K
need to be quite powerful (~50 mA per signal to
ground). So you need to add a lot more ground
pins to handle the current and the power
dissipated by the drivers starts to be a
problem.
3) The biggest issue is the manner in which SMP
cache coherency is managed. Because there is
no shared bus, the northbridge must "probe"
all of the other processors whenever one of
them changes the state of a cache line (read,
write, evict, etc.). Now, the bandwidth of the
interface used to probe an Athlon is equal to
that of its output address bus. So, a dual
processor system is relatively easily handled
by sending all of the addresses issued by one
processor to the other. Going beyond two
processors with this scheme fails due to
poll bandwidth limitations. Adding I/O
bandwith to the mix only makes things worse.
Problems #1 and #2 above are solvable by brute
force (e.g. big packages, multiple chips, heatsinks, etc.).
Problem #3 is much harder to solve. The only way
I know to do it is have the Northbridge maintain a
separate set cache tags that duplicates the tags
in all of the processors. That way, a processor
needs only be probed when the state of a cache
line that it actually holds is changed. It's
doable but makes for a very large chip that's
difficult to verify. That's how Hotrail was
implementing their 8-way Athlon server chipset.
It's a real shame that they decided to drop it.
I suspect that part of Hotrail's decision was
based on AMD releasing their plans for
Sledgehammer and the "LDT" bus (which has many
advantages over S2K).
Does anyone else ever get the feeling that Hemos doesn't actually read slashdot anymore he just posts stories. He has an amazing tendency to post stories that were just posted yesterday! This isn't the first time either.