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Sun Working to Eliminate Circuit Boards
lokedhs writes "Sun Microsystems is coming out with new chips without connectors. According to the article, this will have a lot of advantages: 'Performance, for instance, could greatly escalate because the speed of transferring data among chips and the number of channels for the transfers would increase. Energy consumption could also decline. Just as important, overall costs could fall, because defective chips could be removed like Scrabble tiles.' This technology will also lead to new CPU's without cache: 'The technique could also allow designers to remove the cache--the large pool of memory currently found on the processor--and put it on a separate chip. Caches were integrated onto processors to amplify bandwidth. Adding cache, however, bumps up manufacturing costs, as it greatly increases the number of transistors. With the bandwidth constraint gone, caches could once again be made independent without it having an impact on performance.'"
so basically they want to stack the chips? umm, heat?
They should get together with Pringles or Lays -- they've both been doing this for a while...
What they need, instead is VioletTooth (wireless chip-to-chip communcations). That way, they won't have to worry about alignment problems and such!
Did you even read the article before posting it here. The article talked about eliminating the pin that is used to house the chip. Due to the size of the pins, it limits the number of I/O paths a chip can expose to the motherboard. Instead they can implement transmitter/receivers using capacitive inductence to increase the I/O paths a chip can expose. Thereby increasing the bandwith a chip can utilize.
I figured Sun would have laid off their entire R&D department by now :)
Love,
Zaq
Heat is solvable with next generation cooling (i.e peltier or cryo...or just a really big freaking fan) but the performance increase will have to validate the extra effort.
The great thing about circuit boards is that they're cheap and easy to replace, so the maintenance gains they're talking about are not as great as they claim. It's also a VERY well understood tech; Sun takes a substantial risk by going in a totally different direction. It will be interesting to see how it plays out.
ad logicam Claiming a proposition is false because it was presented as the conclusion of a fallacious argument.
One thing is for sure. If they can get this to work and if heat production can be cut down, this would make computing equipment and electronics much smaller. The printed circuit board is one of the big things holding us back from much better electronics miniaturization.
Just as important, overall costs could fall, because defective chips could be removed like Scrabble tiles.
With my luck I'll get a dead Pentium Z or Q that I just can't get rid of.
The angel in the oatmeal.
Wow, this announcement reminds me of an awesome book I just read: http://www.kuro5hin.org/prime-intellect/mopiidx.ht ml
Think of it as lots of itty bitty low power radio transmitters and receivers.
Sounds clever to me. Electrical engineers have been constantly fighting unwanted interference in their circuits. Now they will be listening for it.
And in other news, scientists are developing a computer with no electronic parts at all!
"Who are in control, they are not in control of anything - they don't even control themselves!" - Glen Beck
Dust & dirt. I would imagine that at such low voltage levels, induced current would require a damn near perfect level of alignment between the chip and the "socket". This is admitted in the article. What they don't admit is that it's going to be nearly impossible to get the damn thing in the socket without letting dust or dirt inbetween the chip and the socket.
And a more interesting topic is their consistent mentioning of taking the cache of the chip. That's a nice dream and all, but where the hell are you going to put it then? Hardwired onto the motherboard? That's going to dramatically increase the cost of mobo's (so they are simply shifting who gets to eat the high sticker price on their products). And what if I buy a quad capable mobo, but only put 2 processors on it, I'm effectively wasting 2 sets of cache, rather than simply wasting 2 cpu sockets, and the sockets are a hell of a lot cheaper than the cache. I suppose you could fix this by going back to COAST (cache on a stick, yeah i know you remember that nasty stuff). But that brings in a whole new problem: These days, cache is only fast because it's so close to the cpu. If they move it off the die, it's just going to be put back on in 2 years because we can't access the cache fast enough ever since we moved it off the die.
I'm no super computer engineer, but these guys better have an entire family of rabbits they plan on pulling out of their asses or this fucker's gonna flop.
This was posted back in September of last year :
m l?tid=102&tid=137&tid=187
http://slashdot.org/articles/03/09/22/1055244.sht
jdb2
so basically they want to stack the chips? umm, heat?
It has to be said, I think that if Sun are seriously thinking of producing such chips then it must be a moderately good idea (they're not monkeys after all), so I wouldn't write it off on the basis of heat concerns.
You've probably noticed that people's noses get bigger as they get older. That's because old people are huge liars.
Well, this is offtopic, but there's no place to discuss the problems Slashdot has been experiencing, so why not here? If the admins won't provide an appropriate forum, we have no other choice.
Does anyone have any idea what's going on here? I can't be the only one who wishes for a front-page story explaining why Slashdot is so amazingly unreliable and broken lately--especially for subscribers who are paying $ for this service.
The article mentions "capacitive coupling". Here is the relevant WikiPedia entry, and here's a paper on the specifics at Sun.
Let's see, in 2 weeks the've anounced that they were looking a buying Novell and getting rid of circuit boards. I guess a positronic brain will be next.
"Eve of Destruction", it's not just for old hippies anymore...
This side up.
Shouldn't be a problem.. Have you seen the latency on modern Cache implementations? We're already at a BEST case of 2 clock delays with minimal concurrency. We're seeing 8 and even 16 clock cycle delays for L2 / L3 caches. Cache has always been hierarchical.. The lowest latency is always very small.. What this technology provides is effectively extraction of L2 cache with the complete transparenc y of adding L3 cache.. Think 128Meg L3 cache 8Meg L2 cache; something completely impractical for regular general CPU design.. Since you can "upgrade" your cache by replacing a peer-chip, now you can pay-as-you-go.. Spend a thousand dollars a year, upgrading one cache chip at a time.. And we've seen what's happened with the SDRAM market once commodetized. Pretty soon SDRAM may dissapear completely, being replaced by (albeit high power) gigabyte SRAM L4 modules.
If cost effective, and if they can get past the alignment issues, this is spectacular.
-Michael
The problem with capacitive connections is that you are, for all intents and purposes, using small radio links. This causes several issues to come to the fore:
- Your immunity to cross-talk goes down. Misalignment will exacerbate these problems.
- Capacitive receivers will also be able to pick up local RF fields. The computer will be much more vulnerable to external interference than it was before.
- The computer will also radiate much more than it did before, creating more RFI and leaking information that might be crucial (like crypto keys).
Making the chips the meat in a sandwich with metal sheets for the bread would help this a lot, because tightly coupled ground planes attenuate both radiation and reception. As long as you're putting a ground plane on top of the assembly it might as well do double duty as a cooling device, though I wonder what effect the heat-transfer compounds would have on transmission and crosstalk.Sustainability and energy independence essay
Just to clearify to the un-initiated. It is the exact same technique that allows CMOS transistors to work (the basis of most CPU transistors).
CMOS-FET = Complementary Metal Oxide Semiconductor - Field Effect Transistor
That's semiconductors separated by oxide (oxidized silicone or glass) to allow fields derived from differing voltages on either side of the glass to affect conductivity and thereby provide actuatable signals. All this new system does is replace the Oxide with something else; namely the walls of the outside of the chip and the unavoidable air-gap.
Obviously this alternate medium is not as efficient as normal hyper-thin glass, BUT it's more efficient than transferring physical electrons from silicon to copper and amplifying it such that you can induce a measurable current down the coppy wire several centimeters away. More-over, it's more practical to etch micro-wire paths on the edge of a chip than to manually pin-punch chips like we do today. We can make such signal points smaller and more articulate.
The ONLY problem (as outlined in the article) is keeping these micro-signals aligned.. If you're off by even half a capacitive cell, then you're fields aren't going to be strong enough, and depending on cell-spacing, you're likely to generate noise to adjacent cells.
-Michael
so basically they want to stack the chips? umm, heat?
Re-read article. It's not a stack. They make reference to scrabble tiles as a comparison.
Even if it were a stack liquid cooling built directly into the stack, ala the internal combustion engine, could handle the heat effectively. Probably more effectively then our current heat sink technology.
TW
Since you can "upgrade" your cache by replacing a peer-chip, now you can pay-as-you-go.
Wow, were back to my old 386 PC!
-- "Makes Little Debbie look like a pile of puke!" - Moe Szyslak
This is a very cool idea and it's the kind of thing I expect from Sun. Once it's stated, the solution almost looks obvious. While there's lots of work needed to make the idea practical, I admire the way they took a big noise problem and used it to propagate signal. It's too bad they are run by someone who thinks that they are going to make their money by licensing software instead of selling chips and licenses to very cool and real inventions.
Friends don't help friends install M$ junk.
The next 503 error will be ready soon, but subscribers can beat the rush and see it early!
Heat is really only a by-product of the problem. The main problem is power consumption. If you have a big enough fan you can cool anything (within reason) but who is going to buy a CPU that sucks 1KW (which is the way the power issues are leading).
FYI: The power issue is only going to get worse at smaller geometries.
Roughtly: Power = Switching Power + Leakage Power + Others.
The two we are interested in here is the Switching Power and the Leakage power. Up until now Switching power has been the greedy party, but when geometries shrink down to 90nm and below, leakage power really kicks in.
IBM and AMD have done some nifty stuff with strained silicon and silicon on insolutor to try and reduce the leakage power (and therefore the heat).
So heat really will not be solved by just taking it away faster - because there's a whole lot more of it lurking around the corner, to fix the heat issue, you have to fix the cause not the symptom.
[ Monday is a terrible way to spend one seventh of your life. ]
Sun service engineer: I'm trying to fix this CPU, but all I have is sky pieces, anyone have a piece with a little bit of a boat?