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Intel Shrinks Transistor Size By 30%

Posted by Hemos on from the how-long-until-market dept.

pinkUZI writes "Intel will announce that it has crammed 500 million transistors on to a single memory chip, shrinking them in size by 30%. " The tech details are sadly lacking in the article - but I'm sure those will follow. Indeed, the Yahoo piece gives the details that "...has created a fully functional 70 megabit memory chip with transistor switches measuring just 35 nanometers."

28 of 258 comments (clear)

  1. In related news... by swordboy · · Score: 5, Funny

    In related news, Intel stated that this new manufacturing process will help their processors more effectively compete with charcoal on a heat density versus cost basis.

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    Life is the leading cause of death in America.
    1. Re:In related news... by addaon · · Score: 5, Insightful

      It's for a memory chip... when was the last time you had a memory chip that produced a noticeable amount of heat? (Hint: Rambus.) When was the last time you had a memory chip that produced an unacceptable amount of heat? (Well, if you're stretching, some of the SRAM's that HP used for caches in the PA-RISC boxes...)

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      I've had this sig for three days.
    2. Re:In related news... by brejc8 · · Score: 5, Insightful

      They could just say "Clock gating".
      I love it when a technical group has to talk to non technical jurnalists who report to other technical groups. Something gets lost in the middle step.

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    3. Re:In related news... by swordboy · · Score: 5, Insightful

      This is Intel's 65 nanometer process announcement. Right now, they are at 90 nanometers. They always test the process using SRAM cells. This doesn't mean that Intel won't use the process for CPUs and what not.

      But as a rule of thumb, the closer you bunch up the transistors, the higher the electrical leakage. This is why the current chips are consuming more power than ever. At 65 nanometers, we'll be 30 percent smaller but also leak 30 percent more. This leakage causes heat.

      Intel's paperwork shows that they believe that practical transistors will stop shrinking at approximately 320 watts/cm^2 which is nearing the heat density of a nuclear reactor (500w/cm^2). This will take place at the 45nm level in 2007.

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      Life is the leading cause of death in America.
    4. Re:In related news... by randyest · · Score: 5, Informative

      Your post is accurate and informative in general, but there's one nit I must pick:

      But as a rule of thumb, the closer you bunch up the transistors, the higher the electrical leakage.

      It's not the bunching up (density) of the transistors that increases leakage current (static power consumption,) it's the gate size. Narrower gates are less good at being the perfect insulators they should be. The thinner dielectric allows more leakage current, and can even break completely if the voltage is too high, which is why smaller-geometry processes often allow (or require) lower operating voltages, which helps reduce synamic (switching) power.

      Of course, it's the shrinking of the gates (and the rest of the transistors) that allows them to be bumched up more (placed in higher density,) so maybe you meant it that way . . .

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      everything in moderation
    5. Re:In related news... by dslbrian · · Score: 4, Insightful

      Narrower gates are less good at being the perfect insulators they should be. The thinner dielectric allows more leakage current, and can even break completely if the voltage is too high

      I think your describing the wrong mechanism - deep submicron device leakage is dominated by drain-source subthreshold currents (hot-electron effects and whatnot), not by gate-source currents.

    6. Re:In related news... by randyest · · Score: 5, Informative

      There are three components to leakage current in DSM CMOS devices. From here in order of magnitude: (1) source-drain junction leakage current (2) gate-direct tunneling leakage, and (3) sub-threshold leakage current.

      And while neither of us pointed out all three, the fact remains that it's not the "bunching up" of the transistors that increases leakage, it's the gate and transistor sizes (which tend to scale together.) Which was the point I was trying to make.

      If you think gate leakage is negligible compared to sub-threshold leakage, you'd better tell the IEEE and all those people working on high-K gate dielectrics.

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      everything in moderation
    7. Re:In related news... by Anonymous Coward · · Score: 4, Funny

      dorks.

  2. Heat by shfted! · · Score: 5, Insightful

    I'm waiting for Intel to reduce heat output by 30%. 130 watts for a top end P4 is pretty insane, when a top end Opteron is only 100 watts. I don't care how small it is.

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    1. Re:Heat by Ignignot · · Score: 5, Interesting

      It is likely that the new chip doesn't produce any more heat than the old one. It is a very simple effect: smaller transistors require less power to operate. Also, if they did consume the same amount of power in a much smaller space they'd end up as slag, no matter what cooling solution used. This means that if they were to make a current chip using the new 30% smaller technology, the result would probably produce about 30% less heat and use that much less power.

      I don't really understand what the big deal is comparing the heat outputs of the P4 and Opteron is anyway, it isn't like these are mobile cpu's. I do have an Athlon 64 under the hood now, but heat output has never been a real concern of mine when selecting a cpu. I'll never understand the processor tribalism that has infected some computer users. Just use what's best for the job.

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    2. Re:Heat by randyest · · Score: 4, Informative

      Well, sorta.

      Smaller transistors generally require less power to operate because they can (actually, must) be operated at a lower voltage. Dynamic (swtiching) power varies with the square of the voltage, so dropping the voltage a little makes the power go down a lot.

      But that's just switching power.

      As gate sizes shrink, previously negligible leakage (static) power increases. A lot. Now it's no longer negligible at the 90nm and 65nm process steps. In fact, it's getting very close to the same order of magnitude as switching power.

      That's a problem because you can limit dynamic power by switching more slowly, or not switching certain transistors at all (think mobile CPU speed throttling.) But leakage power is consumed even if the CPU clock isn't ticking. If voltage is applied to the chip, power leaks.

      --
      everything in moderation
    3. Re:Heat by randyest · · Score: 4, Informative

      With all due respect, I think you're confused. For the same operating voltage, dynamic power does not decrease with decreasing gate size/transitor size.

      P=1/2*Ceff*V^2*f*N+Q*V*f*N+I1*V

      where P is power consumption, Ceff is effective load capacitance, f is frequency, V is source voltage, N is signal switching coefficient, Q is charge due to through-type current, and I1 is leakage current.

      While the actual gate capacitance driven may be reduced by virtue of it's smaller size, the effective capacitance (that "seen" by the driver) stays roughly the same, or may even get higher from parasitic capacitance. The only thing sure to change is the leakage current, which will increase as gates shrink.

      Maybe this will help you understand.

      --
      everything in moderation
  3. Don't worry.... by harumscarum · · Score: 5, Funny

    it is not the size of the chip she cares about....it is the number of transistors you have.

  4. EE Times article by PIPBoy3000 · · Score: 5, Informative
    There's a better article here

    Within the 65-nm process, Intel has also devised a second-generation strained silicon technology. "The second generation of Intel strained silicon increases transistor performance by 10 to 15 percent without increasing leakage," Intel said. "Conversely, these transistors can cut leakage by four times at constant performance compared to 90-nm transistors."
  5. Moore's Law by MikeMacK · · Score: 5, Funny

    Yes, Moore is less - or smaller you could say.

  6. It's obvious... by Anonymous Coward · · Score: 5, Funny

    ...they've found a way to get rid of the base, collector, or emitter. Unfortunately, these new transistors can only store zeros.

  7. Now are we going to start getting spam... by Black+Parrot · · Score: 5, Funny

    ...selling methods for reducing the size of our transistors?

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  8. This is news? by Anonymous Coward · · Score: 5, Insightful

    I work for Intel, and I gotta say--we do this every couple of years, and this wasn't a particularly stunning or unexpected part of our roadmap. If you wanted a more sensationalist headline for a pretty expected bit of news you might try the old "Intel Proves Moore's Law Not Dead Yet"

  9. missing word by mondoterrifico · · Score: 4, Funny

    "The tech details are sadly lacking in the article - but I'm those will follow."
    At least that is one way to reduce typos by slashdot editors, just start leaving out entire words. :P

    1. Re:missing word by gclef · · Score: 5, Funny

      Nono, he's actually making a grand, religious statement: I am, those will follow. Meaning, I exist, I have memory, all other memory is simply following after me. Hemos has actually obtained enlightenment, and is trying to show us the way through RAM.

  10. Heat issues by Biotech9 · · Score: 4, Insightful
    The company also developed so-called sleep transistors that shut off the electrical current to areas of a chip that aren't being used. As a result, power consumption drops -- something that will decrease heat generation and help battery-powered devices last longer between charges.

    This sounds like a great way to tackle heat and power problems with laptops (and PCs, it's not like modern PCs don't have heating trouble too). I'd lay a bet though, that it'll still run hotter than the P4s, it seems there should be an addenium to Moores law.

    The number of transistors on an integrated circuit would double every 18 months, and that integrated circuit will get pretty damn shit hot
  11. Half way there. by Chess_the_cat · · Score: 5, Insightful

    Moore predicted his Law would run out in 2012 when 1 billion transistors are fit on a chip. Looks like we're ahead of schedule.

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  12. Re:One in a million chance by zymurgyboy · · Score: 5, Funny
    With the heat this thing will kick off, I might hack my Weber to use a P4 instead of gas. Hell it might even be able to be made to support the necessary logic to turn the grill off and plate my steak when its done.

    That's some progress!

    --
    If you never make mistakes, it's probably because you're not doing anything.
  13. Official Press Release? by tjhayes · · Score: 5, Funny

    This can't be any official sort of press release...nowhere do they measure the size of the transistors by how many it takes to equal the width of a human hair!

  14. Re:70 Megabit? -- Static RAM, not DRAM. Also 7T by elwinc · · Score: 5, Informative

    You're thinking DRAM, with one transister per bit, but slow (plus it needs refreshing every 60msec or so). Static RAM is mucho faster, with 4 to 8 transistors per bit.
    Also, your math is in error. 500M transistors for 70 Mbits works out to 7 transistors per bit. I'm guessing the visible portion of the chip will be 64Mbits and 6 transistors/bit, with most the rest of the transistors allocated as spares. When you make a chip that big, you can boost yield by making spare blocks of memory that during manufacturing can be substituted for bad areas on the chip.

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  15. The -gate suffix in popular news by tepples · · Score: 5, Funny

    They could just say "Clock gating".

    What makes a non-technical journalist think "Clockgate" isn't just another White House scandal like Watergate, Flowergate, Whitewatergate, Cattlegate, Travelgate, Filegate, and Zippergate?

  16. Tha's odd wording by randyest · · Score: 4, Informative

    "Reduced transistor size by 30%" is an odd way to announce moving from a 90nm to a 65nm process.

    Just to help avoid any confusion here, this is not some new clever transistor design or something. It's just another incremental step in process size reduction. It happens every few years. And it's not just Intel -- I know IBM and NEC are doing 65nm right now as well. I suspect TSMC and UMC are also, though I'm not sure (I know UMC had problems in 90nm that they're still fighting with . . )

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    everything in moderation
  17. Intel by JerryLs · · Score: 4, Insightful

    May I ask why, every time they shrink the size of components, they feel a need to put more on the chip? I realize more can be done, but with all the heat/power problems with increased density, why not use the space with chip power you already have? The result would be a cooler, lower power device.

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