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Researchers Create 3-Dimensional Chips
Spy der Mann writes "Professor James Lu and other researchers of the Rensselaer Polytechnic Institute, managed to create three-dimensional chips (coral cache) to optimize the design of future processors and prevent overheating. "Make the interconnect wire shorter, and you cut the delay time," says Lu. "A simple way to make them shorter is to stack the transistors.""
Hopefully there will be a parallel advance in cooling technology.
Karma: -2147483648 (Mostly affected by integer overflow)
I think what they mean is that instead of the processor being on a single plane (a silicon wafer) it's on 2 or more wafers (stacked on top of each other or somesuch)
Show this to your friends and family that don't know what a real hacker is
Flat chips suck. These chips have flavor ridges(tm).
I thought they'd been doing this all along.
Guess I was just ahead of my time...in my head.
We complain about all the /. stories that are dupes but don't give proper credit to the editors when a non-dupe makes it past their radar.
Propz to Timothy for posting an original article! Keep up the good work!
It all depends on density of the transistors. You can squeeze 1 square mile into a 1 inch cube, but it will take 334,540,800 individual layers to do so.
Want to write a time travel game. Or maybe I already did.
Already been done.
Quick, someone send themselves back in time to blow this guy up.
I read in a paper recently where scientists have had some success in developing a four-dimensional transistor by using nanotubes to set up a quantum Klein bottle wherein the current passes through Bohr space and thus runs parahybolically.
In practice, you should actually be able to use this method to set up any n-dimensional transistor, provided you can find a sufficiently clean source of power. Modern power supplies have heretofore been plagued by an excess of static dissonance.
Essentially, they say this packs it denser. And a cube vs a flat processor = less surface/transistor. I see only factors which makes this *harder* to cool. Maybe someone can explain...
Kjella
Live today, because you never know what tomorrow brings
Frito Lay developed the 3d chip a long time ago: Doritos 3D
I remember there were tests using diamond deposited on chips as a strong heat conductor. The whole point was to help make multilayered chips possible. Haven't read anything lately but it sounded promising.
This is really cool stuff. Essentially they're making silicon wafers smaller by removing all the silicon in the substrate after the wafer is fabbed. Then they can put this few-micron-thick layer onto another fabbed wafer - perhaps made with a different process - then they can repeat the process. This allows sensor, analog, processor and memory to be made in the best processes for each function but with communication channels tens of thousands of wires wide and only microns long.
This article is worth reading - this is going to be huge. Also there is a really fantastic picture of a see-through microprocessor wafer with the article.
From the article:
Wafer-level stacking also allows for short connections between different types of chips. "Particularly today the industry is trying to combine memory with the processor, and more than half of the chip is taken up by memory," Lu explains. "When we stack layers, we have a processor on the bottom and layer the memory on top, with a short access time between them." Lu says the reduction of memory access time would be a huge advancement for large-scale computer clusters calculating nuclear reactions and weather broadcasting, for example.
"You are also creating new functionality," says Nalamasu. "Such technology has vast implications, for example, integrating biochips with silicon chips. The wonderful thing is that if we adopt this technology, we'll develop things we can't even envision today."
"Is life so dear, or peace so sweet, as to be purchased at the price of chains and slavery?" - Patrick Henry
There is, sort of. If the wires are shorter, they have less resistance end-to-end assuming they have the same thickness, are made from the same material, etc etc. Less resistance means less heat (and maybe core voltage could be lowered slightly too, since there would be less of a voltage drop). However, I honestly don't know how much heat comes from the actual junctions versus circuit pathways.
Please help metamoderate.
There must be a new meaning of the word "simple" that I'm not familiar with.
Mea navis aericumbens anguillis abundat
See: Thermal Conduction Module: A High-Performance Multilayer Ceramic Package
Chip H.
"We've gone beyond zero insertion force -- you just throw the cubes into the enclosure and they will connect," said an Intel spokesman.
According to the spokesman, the functionality of the system will depend on the orientation of the chips as they land in their respective sockets. If the chips land on 7 or 11, Windows will run; 2, 3, or 12 produces the Blue Screen of Death. Similarly, any other number will produce an exception unless it is thrown again before a 7.
There are a lot of hurdles that this document doesn't really get into. It does mention manufacturing but here are some hard core items that need to be considered. 1. Yield goes as e^(-alpha * A) where A is your area and alpha is your yield coefficient. So if you have non-yielding chips on one wafer and you mate it to another wafer that also has non-yielding chips, your total yield goes down at somehting like Y^L where L is the number of layers and Y is the yield given above and Y is 1. So if your yield is 75% and you have 5 layers then your final yield will be only 23%. 2. Testing. If a whole wafer is bad and you put it in your stack of chips, all the chip stacks will be bad. It would be best to test before you put those wafers together. Thats not easy. 3. Packaging is a big issue. Will it be standard wire bonding or something else. Does this thing really generate a lot less heat? And are the interconnects really a lot shorter. If the chip to chip connects cost the same as inter die vias then maybe so but my guess is that those chip to chip connections are a lot more expensive and take a lot more area than vias within the same chip. And alignment of one wafer to the next is also an issue along with getting good interconnect all the way through those stacks. Anyway, those are some thoughts. Its clear to me that 3D chips are a long way off and have there place in very specialized applications in the near term due to the complexities mentioned above. Wardini
I'd like to thank the author, Spy der Mann, for having the foresight to make a coral cache of the site before posting. Kudos to you, mate.
Didn't Gene Amdahl blow a fortune trying to do this 20+ years ago? I think the company was Trilogy. They did succeed in some die stacking technology but I think they ended up selling the ideas and it went nowhere.
At least not in the USA.
...and I want a good explanation, not one that just says it is so.
I always thought it was the resistance that caused heat and not the current.
Anybody got any links that demonstrate what the correct situation is?
It's all interrelated.
.
,Power can also be defined as :
The basic Power equation (in Watts) is Volts times Amps (V*I)
Aha! But from Ohms law, Volts is Amps times Resistance (V=I*R). And Amps is Voltage over resistance (I=V/R).
So substituting back into the original equation
P = (I*R)*I = I^2R
P = V*(V/R) = V^2R
So you can hopefully see from all that mess, any change of voltage,current,resistance will change power dissipated.
You are in a twisty maze of processor lines, all alike.
There is a lot of hype here.
wow... that's so wrong.
/. tutorial on power line transmission. For more basic information, along with images, check the howstuffworks article on power distrobution: http://science.howstuffworks.com/power.htm
resistance is like the size of a pipe that water is flowing through, consider voltage like water pressure and the current like the flow of the water. the smaller the pipe is, the more pressure you need to pass the water through at the same speed.
For the next blurb to make sense, I need to say that while transformers step up Voltage, the power calc is the same on both sides of it (V*I on one side == V*I on other side)
Power lines are actually really low impedance (resistance in AC) wires, but due to their astounding length they have pretty high resistance. To reduce power loss in power lines, the electrical companies step up the Voltage using a transformer. They do this because if you up the voltage in the middle step, (the power lines) the loss in power is much less, as the current delivered to the end user is much less than that going through the lines.
Thus ends your
I always thought it was the resistance that caused heat and not the current. Anybody got any links that demonstrate what the correct situation is?
(The following is extremely simplified, and ignores alternating voltages, capacitive and inductive effects).
Two equations:
U = I*R (Ohm's law)
and
E = U*I
E is the heat energy
U is the voltage
I is the current
Now, it depends on your situation. If your power source is constant voltage (or, in more engineering terms, it has low internal resistance, for example mains power), U is pretty much constant. The current through a load is then determined by the resistance of the load (using equation 1). The amount of heat you get is then proportional to the current, and inversely proportional to your resistance. So, if you plug in a heater to the wall, the lower the resistance of the heating coil, the more current flows through the circuit and the more heat energy you get.
A less perfect voltage source (say, a battery) has significant internal resistance; the more current you extract from it, the more its voltage drops. Your first equation becomes U = I*(R+r), with R being the internal resistance of your battery. You'll get most power from this setup when the resistance of your load equals the internal resistance. At this point, the heat generated in the battery is equal to the heat generated in the external load.
And, for fun, you can also build current sources, that force a certain current through any load you connect to them (within limits, of course). They do this by changing their output voltage to match the resistance of the load. There are *many* uses for such sources in electronic devices.
If we have a solid block chip, it's going to get very hot on the inside. Could they design some kind of fractal chip to create a reasonable trade-off between interconnection and surface space so that we could blow air over more of the chip?
Computers are useless. They can only give you answers.
-- Pablo Picasso
Problem solved!
Those who sacrifice security to condemn liberty deserve to repeat history or something. - Benjamin Santayana
You need to look at the whole picture.
It's not really a case of "where the current is going" - the current flows through the entire circuit, from one side of your voltage source to the other. The important thing to remember is that the current never changes through the whole circuit. The number of electrons/second (amps) is constant through the whole circuit. Only the voltage drop matters as you traverse the circuit. The part of the circuit with the biggest voltage drop across it consumes the most amount of power.
So, you get a small voltage drop across your wires, which gets turned into a small amount of heat. You normally have a large voltage drop across your load, which gets turned into useful work.... plus a bit of heat- nothing's 100% efficient.
For example, in an electric motor, the bulk of it is converted to mechanical work... which is still measured in watts, and *that* eventually gets converted to heat (by friction somewhere). The remainder gets lost due to the resistance in the motor windings.
You are in a twisty maze of processor lines, all alike.
There is a lot of hype here.
Seymour Cray with the Cray 3 had his processor bricks made of Gallium arsenide. The wikipedia article has flaws (I'll try to fix later) but it has the point that he went down the route of the 3d chip and circuitry much earlier than this /. story.
A brilliant man, Seymour...
Do you know why the road less traveled by is littered with the bones of the unwary?
I'm not sure I understand what you're looking for, but if you simply want the heat as a function of current and resistance, then replace U in equation 2 and you'll get
There you go; you can verify the formula experimentally; double the current and watch the heat output increase four times. It's easiest if you have a calorimeter, but it should be easy to improvise a desktop setup sufficient for a qualitative verification.
PSI is almost upon us.
FYI: PSI is a tale I spun in the '70s or so, when Large Scale Integration (LSI - eventually with a company named after it) and Very Large Scale Integration (VSLI) were industry buzzwords for ICs with a higher level of integration than a single-digit count of gates or flops to be externally interconnected.
PSI would involve:
- constructing a 3-D "chip"
- using ion beam epitaxy and doping to build it up in layers
- testing as you go using electron beams for power and signal injection and higher-voltage electron beams for "positive" voltage injection and as test prods (using secondary emission to pull more electrons than they insert and/or to read the voltage on the chip's internal nodes)
- turning up the beam current to vaporize (and later rebuild correctly) any defective component so the whole thing ends up flawless despite its large gate count. (100% yield!)
- using diamond for the semiconductor (mainly for its stability and heat conduction properties)
- running it in an inert atmosphere (so it can get up to red-hot without burning up or converting into graphite)
- building it as an approximate cube - up to, say, 6 feet on a side
- powering and cooling it on two opposing faces
- with water-cooled silver bus-bars the size of the faces
- connecting it by covering the other four faces with optic fibers for I/O (to interconnect with integrated light-emitting and sensing devices).
Of course the point of the yarn, in addition to potentially being possible, is the appearance of the resulting device:
An enormous supercomputer in the form of a 6-foot cube of diamond, glowing slightly red from operating heat, supported by water-cooled silver bus bars in an inert atmosphere within a glass bottle (ala a vacuum tube), with millions of optic fibers to provide it with sufficient I/O.
Just the sort of thing you'd find as a component in, say, one of the later Skylark spacecraft of E. E. (Doc) Smith's Golden-age SF stories.
Bantam Dominique roosters crow a four-note song. Once you've heard it as "Happy BIRTHday" you can't NOT hear it that way
"Power" is the measure of energy per time unit ( that is, P = E/t ).
The heat dissipation is directly proportional (by a material-specific constant) with that energy (E), which is
E = P*t = V*I*t = V^2*t/R
As mentioned before, the heat dissipation wont' drop because the resistence is lower, but because that lower resistance allows a similar drop in voltage, and E depends on the square of V
gtkaml.org
In your frankfurter experiment, The voltage was the same across each of the dogs and so the only thing that was different was the current as a result of the conductivity of the sausages. In this case, P = VI = V^2/R for each of the dogs.
If you had connected the hot dogs in series, like this:You would create a voltage divider network. The analysis for which goes like this: The current through any loop in the circuit is constant (e.g. the same current would be going through both the dogs, but the voltage supply would "see" a higher overall resistance so the total current would be less than in either case.)
In this case, the largest voltage drop is across the higher resistance. since the current is the same through both, the generic dogs will dissipate the most heat in this isntance.
Imagine cutting the generic dog to a length that made it less resistive than the ballpark. In this case, the total current would increase from the previous, and the ballpark would have the large voltage drop.
A simple power supply regulator does just that: it puts a resistance in series with the load and adjusts that resistance so that the voltage across the load is the same no matter the load. This presents some serious efficiency issues when the unregulated voltage is significantly greater than the desired voltage.
In fact, the IC is more complicated than that, introducing parallel and series parallel circuits, and transconductance elements, capacitance and even quantum tunnelling, but suffice to say, in general, the lower the wire resistance, the lower the fraction of heat disipated by the wires themselves.
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