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AMD Licenses Z-RAM Technology
ZuperDee writes "It appears AMD has licensed Z-RAM technology from Innovative Silicon for possible use in future processors. According to the article, this could lead to caches about 5 times denser than the SRAM that is normally used right now. C|Net says they will probably make the announcement on Monday."
We have run out of ram letters!
Another reason Apple's alliance with Intel wasn't such a good idea. Should have gone AMD, Steve.
Sounds good to me: dense,fast L1 and L2 cache on die (for each core on die!)...SWEET!
t ml?part=msn&subj=ns_2543&tag=mymsn)
If it can be implemented well, I can dream of a dual cpu mobo with a pair dual core FX?? and can support 16GB's or more of insane speed RAM and holographic RAID, and quad SLI graphics, I maybe could run M$ Vienna to play Duke Nukem Forever! w00t!
M$ Vienna:(http://msn.com.com/2100-3513_22-6029241.h
Down With Slashdot BETA!!! I've been around the corner and seen the oliphant; you can only abuse me from your perspecti
It's a single-transistor capacitorless memory cell using the "floating body effect" of silicon on insulator (SOI) devices. Presumably stored charge in the gate affects the operation of the transistor in a way that can be used to store and read a bit, but I didn't feel like registering to read the white paper. The new memory should be six times denser than SRAM and twice as dense as DRAM.
"Is life so dear, or peace so sweet, as to be purchased at the price of chains and slavery?" - Patrick Henry
This is another article covering the licensing which was on digg.com earlier http://www.eetimes.com/news/semi/showArticle.jhtml ;jsessionid=V2AQAAYC3GVIQQSNDBESKHA?articleID=1771 01749
a very simple perfomance check i love to run on every computer i come across:
put windows calculator in scientific mode (yes, mathmatica or maple will do factorials in a fraction of the time, but try to post windows scores for comparison purposes....)
type in 100,000
hit the n! button
ignore the warnings that it will take a long time, don't even bother clicking on "Continue", because the calculation is still going.
and report how long it takes to complete a factorial of 100,000
please report what CPU you have
(btw, Hyper-Threading might speed things up 2x sometimes)
and i find that the calculator runs faster on win98 than XP...
celeron 800MHz (coppermine): 333 seconds (5min 33sec)
1.4GHz celeron (tualatin) does it in 205 seconds
P4 3.2Ghz and Athlon 3200+ both do it in about 80 seconds....
i disable sigs
You could do that or you could use the Greek alphabet.
The owls are not what they seem
We still got all the letters in Unicode...
It's better to be the foot on the boot than the face on the pavement. ~~ tkx Kadin2048
http://www.google.com/search?q=zram
5 18&id=5434
A nice techy article about how/what makes ZRAM special. It goes in-depth about the things you mention. http://www.cieonline.co.uk/cie2/articlen.asp?pid=
Obligatory Wikipedia Link
[Fuck Beta]
o0t!
!ERR: Signature not found.
Good article. The parent should have been modded up, not down.
"Is life so dear, or peace so sweet, as to be purchased at the price of chains and slavery?" - Patrick Henry
I'm not that familiar with AMD - or chips for that matter. However, I'm a huge fan of Paul Graham and his brand of philosophy that glamorizes open source technologies.
I know Slashdot attracts individuals that are very fanatical about open source technology. I'm curious to hear what the open source community thinks of AMD as a company and Intel as a company, and consequently, the culture of each and what brand do they feel like to be the most moral.
What I'm looking for is a heady discussion about the two companies with a focus on the both AMD's and Intel's brand. What makes either company appealing for you? How do they stack up against each other, whose got an advantage and why? Most of all, I want to hear some quality rhetoric in support of either company. Let's see some ill technology prose.
I am so far abstracted from the hardware industry that I would like people more familiar with it to help me sort out the 2 main chip brands and how I should view them.
Any reason why this couldn't also lead to much higher density for system RAM?
-jcr
The only title of honor that a tyrant can grant is "Enemy of the State."
Man, In 2 years we may use IBM Cell Processor for desktop.
Anyhow it is good for AMD and his users
[My english is better than most other people's Turkish, so please point out mistakes politely. Thank you.]
Organ Dealer: Z is just as good. In fact, is better. Is two more than X.
Rambus is not a way to store information on a chip, it is a proticol designed to transfer data between storage spaces using packets and a bus. This is a constrast to SDRAM which transfers data by synchronously indexing then caching a strip of data and copying it to or from the chip's cache. Z-Ram on the other hand is a way to store information on a chip just like DRAM or SRAM. Z-Ram makes no demands as to how information is transfered, it may theoretically be done using the Rambus system (making RZRAM rather than RDRAM) or more likely using the Double Data Rate Synchronous Ram system (making DDR SZRAM as opposed to DDR SDRAM). In this case it is not intended to be used as system ram at all but on-die cache. Thus it will not have to use either of these systems since it (as cache) will only need to interface with the CPU and MMU. Such a system will have no impact as to what ram someone may use and will make no archetectual differences outside the die. Thus the Rambus comparison is completely pointless. If you had even read the summary properly you would know that.
When Argumentum ad Hominem falls short, try Argumentum ad Matrem
Nice try, but RDRAM was never on-die in Intel chips. Sure, they fucked up by locking themselves into it, but this is a completely different situation. Consumers haven't been able to choose their L2 cache architecture since the days of cache-on-a-stick.
Stasis is death. Embrace change.
You know, like that tale about the slayer of the dragon becoming dragon himself an so on?
I have not heard the tale you speak of. But as far as analogies go, I would think that tale probably is a bit of a stretch, maybe even a bit crazy.
Well, it's a sign that market leader Intel has over the decades drifted more towards marketing machine mentality, while challenger AMD has stayed somewhat truer to its engineering roots.
Intel went for Itanium, while AMD went for 64-bit x86.
Intel went for Rambus, while AMD went for DDR and HyperTransport.
If you look at the multicore technology AMD is researching, it looks better than Intel's multicore.
I'll acknowledge that Intel recognized the value of wireless ahead of AMD, although dedicated wireless chipsets are obviously better than Centrino anyway.
I'm just glad that healthy competition is there, to make us consumers the ultimate winners.
>If AMD becomes the better processor choice in the future,
What if are you talking about? IMHO, AMD is the better one.
>then I'm sure Apple will switch again.
Of course, but only after they try convincing people for years that they have the better one in their computer and then when they switch to AMD, youre gonna have all the koolaid drinkers convincing us how much superior the AMD chip is to Intel just like they are telling us now that the PowerPC was much slower.
Remember the "No, no,...speed is not important" mantra they use to flog for years? Its now become "Speed rocks, look at how fast these Intels are?"
Do I need to say more? OK, I guess I can - EMT64? StrongARM? (Yes, they bought that from DEC, but rather than kill it and go with one of their own designs they stuck with the better design. The StrongARM lives on in the PXA series.)
As another person pointed out, SOI may simply be too expensive for Intel to license from IBM. Does AMD use SOI? I don't believe so.
retrorocket.o not found, launch anyway?
To get into a console, you can't win if you fall into categories 1 or 2. If the Cell were that expensive or underperforming, people wouldn't be putting it into consoles.
Now, there is one thing about the Cell you missed - It's a special-purpose processor designed for raw floating point performance. 8 of the cores can only do basic streaming floating point (although they do it EXTREMELY fast), the remaining CPU is a VERY stripped down PPC.
So for a gaming system or DSP, the Cell will kick ass. For general purpose computing, it's going to suck.
retrorocket.o not found, launch anyway?
Regarding the power usage, before the Athalon, if memory serves correctly, AMD lead Intel in processing per watt. AMD seemed somewhat resistant to go the high power route.
Well, they're accessed like static RAM (no precharge time). That's why they are useable as caches. In reality though, it would seem like they would have to be refreshed from time to time.
To answer the GP (GGP's?) question also, this technology could not be used in system RAM because system RAM cannot be SOI. Well, it can be SOI I suppose, but since the gates in system RAM are vertical within the chip instead of horizontal, the gate of the transistor would not be located particularly near the insulator and so and effects of SOI helping the gate maintain a floating charge just wouldn't be there.
http://lkml.org/lkml/2005/8/20/95
I know I've seen AMD 8088's, so they're not some new upstart company or anything. Intel reams us out because thay're "number 1" but as that impression slips AMD charges starts turning the screws too. Rinse repeat.
In a nutshell, on a CMOS transistor on an SOI process (such as used by AMD and IBM, but not used by anyone else that I can think of... Intel, TI, TSMC, NEC, Samsung, etc), the delay of the transistor (how fast the transistor is) depends on the history of the signals that were applied previously to the terminals. So the transistor has a memory of previously applied values. Which, now that I write this, seems like it's obvious that this would make a possible memory storage element, but normally this "feature" is a major pain - because it's difficult to track the history of signals on a transistor using current CAD tools for, for example, determining the speed of the final design, you have to assume the worst case (so that your chip works no matter what).
0 0076+body+hysteresis+soi&hl=en )
So normally this "feature" is considered a liability, or at least something that designers wish could be an asset but which is too hard to utilize effectively and is thus ignored.
In more gory details, this exerpt from EETimes explains it pretty well:
( http://ww.eetimes.com/issue/bb/showArti...D%3D573
In partially depleted MOS transistors -- the only kind used in production SOI today -- the body of the transistor is a small, electrically isolated piece of silicon trapped between the active portions of the transistor and the insulating layer underneath. If this body is allowed to float, it will take on a voltage determined by the capacitive coupling between it and the other portions of the transistor. But the voltage -- or, more properly, charge -- on this floating body can affect threshold voltage, and hence the drive current, of the transistor.
Ideally, the floating-body effect can deliver a formidable performance gain. Two circumstances arise from that gain, Soisic's Pelloie said. First, the voltage on the body influences the transistor's threshold voltage. "If you switch the gate of the transistor from off to on, then the body potential increases, which yields a decrease of the threshold voltage and then an increase of the drive current," he said. "The switch is then faster than in the bulk CMOS case, where the body is grounded."
The second effect is another mechanism for influencing the threshold voltage. "When you use stacked transistors in a gate, like NAND, NOR and any other combinational gate with multiple inputs, the body-to-source voltage of the transistors corresponds to a forward-bias condition, and the threshold voltage is lowered," Pelloie said. "For bulk CMOS or in a grounded-body situation, if the source has a high voltage value, for instance Vdd [the power supply voltage], the body source voltage then becomes - Vdd and the transistor body source junction is reverse-biased." That increases the threshold voltage and lowers the drive current. Analyzed at the circuit level, he said, these two SOI advantages are combined and globally yield a higher-speed operation.
But there is a catch to these threshold-voltage-lowering mechanisms, as Pelloie explained: "Since the body is floating, it follows the variation of the other terminals of the transistor. The body voltage never keeps the same value, as the transistors are, most of the time, switching in normal operation mode. This results in what we call the history effect: The propagation delay and some other features of the gates depend on the history of the signals applied to their terminals."
-------- end EETimes snippet -----
It will be interesting to see how this particular use of the floating body effect scales as we continue to move to 45nm and beyond. It will also be interesting how it handles low-voltage quantum-induced soft-errors. Also, similar to DRAM, this type of memory will need to be refreshed - if AMD uses it in a design, it will interesting to see how the impact of refreshing, and trying to read a very small effect and amplify it to make a signal will impact the speed of the devices when used in a large cache array.
Note that if ZRAM works, it would let AMD put something like 4X as much cache on their chips in the same die area. This indeed would be quite a competitive advantage.
But why do people assume this will work? There's a couple companies trying to do this stuff (T-RAM is another) and none have succeeded yet.
It has proven to be difficult to get this kind of technology working in production chips. The main difficulty is that process control becomes very very important. Your yields drop through the floor.
Additionally, note that any 1T transistor technology is inherently a stored charge device (like EPROM, EEPROM or flash memory but different). The problem is that transistors on chips are getting so small that they have less than 100 electrons in the gate of a transistor. So your insulating ability becomes very important. Your chip is designed for electron mobility that electrons can flow around a fairly long loop (the instruction execution path) 1 million times in 1 millisecond. And now you have to make sure that 100 electrons sitting in one place don't leak out in that same time.
It's a challenge. It might be possible. I don't see any particular reason to think that AMD is going to be the one to do it though. Intel are wizards at process technology, as evidenced by their movement to 65nm before AMD. They don't happen to use SOI though, that's about the only advantage AMD has in this situation that I can see.
Anyway, I do like AMD (I'm typing this post on one), but them licensing some unproven technology from a 3rd party is no kind of condemnation of Intel or Apple's choice of Intel.
http://lkml.org/lkml/2005/8/20/95
Because Z-RAM can scale much better than DRAM, they should be able to make it much smaller/faster. Also, because it is made of one transistor and not one transistor and one capacitor, it takes up half as much space. So you could double the density of your DRAM products.
But more interesting, if this can replace SRAM that means that it doesn't require refreshing like DRAM does. This would be a MAJOR benefit if it replaced DRAM for system RAM. Without the capacitors you could get much higher speeds too (which is a big problem with system RAM these days, processors have to wait HUNDREDS of cycles to get something from memory).
If this stuff works (which I think it must if AMD is buying it) this could be big.
Comment forecast: Bits of genius surrounded by a sea of mediocrity.
2.8242294079603478742934215780245e+456573
~66 seconds, p4 3.0 w/HT @ 3.2~gHz
Clowns are funny.
I'm a research scientist. At one point Intel made a chip with a flawed FPU. They eventually admitted it. After much harassment, they said they would be willing to replace the defective CPUs for certain people, if *Intel* thought that person really needed the accuracy. I don't need Intel to decide for me how accurate my results should be. That was the day Intel lost all credibility for me as a company treats their customers right. The most certainly have NOT always produced top quality. Long live AMD.
Mod parent up 'Informative'. Not too many people already know about low-level logic physics.
110100 1101000 1101000 1100110 0 1101111 1101000 1100011 1
Lately, every Apple story attracts a few of these "should have gone AMD" posts. IMHO, at the time of the choice, ~ 1 year ago, there were two legitimate reasons to choose Intel over AMD.
First and most importantly, Apple needed better laptop chips. And at the time, the Pentium M was miles ahead of the AMD mobile chips (and the IBM PowerPC chips) -- the difference has narrowed, but even then, the Turion 64 chips are relatively untested, relatively unavailable, and relatively higher in power consumption, even today.
Second, is security of supply. AMD is a bit of a risky bet as a sole supplier. With only one active fab, and with AMD running at pretty high utilization, there was and is a much higher risk for Apple that they would not have enough chip supply. Plus, chip supply was one of the major problems with their last chip supplier, IBM.
Don't get me wrong, I'm an AMD fan (and minor stock holder). But at the time, Apple's best choice was Intel, the Pentium M, and the rest of the Centrino package. When Apple starts looking closly at migrating their server lineup to x86; however, I would not be surprised if Opterons started showing up.
DRAM uses 1 transistor plus a capacitor per bit. SRAM uses 6 transistors. ZRAM is denser than both, as it's just one transistor.
I don't think it's a drop-in replacement for current types of memory, but it may become popular in the future. The advantage isn't as big as with SRAM, so there's less of a rush.
I rarely criticize things I don't care about.
I've read that chips like PowerPC 970 that have an extremely small die can be hard to cool, and also that cache is a good way to increase the size of the die without increasing power usage that much.
If AMD can provide a reasonable cache that only requires a fraction of the die space, might this become a problem?
I rarely criticize things I don't care about.
Before the 4004 "processors" were made out of discrete components that were manufactured together.
I do believe that TI has many of the patents on combining multiple discrete components into a single piece of silicon - however that isn't a microprocessor
I have mod points and I am not afraid to use them
Cant wait till our HDs have 128meg cache
DVDRW built in 64meg
digitaltv card - 64meg
128meg in the ipod
Liberty freedom are no1, not dicks in suits.
Here's a point by point refutation of your arguments.
"One of the major advantages of Z-RAM is that it doesn't require changes in the process (providing you're already using SOI, obviously). It doesn't seem to tighten the requirements on process control compared to a more conventional design either."
That's untrue. You may not have to change the process, but you definitely have to tighten it. The amount of charge that you can hold on the gate becomes critical. The "leakiness" of transistors isn't nearly as important when you don't have 1T cells on the die, as no transistor has to hold its voltage for more than a few cycles times (perhaps a nanosecond). With the 1T cell, it has to last orders of magnitude longer. Thus you will need to control the leakiness more. That's a new parameter to optimize, and this means you have to by definition tighten your process to get it to the right value and hold it. If the leakiness changes, your yield drops. This will affect yield.
I don't feel this is a storage charge device like a DRAM. Either way, a DRAM is storing the charge in a different way, on a capacitor instead of in the body of a transistor.
"It's certainly challenging, but you haven't mentioned what I understand is really one of the biggest challenges. From a memory viewpoint, this is a bit like a DRAM cell but it stores a much smaller charge than a conventional DRAM. the small charge means you have to design extremely quiet sense amps to keep the signal from being lost in the noise. If memory serves, however, they can/do use the transistor that makes up the cell as the first sense amp."
If you think this system is using the standard "precharge/connect/dump/sense amp" type system of reading cells, I think you're way off. This kind of system just isn't useful for the very fast RAMs that are needed for caches. SRAMs are traditionally readable without precharging and without the need for refilling the cell after you read it (as the read wipes out the contents). Adding these things would make the cache RAM not quick in true random accesses (instead reducing it to a page-mode device like DRAM) and make the processor cache have about 50 cycles of latency unless it was in the middle of a refresh, in which case it would be even higher!
"SOI gives you a performance advantage roughly equivalent to one step smaller geometry, so AMD's 90 nm is roughly equivalent to Intel's 65 nm. IOW, AMD's process technology is almost a full generation ahead of Intel's right now. I'd also note that while SOI improves performance about as much as one step smaller of geometry, it does so without the increase in leakage that comes with the smaller geometry. As has already been mentioned elsethread, designing for it is more difficult, but the end result certainly seems to justify the extra work."
You're just plain nutty. Even if SOI gave you advantages of 1-gen in process, AMD would only be tied with Intel for the moment (until AMD hits 65nm this summer). As to to leakage, why don't you ask around the industry and see how the leakage is on the new Intel chips. It is far lower than 90nm chips, both AMD's or Intel's. Your argument is that Intel is losing out a lot due to not having SOI, and it just isn't holding.
Intel's chips are currently faster and use less power (core Duo T2500 versus AMD X2 3800 or 4200+), with less leakage and with a smaller die. In what way is AMD ahead here? Oh, and Intel hasn't even released the desktop (performance) versions of their chips yet.
AMD's architectural superiority for years is what has given them better performance, not process technology. Intel has kept pace (well, close to it) with superior process technology. Now they have dumped NetBurst and adopted a good architecture they stand a good chance of passing AMD up. It'll be an interesting race.
http://lkml.org/lkml/2005/8/20/95
Cache on a stick, now those where the days... :)
BTW: has there been any word on whether they plan to use this new tech on their standard desktop Athlon chips or are they just wanting to trade physical cache size for cores on their workstation/server Opterons?
--Neth
Two of my imaginary friends reproduced once
This is great!