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Marvell Launches First Triple-Core Hybrid ARM Chip
Blacklaw passes along an excerpt from Thing.co.uk that begins "While other manufacturers are content to develop dual-core ARM processors, Marvell has gone one better — literally — with a new triple-core chip called the Armada 628. The system-on-chip design, based on ARM's v7 MP series, features two dedicated 1.5GHz processing cores plus a third 624MHz core in a single application processor — making Marvell the first company to bring such a beast to market. While two of the cores are a pretty standard SMP setup, as seen in other dual-core ARM implementations, the third is a standalone processor designed for ultra-low-power draw. The idea behind such a design is that when the system is idle, or only running a low-performance application on a single thread, it can shut off the dual-core portion and save oodles of power."
Now with the power of ARM!
The Kruger Dunning explains most post on
Why can't it just shut down one of the two normal cores, and run the other core at a highly reduced rate to get the same power savings? Additionally, I've seen plenty of benchmarks where a higher-power draw chip that can get done with a task quickly and drop back to low-power idle mode is actually more energy efficient than a lower-power chip that takes longer to get the task done. What sort of tasks is the third core intended to do that it would be so much more efficient than a regular ARM core?
AntiFA: An abbreviation for Anti First Amendment.
Maverllous!
Tired of my customary (Score:1)
Intel should be seriously worried about their creep into netbooks. Intel brought the notebook market to all time low prices with atom and things like this chip might turn around and bite them in the ass.
Beowulf Cluster of...... Never Mind......
Obligatory Imagine a Beowolf cluster of these!
Reminds me of This old chestnut from the Onion.
I guess they're trying to get a LEG up on the competition.
Why not a 50MHz or 200MHz core or something?
There's a tendency to put a little CPU in devices to handle activity when the device is "off". Something has to sit there and watch for the remote if the TV is to be turned on remotely. Many machines have a "wake on LAN" capability, and most servers have an extensive remote management capability built into the network controller. All of these imply some little CPU, invisible to the main operating system, doing things when the device is supposedly "off".
This isn't necessarily a bad thing, but it does provide an attack surface. Especially since those little machines tend to have very powerful access to the rest of the system, bypassing most security measures.
This new chip looks like an effort to integrate the "power off" CPU onto the same silicon as the main CPUs. That's a routine use of silicon real estate by putting more on one part. But the concept isn't new.
You have the right to bear ARMS, don't let any authoritarian inner-city councilman tell you otherwise
Haven't triple-core processors been around since, at least, the xbox360 came out?
Imagine a ipad with this with retina display and no glasses stereoscopic 3d with this chip. Call it the pad pro and nerds everywhere will want one.
At current processes (44nm, 32nm, etc.), switching power isn't critical at low speeds, it's leakage that is the issue. So a fast (big) processor takes a fair amount of power even if you run it slow.
Whereas a slow core is smaller, so that means fewer transistors to leak. You also can make the gates out of lower-leakage cells, so that even when on they leak less. This limits top speed which would be a problem for the main core but isn't a problem for this non-main core.
Having additional low-power cores isn't that strange, many current phone SOCs do this. What is unusual is most of those have one main core and many slower ones and this one has two main cores and one slower one.
http://lkml.org/lkml/2005/8/20/95
Fuck everything, we're doing 7 cores!
Cores can be optimized for low power consumption or high performance. A core that can switch between a performance mode and a low power mode is probably making compromises on both modes. If you have completely different cores your can avoid such compromises and maximize performance in one core and minimize power consumption in the other. Having heterogeneous cores most likely yields better results than any mode switching scheme.
Will we rate multiple oodles in binary or standard method? Kilooodles or Kibioodles? Megaoodles or Mebioodles? Gigaoodles or Gibioodles?
INQUIRING MINDS WANT TO KNOW!
Chas - The one, the only.
THANK GOD!!!
Meh, I'll wait 'til I can save at least one Poodle.
Blacklaw passes along an excerpt from Thing.co.uk that begins ....
pity it's thinq.co.uk not thing.co.uk otherwise this would be a good thread
It's common for people (myself included) to conflate Energy with Power, but it's often an important distinction. To begin with, technically, we don't consume power. We consume energy (to do work, which is in the same units), and power is the rate at which it is consumed.
An important factor often left on the floor is processing efficiency, meaning how fast are we getting work done for a given power level. If you reduce power by half, but the work takes twice as long, you've accomplished nothing. For the same amount of work, your battery will drain the same amount. Indeed, what we really want to do here is make systems take less energy, and within reasonable limits, it doesn't matter how much power you consume while you're doing it.
This has actually been one of the things that makes ARM processors energy-efficient. Not to say they're not also low power, the strategy has always been to build event-driven systems. Something happens (user input, sensor reading, etc.), which causes the CPU to wake up in your embedded system. The ARM processor then blasts through the work to be done, and then goes to sleep, powering down completely until the next event. (Some systems will use intermediate "sleep" states that are less time-expensive to sleep and wake.) An ARM is more efficient than an Atom, in part because it uses less power, but also in part becauses it needs less time to complete the same task.
In today's technology, this is especially important. At 90nm and 65nm, the Intel Core and Core 2 used clock gating to save power. Functional units (e.g. floating point multiply) that are idle have their clock signals gated, which reduces power being used by that part of the clock distribution tree. This is important because in those technologies, dynamic (switching) power dominates. In the Core i7, Intel uses POWER gating. When a functional unit is idle, it's powered down completely. This is because in 45nm and 32nm CMOS, static (leakage) power is what dominates.
Going back to ARM, this is something being applied in the Cortex A9. They've made a more complex processor in order to execute out of order, but as a result, computation goes appreciably faster. During computation, leakage is constant. By getting the work done faster and powering down completely, more leakage power is saved. Less time translates into less energy, even if the A9 uses more power than the A8.
They're not the first, there's nothing different about this, and it's not even to market.
"Triple core" as they describe it is pretty standard stuff in the embedded/mobile world. You have one or two main "application" cores, and one or more I/O processing cores doing DSP, graphics, data processing, low rate data moves, etc. Just have a look at an NVidia Tegra 2, or even a Tegra 1 marketing slide and you'll see it has even more cores than this Marvell chip. Better yet, any Qualcomm 1GHz class cell phone chip, as those are at least actually shipping in quantity.
And hey, Tegra 2 hasn't even managed to get to market. The Marvell chip hasn't even got into a design! It's not even available for samples. How the fuck is that "to market"? There are even Tegra 2 based tablets being demoed at trade shows even if it's not available in quantity. Marvell has nothing whatsoever to show but that's not stopping them gloating about being first with something that blatantly isn't a first in any way.
Is there anything in this press release and submission which is accurate other than the clock speed? Is that even correct?
Ahh...you....
Bwahahahahahahahahahahahahahaha! Heh...heh... And ..and..any day now there will be smartbooks everywhere!
--bornagainpenguin
PS:Wake me up when they FINALLY release these things in a smartbook device about the size of the HP Jordana hand held PCs...then maybe I'll be interested, otherwise this is just more vaporware.
Have a Virgin Mobile USA smartphone? Give VMRoms.com a try!
I've switched to Wilkinson double sword , classic double edge blades , sharper than anything else and a lot cheaper too.
The fact that they're cheaper also helps with comfort because you feel more inclined to change them before they ware out.
Haven't had a problem yet but i am considering switching to a straight razor as soon as i can buy myself a Dovo. Sure enough you need to be careful but the increase in comfort and quality of the shave are at least the same as the switch from crap razors to Wilkinson. More so you don't need to rinse the blade every centimeter if you left your stubble grow a little too much.
Either way I'm keeping the Wilkinson for when I'm too tiered to be safe using a straight razor.
I think I'll skip the Killapoodle chips and wait for the Megapoodle ones.
I think we're tripping up over the reporter's choice of language here. From Marvell's actual press release:
The tri-core design integrates two high performance symmetric multiprocessing cores and a third core optimized for ultra low-power. The third core is designed to support routine user tasks and acts as a system management processor to monitor and dynamically scale power and performance.
Depending on what their definition of "routine user tasks" might be, it sounds like it doesn't actually shut off both cores and run exclusively off the third core, the way TFA makes it sound -- it only does that if the device isn't doing anything. More interesting stuff:
Marvell's ARMADA 628 tri-core CPU comprises a complete SoC design – a first for the industry. In addition to the tri-core CPU, there are six additional processing engines to support stunning 3D graphics, 1080p video encode/decode, ultra high fidelity audio, advanced cryptography, and digital photo data processing – for a total of nine dedicated core functions.
This sounds like a pretty cool chip.
Breakfast served all day!
Why do I keep seeing articles about new super-powerful ARM7 chips, when ARM9 has been out for a long while? Even my Nintendo DS has an ARM9, so I can't imagine it is that ARM9 is too big or complicated or inefficient.
With only two processing units, you'd have no CENTRAL processing unit, duh!
Blackberry will be announcing a new tablet supposedly powered by a Marvell chip. Looks like we might see this chip in action soon enough.
"The only normal people are the ones you don't know very well."
Wait, didn't NEC do the same thing six years ago? http://www.physorg.com/news1344.html
Qualcomm Snapdragon QSD8672 - dual cortex-a9 + radio processor (ARMv5)
TI OMAP4 - dual cortex-a9 + C64x DSP - only 2 arms, you get a DSP for the third core
Nvidia Tegra2 - dual cortex-a9 + arm7tdmi "media accelerator"
ARM Cortex A9 core, for example, has ARM v7 instructions set architecture, and latest ARM Cortex A15 has ARM v7A architecture
If I was a phone designer, reading this I would assume that I can install a realtime OS on the third core to perform phone and system management related functions, and use the other 2 cores for the user OS to run the UI and all the apps. With a well developed system, these are the features this chip could allow: - the user OS could reboot/freeze/crash and you can still make calls or stay on the line with the current call. - you could be down to the last couple of minutes of battery life, and decide to shut off the user OS and only leave phone functionality on which would stretch that last 3 minutes into another hour (or more, or less). - an app that takes all resources, would not affect phone functionality. - there could be a real separation of data paths between the 2 operating systems (the user OS and the realtime OS) which could protect the realtime OS from viruses (although the separation could prevent certain features. This one could incite interesting discussion). I think this is great product, we are sure to see more development in the industry along these lines.