Slashdot Mirror
Reconfigurable Supercomputers
VanL writes "
A previously unknown company
has come up with a supercomputer design using programmable logic components.
If this is right, this might be another case of a garage inventor changing
the computing paradigm. In the meantime, they are claiming incredible
things from their demo computer: It is the worlds fastest computer
(3-4x faster than IBM's Pacific Blue, and 10x faster than a Cray); it is
fault-tolerant enough that you could shoot a bullet through it and it would
keep on working; it will run any operating system out-of-the-box; and it
is the size of a normal desktop computer and runs off household current.
They call it HAL. ;) Check out the press
release, a news
story, and a more detailed description of the company and the technology
here."
I wonder if they licensed some of their technology from American Computer Company :-)
Subject says it all.
This whole thing sounds like it's from the "too-good-to-be-true" department. The notes about
"12.8 TeraOPs(Sustained - executing 4-bit adder; 3.8 TeraOPs executing 16-adder)"
make me a little suspicious, as does the term "Synthesized Hyper-Specificity Processors". Sounds to me like they made an increbily fast 4-bit adder. Yay.
I'm going to buy one and overclock it.
i still cant see myself paying $26 million for a [what they say is] 4 cubic feet.
;)
and i still would rather have pacific blue's hd space, for my massive mp3 collection
i suppose an exteranl RAID wouldn't be outta the question tho....
mmmmm..... storage.
I'll believe it when I see some hard evidence. This sounds far too good to be true.
:-)
But with the UltraHLE (which did sound "too good" as well) in recent memory I can't help but wonder if it can emulate a Cray...
L-ViS
I don't get it. While reading the press release, I'm thinking to myself, "But we've had FPGAs for quite a while now...what's different here?" Then a couple of paragraphs later, I read...
"It uses 280 programmable chips from Xilinx corporation, called field-programmable gate arrays (FPGAs) on thirty-six proprietary integrated circuit boards."
Ok, so as far as I can tell there's nothing new here. The idea of being able to configure logic "on-the-fly" has been around forever. An actual commercial implementation, FPGAs, have been mainstream for nearly a decade. And FPGAs aren't as fast as ASICs. How's this going to beat current cutting edge supercomputer technology?
"Pay no attention to that man behind the curtain!"
maybe this mob are the same people who recon they developed cold fusion.
Perhaps if we hang out for a while, they will offer a 2 for 1 deal, new simmple mega computer and a cold fussion pack, for the 1 low price of $26 million
b.t.w If its so simple, why surrely they could build it for under 1 million.
This is obviously a fraud. First, with the boards clustered that close together, you'd have heat problems. Second, with the boards that close together, if you shot a bullet through it, you'd take out every board.
Third, there were WAY too many innovations in that press release. From a new OO language to a new OS to a new hardware paradigm.
I'll believe it when I see it.
Tim
PHPBuilder.com
I read about these folks about a year ago... paid $100K to Xilinx for the chips, and then asked for all the bad chips that didn't make the grade (and got them gratis). Ditto with the mulitple motherboards, paid for the good and took the rejects. These folks then designed an O/S which would search out all usable components on the fly and reconfigure itself as needed when components were taken out. Their minimum boot configuration was 7% operational capability (ie. only 7% of the motherboards and chips were usable overall). Think of what this will do to chip prices if all chips out of a fab are available for use...
My first thought for this sort of computing was for a ruggedized military grade field computer that could take a few bullets and keep on going. Now all that is needed are displays, input devices and storage that is similarly capable.
But till then, I'm sure they're looking for investors...
I'll bet they're using transpacitors because they're so fast and have so much storage capacity. Who needs silicon when you can use vaporware?
Gregm
act now and receive a ronco convection toaster oven
with amazing stai-hot technology for absolutely nothing!
thats right, absolutely nothing!
thats the supercomputer, AND the free toaster oven,
yours for 3 low low payments of only 19.95 each!
Of course it'll run Win98; it'll do architecture emulation. Do you want to pay 2.6 mil for a Win98 box?
:This once unheard-of company expects to be :"heard of" this week, now that it has unveiled :Hal for all to see. But its address is a secret, :for security reasons.
[rs.internic.net]
Registrant:
Circa 65 (STARBRIDGESYSTEMS-DOM)
208 1/2 25th Street
Ogden, UT 84401
US
...Whoops
>But does it run Win 98?
Forget that, can you play Quake on it?
Oh, how I loathe greed. This machine couldn't POSSIBLY cost all that much to produce. $700 million my ass. I remember an interview with Cray in the eighties. The interviewer asked Cray how he thought he would ever sell his machines at such an outrageous price. He said "I only have to sell one..." Greed sucks. Damn it! I mean, if that $700 million machine sold for only, say, $1 million, I'd buy one right now! ;)
SLC is rife with fraud lately. There's an
interesting article in Forbes Magazine ( January 99 2nd or Feb 1st issue ) about the amazing
number of scam artists being prosecuted in
Salt Lake.
Let's wait and see on this one...
This is really hilarious.... thanks a lot... made my day..
the academic and corporations will prolly
rip him a new one, prolly infringing on
patents too. i got a sneaking hunch that
this is just a load. plus its claims are
made by a fellow with no formal education
and a "prtnet" who is a lawyer.
It looks viable to me although the killer is the writing the Software that will configure the FPGAs. A lot of the promises (emulating other processors, languages) rely on this. It is possible to get fast systems out of FPGAs but this normally needs a human architect taking an algorithm and designing the logic to implement it. It seems to me that there, as yet unwritten, software will do this work 1000s of times a second.
Its a lovely idea but I think that, even if successful, it will be confined to niche markets because of this software limitation.
A Coward
I'm as much of a fan of reconfigurable computing as the next guy, but it has its limits. The most important one is that specialization has a cost. You get amazing performance by configuring all the logic for one task, but then when you need to perform a different task what do you do? Can you say _REALLY EXPENSIVE_ context switch? This is orders of magnitude worse than task-specific microcode. Projects such as that described at http://www.sanders.com/csrc/index.html are supposed to address this, but they're Not There Yet.
Another problem is balance. Sure, you get massive computational power, but what about interprocessor communication? What about I/O?
It's a shame, really, that overblown claims like this will give reconfigurable computing a black eye. RC is _great_ for certain applications such as signal and graphics processing, and I hope that one day it will become a standard _part_ of the overall computing milieu, but it's not the panacea these guys advertise.
My favorite site on this topic used to be reconfig.com, but it seems to be down at least for now. I know there's lots of good work being done on this at various schools. Oddly, BYU is one. I think DISC is there, but could be wrong; DISC was one of the better projects, anyhow.
jdarcy@mediaone.net
Yes or at least a port of Notepad
I don't think so somehow.
Is that the US Patent Office just might be dumb enough to grant them a patent!! =8O
The subject says it all. Can't anyone recognize self-inflating marketing B.S. when they see it? The whole thing talks about projected capabilities, expected functionality, conceptual architectures. This really strikes me like a bunch of people (or maybe even a single person) who's trying to inflate their ego, and get someone (regardless of the insistance on the page that its not a solicitation for money) to give them money.
Bottom feeding technoscum people do that sort of thing all the time. How is it newsworthy, and why would it end up on here?
..and if not, how long 'til it is ported?
This is the same sort of thing as EFF's deepcrack except reprogramable. So it should be could for highly distributable tasks like breaking crypto rendering fractals, 3d images, processing scientific data or calculating mersiene primes. It would probably not be so great for real time tasks or tasks involving tons of data needing minimal processing.
I think this whole thing is a load of crap. I mean, c'mon! Powered by a 110V outlet, NO extra cooling! Hell, my room with a PII 400, and a el cheapo P133 heat my room an extra 10 degrees or so!
;)
Blech. Give me some proof... and then I'll whip it out.
At this stage, I would guess yes. If the things is dynamically reconfigurable it would be trivial to cook up phony benchmark results. It sounds to me like the company is trying to drum up press and capital. Maybe their technology really is that cool, but how about showing us some performance on real world problems. Looks to me like a work in progess...
Does anyone have a clue of what kind of FPGAs they
are using ?
A couple of years ago I had a look at the Xilinx
XC6200 series, and thought I should get one to
play with, but I think Xilinx is keeping a remarkably low profile concerning the XC6200.
The XC6200 is cool because of its open configuration format, and that it is hard to
destroy by bad configuring.
Even if that is a true, it is not a computer how we expect to see it. As far as I understand it, HAL is a computing device,a huge programmable LEGO. You can make your own computer. :-)
It might be good for implementing a specific math algorithm (For example it should easily crack DES or RC5, btw why they don't show any real benchmarks, or any other speed intensive algorithms), but It is not going to work as general purpose computer (or at least speed would be MUCH MUCH lower than they declare)
Maybe the programmed the FPGAS to 2^16 x 4-bit adders running with 1MHz.
Makes 65 TeraFlops.
But what do you want to calculate with such a thing????
;-)
You know, all this means is that they have a way
...
of generalising the instruction set.
When you come down to it, if you have a RISC chip
programmed to emulate the instructions of a
programmable chip, since the RISC is much simpler
than an FPGA (and probably more durable) I
honestly don't see where the big saving in time
or space arrives.
Moreover, this will _still_ only work on problem
sets which are susceptible to parallelisation
techniques. If you have a fundamentally linear
problem, you can have as many execution units as
you want, with no speed advance whatsoever. Thus
their claim of perfect linearity in scalability
I take with a very large bucket of salt.
I can see a small advance in speed if you have
certain FPGA configurations set up as programming
libraries which can easily be referenced,
implemented and used on the fly, but then you
still have the delay in place of changing the
context/programming of the FPGA. Again, the question is the relative speed of changing
data in RAM for a RISC chip or changing the
configuration of an FPGA. This MIGHT mean a
saving in instruction code usage of RAM, but
I'm not so sure.
The part that bugs me most: It's a WHOLE NEW
PARADIGM! No, it's not. ENIAC was reconfigured
for different tasks. Hardware programming is
old hat. Automating it isn't a bad idea, but
I'd like to see less patenting and more peer
review. This guy _might_ be a genius, but he
sounds more like a backyard nutcase whose work
could stand a whole bundle of improvement. This
tiered, hierarchical setup sounds very rigid
Oh well. He's right. I'm wrong. I'll buy one in
a few years. Or maybe not.
It says it's fault-tolerant, but I wouldn't push it.
Neil Halelamien
FleaPlus(not logged on)
Yes! Just in time for Quake3: Arena test release next month! Hell, maybe this thing can pull over 20FPS in Tresspasser and Unreal.
I heard that it is built from ground-up Commodore 64s..
Lisp, Prolog, CLOS, what?
Their point-and-click language/gui/toaster-oven thingy sounds rather like lego mindstorms!
Reconfigurable conputing is a great idea, but this garbage web site makes it obvious they don't have the software. Any fool can put a bunch of Xilinx FPGA's in box.
It is not even april yet and these stories start to come out...
Eh EH!!!
... I really don't...
I think a supercomputer may exist in a configuration called "ESÇÃO". It was developed in 70's by a professor from USP (University of Sao Paulo - Brazil).
His book about that says that the system can run with or without clock and at the same delay time speed of an ROM.
Plenty of companies have built machines like this. Not to long ago, HP-Labs presented on an identical machine (a bunch of reconfigurable FPGAs) at the AI Lab. It's a really cool technology (blazing fast for many applications), but nothing new. Even back in high school, I remember hearing about people working on reconfigurable computers.
The main problem is programming these things. They're blazing fast for many tasks if they're properly configured (the HP machine did some imaging tasks in a few seconds that normally took hours), but getting it configured is a pain. I'd like to see this new "algorithmic modelling language" these guys have.
Another interesting technology was worked on at the MIT Media Lab a few years back. They stuck an FPGA on a normal PC, and had the PC reprogram it to do different special-purpose tasks. That sounds like it could actually be useful for end-users.
In the press release, they?ve got question marks.
It must be true.
A hoax hacker would have to be clever to
do stupid marketing mistakes.
Supercomputers like the crays and blue are shared by whole groups of people, at the same time, with great shared processing power capability. The way I read this you can get a single operation or group of operations to run well together for a single objective (and they quietly stressed that in the press release).
... but then any supercomputer or any decent computer for that matter might really make it look like the crap it is). The only thing this Supercomputer is good for it programming once (and subsequent redesign programming possibly) and put to a specific task...it would be great for a satellite (ok now whip out the laptop with viva on it and load the new code for the satellite, got it houston) it should have never been pitted against a truly generic and flexible raw power machine like blue or a cray.
So here is the common use...ok lets program it with viva to run my program. But wait johnny wants to run his new scrabble emulation too...hmmm ok shut it down and take some of my logic away and set it up for johnnys task, and so on (or you could program it to be a generic supercomputer
As far as the bullet, sure you could shoot it...as long as the bullet went between the edge two boards or down ones edge and not ripping down the center of all of them. And then you would again have to whip out viva to program around the lost boards...unless you happened to have programmed in a loss of processing power to begin with and made those redundant to another set of boards.
This looks desperately like a fake press release. "Like a human brain" anyone? It's barely literate, and the idea of using 250 of any chip, in a 4 cubic foot box, and getting apeed way ahead of Pacific Blue? Forget the CPUs, and forget the fact that FPGA is slower at most tasks. Think about how you can enough fast memory to be useful into a box that size. How you dissipate heat -- or do these superfast chips have about 50 gates each and draw about a milliwatt? Not if they're FPGA, they don't...
It aint fake! It's a real computer. The CPU manufacturers have been involved in a conspiricy to quash this technology because it makes them insignificant.
For years, IBM has had a demo of someone shooting one of the CPUs on their mainfraimes, and the system keeps chugging along. It's a very vivid demo of their machine's fault-tolerance. :)
Just what we've all been waiting for - a reconfigurable computer!!!!!!!!!!
It couldn't cause it don't exist is why
Very interesting view of this. As was said earlier:
1. $26 million is a lot to pay for a 4 cubic foot
box.
2. If you put that many 4 bit adders into the system, it may achieve the speeds of the Pacific
Blue. (If it did it in parallel pretty well).
3. $26 million is a lot to pay for a machine made
in a basement, even if it took 15 years to build.
Why can't IBM build it? They've already made several OO languages, Operating Systems, and Supercomputers, some of which have (some) programmable logic.
4. The payoff of the system is so vast that, even
with the business model of the company, there is
no way Star Bridge will ever make money off of it.
If there is this much of an improvement over the
previous systems, someone is bound to clone them,
Like Intel to IBM, Microsoft to Macintosh, GM to
Ford, etc...
And then the cloning company will become bigger,
because it can take a different approach.
I-ll go further, if there is no clone of this system, and soon, then we know it is junk.
-Coward
Must by lottery tickets... lots and lots of lottery tickets!!!! I want one, running linux! I'll sell my legs, I swear! Something tells me that if I had one of those I would definity win rc5! (I'm on the slashdot team anyway...)
on a serious note...YES! I hope this technology can get migrated to pc's like next week. Even if if my PC (Piece of Crap) only gets 1 TeraOP I'd be happy!
I did alittle research...
The company isn't listed anywhere, the numbers aren't listed either...
The people listed as part of the company aren't listed ('cept ones with common names).
None have posted to newsgroups recently.
The server is running on a redhat box for a VERY small web design firm which is VERY badly configured.
This has got to be fake...
The military will be all over them. I doubt
you will be able to contact them in a month.
last year. It sat on either vme or compact pci. The largest card that the vendor sold had like 15 fpgas on it.
seriously - put out your code as open source, and release your patents to the public domain. For your as well as everyone elses benefit.
Here's the link to this storym l
http://www.newscientist.com/ns/971115/features.ht
I think these claims are a little inflated.
Perhaps we should champion open-source press releases too. It's looking like someone is comparing apples to 747's.
Look at the "their" facts - they claim 10x the performance of the latest IBM SP system, 2400 times less power consumption, and at the size of a PC tower. A nice, steamy warm load.
Read up on Xilinx and FPGA chips and you'll believe. I hope this thing can do what they say. It's about time for an industry shakeup. The only thing unbelievable is the size of the case.
As people have already pointed out, this is obviously misleading. Even if thier number have any basis in fact (which seems doubtful) they give themselves away as over-inflated. (When was the last time you used a 4-bit add for anything? Let's talk about 64-bit multiplies, or floating point performance, or any recognizable benchmark from any standards organization.)
However, reconfigurable computing is a real technology. Metalithic Systems is a good example of a real company making money selling reconfigurable computing products which offer a significant price/performance advantage.
This is total Bull shit....
I talked to the VP. I had to explain to him what slashdot was and why his phone started ringing at 6 AM. He was not knowledgeable about the specifics of the product beyond "It's revolutionary and there's lots of patents." Could not specify the flavor of Unix it runs. These guys may have something, but they should've gotten some advice from SiliValley folks before shooting off their mouths. We'll see what the LINPack numbers look like, I guess. Opensmut. Teats for geeks. Nudes for nerds.
Bust out RC5DES. Should speed through 64bit keys easily enough. :)
A search at NIC and nslookup show that
"Star Bridge Systems" and "Whatever Web Design" share their web server, which is mantained by
somebody with email account at another site.
Does this tell us something?
"Star Bridge Systems", the super computer maker,
and "Whatever Web Design" share their web server, which is mantained by
somebody with email account at another site.
Does this tell us something?
This guy claims he built his own FPGA, 17 years
ago, at age 16? Where'd he do this, in the
silcon foundry he build in his parent's
basement?
I think this is Steve Job's newest company. Either that or these guys got some of Steve's "Reality Distortion Field" pills and almost OD'd.
Looks fishy.
...)
They reformatted the press releases in HTML,
but left ?'s.
Some ?'s are even BOLD.
When I do view source, I dont see some
strange char where the ?'s were(like =92
I just see ?'s.
Its fake.
First of all I'd just to say that if you really want to do accurate benchmarking of a super computer you should do some computations that are a little higher caliber that an add function. It probably did the addition in one clock cycle. You need something that sustains the computation to get a better idea of what it can do. I wonder how fast the IBM Blue Pacific could do a 4 or 16 bit add. Pretty fast I bet. I wonder how this other so called super computer would perform with a sustained compute intensive 3D nuclear blast simulation. Probably not so good.
I'd just like to set the record straight by saying that IBM only uses the same Power PC chips as the Macintrashes for the really low end RS/6Ks. They aren't hardly even in the processor roadmap any more. They released a LOW end workstation last fall with a 604 but all of the good new ones use either the 64-bit POWER3 630+ designed in Austin, TX (the big bad brother of the Deep Blue chess playing processor). Or for the commercial RS/6K servers,like the S70, they use a processor designed in Rochester, MN (YES, a Minnesota microprocessor) externally called the RS64-II which is also used in AS/400s and is also 64-bit. They are all based on the Power PC architecture but, you can't stick a POWER3 or RS64-II in a Macintrash. The Blue Pacific is built from 512 RS/6000 SP nodes each with sever POWER3 processors, not PowerPC 604s like the press release said.
So, please, when you here about IBM and PowerPC do not automatically assume PowerPC 604 or PowerPC 750. Although these are great processors, we do make much better processors than those.
I recognized the processors that Star Bridge Systems used - the Xilinx processor - as the same type of processors that researchers used in an article in Discover magazine, Volume 19 No. 6 (june 1998) in their article 'Evolving a Conscious Machine'....
I think this might be just one of the many possible manifestations of the capacity of the FPGA chips. Maybe we need some 'open-hardware' guys to investigate this hardware more closely.
:)
First of all I'd just to say that if you really want to do accurate benchmarking of a super computer you should do some computations that are a little higher caliber that an add function. It probably did the addition in one clock cycle. You need something that sustains the computation to get a better idea of what it can do. I wonder how fast the IBM Blue Pacific could do a 4 or 16 bit add. Pretty fast I bet. I wonder how this other so called super computer would perform with a sustained compute intensive 3D nuclear blast simulation. Probably not so good.
I'd just like to set the record straight by saying that IBM only uses the same Power PC chips as the Macintrashes for the really low end RS/6Ks. They aren't hardly even in the processor roadmap any more. They released a LOW end workstation last fall with a 604 but all of the good new ones use either the 64-bit POWER3 630+ designed in Austin, TX (the big bad brother of the Deep Blue chess playing processor). Or for the commercial RS/6K servers,like the S70 server, they use a processor designed in Rochester, MN (YES, a Minnesota microprocessor) externally called the RS64-II which is also used in AS/400s and is also 64-bit. They are all based on the Power PC architecture but, you can't stick a POWER3 or RS64-II in a Macintrash. The Blue Pacific is built from 512 RS/6000 SP nodes each with POWER3 processors, not PowerPC 604s like the press release said.
So, please, when you here about IBM and PowerPC do not automatically assume PowerPC 604 or PowerPC 750. Although these are great processors, we do make much better processors than those.
I bet his next step it to start soliciting investment capital. The news stories will be used to "legitimize" the thing ("See! It was even on the news!"). I doubt anything more than a new BMW and maybe a nice house will come of it.
Metalithic is a good example of a company that went under.
Kent founded Metalithic, their products ("Digital Wings" or something) were hot, for a couple monthes, then poof.
they claim that it is the fastest supercomputer, and it performs 12.48 teraflops. Now, cray's newest tops out at over 100 teraflops. If that's untrue I wonder what else is! I think it's all bull@#$% made to fool people into forking over money or something!
Yeah, buy a $26 million computer that can emulate anything and then I can play all those N64 romz for free. Such a deal!
I almost didn't believe it until I heard
they had a washed up TV actor working
for them.
Can't wait for the infomercial.
"What? You mean it can do 2.3 trillion operations
per second?"
"Thats right Jill! Just think, no more waiting
to find your favorite recipe. And, if you
order now, you get this mouse pad!"
If the company doesn't know how to spell scalar, what are the chances they can have the best scalar computer in the world?
And more important, why are we falling for it?
They compare 4-bit adder operations of their system with supercomputer operations (which
really are a lot more complex than that!).
4 bit operations can be done within a single CLB of a Xilinx FPGA, hence those operations are the fastest. If you count the theoretical maximum amount of simultaneous 4-bit operations that you can on 280 FPGA's, you could probably get the high number that they claim... However, there is a however...
However, there is no practical application that uses only 4-bit adders, and nothing else... The real-life bottleneks will reduce the signal processing speed that is achieved significantly. Heck, just taking account of the routing delay between the adders already significantly reduces the speed (and then you're not even considering I/O, which is a really big factor with such amounts of coupled FPGA's, RAMs, and hard-drives).
My rough guess (finger in the air) is that, when programmed optimally, and when they've used the newest and fastest FPGA's from Xilinx (which they haven't), this machine will perform in the 300-500 GOPS range in real life if they are lucky.
Any FPGA specialist will confirm that the theoretical maximum amount of "billions of 4-bit additions" is not a reliable real-life measure for comparing FPGA's to supercomputer GOPSs... Let them do the Linpack first (see www.top500.org), then we'll talk performance.
The misinformation (lie?) being cleared up, it shines a whole new light on this so-called breakthrough... They probably just wanted a line of clueless venture capitalists or other investors at their doorstep...
(hmm, this makes me think of the Dilbert cartoon from a couple of weeks ago, where this guy has put a ponytail in his hair and just saying 'E-commerce' makes the clueless venture capitalists gurgle)
Jelle.
As they say, bzzzt, thanks for playing:
. table.html
Have a look at the following page:
http://www.llnl.gov/asci/platforms/bluepac/blue
and you'll see
332 MHz PowerPC and 66 MHz Power2
processors.
Power3 is down the road.
As they say, bzzzt, thanks for playing:
. table.html
Have a look at the following page:
http://www.llnl.gov/asci/platforms/bluepac/blue
and you'll see
332 MHz PowerPC and 66 MHz Power2
processors.
Power3 is down the road.
>This is NOT a low end machine.
Well, this statement is subject to debate.
(Especially compared to the T3E that they used
to use)
Well that statment sure is subject to debate.
(especially when you compare it to the T3E that
Minnesota used to run on.)
(That sp system has those slow 604s, with only
one FLOP per clock -- plus that legendary
slow, high-latency sp switch network!)
Utah = Religous Fanatics = Good Preachers = Excellent Persuasionest = Easy to sham people = Larry is being taken for a ride
In November 1998, SBS secured an agreement from Xilinx Corporation for the donation of FPGA chips with a retail value of $100,000 to SBS for the manufacture of the first group of Hypercomputer systems for commercial leasing. These chips have begun arriving and assembly of Hypercomputer systems is underway.
Note: "Have begun arriving and assembly of Hypercomputer systems is underway."
Have begun arriving. So they haven't actually built this thing yet.
Ahem... One of the people Gilson I think was involved with Metalitic system....
WIRED had an excellent article on the ongoing attempts of cold fusion by (a part of) the scientific community. They are pretty much outcasts after the "big hoax" of cold fusion a while back, but cold fusion is NOT without merit. I can't remember what issue it was, I'm sure someone else does :) It's quite a good read.
ok so maybe the UofM supercomputer uses 604e processors. that doesn't surprise me since the POWER3 only came out last october:
s /1998/Oct/power3.html
8 /dblue/asci.html
n dex.html
http://www.rs6000.ibm.com/resource/pressrelease
Along with this came 3 new RS/6K systems. On the low end: A 604e workstation the 43P-140(i think)
In the middle: a power3 based graphics workstation, the 43P-260 (they say this is their highest performing graphics workstation). I got the chance to play Quake2 on it. Not bad.
And on the server side: an S70 with up to 12 multithreaded RS64-II processors
As for the ASCI Blue Pacific here is one link that has a really easy to read chart.
http://www.rs6000.ibm.com/resource/features/199
it states:
Blue Pacific
*512-way system
*POWER3 SMP nodes
*3.2 TFLOPS
*2.5 TB memory
*75 TB disk
The lawrence livermore sites chart does say 604e processors but, the site also has references to the POWER3. I've seen several IBM pages that say it has POWER3 chips and none that mention the 604e. So I guess you either believe the people that own the machine or the people that built it. Since I work at IBM in the AS4D/RS6K division I tend to believe them. Who knows though, they might have had to put 604e's in for some reason at the last minute. A press release in Oct. 1997 says that they planned on the POWER3. I don't know. I haven't actually seen it. I just know that the POWER3 is so much more of a processor than the 604e.
http://www.chips.ibm.com/news/power3.html
http://www.rs6000.ibm.com/hardware/largescale/i
That's it and that's all.
> Lisp, Prolog, CLOS, what?
The world is still too stupid to use languages as advanced as Common Lisp and it's object system, CLOS. Maybe in 10-15 years, when people get tired of writing the same old stupid GUI and web apps and want true intelligence and usability will they start to use such languages.
After the 80s AI hype and investment failures, noone is doing AI right now. But the time for Lisp will come again.
For now, there's Java[TM].
I don't suppose they run a conventional OS. But does it run any OS at all? Can they use it as a general purpose supercomputer?
Here is the home page of BYU's RC stuff. I don't know about HAL, but this stuff is valid.
http://splish.ee.byu.edu
Xilinx canned the XC6200 family a while back.
The guys who worked on it (previously from Algotronix in Scotland, I believe) have left Xilinx to form their own consulting company.
Stop dissing CF, you useless mole, TOYOTA has bought those guys and is continuing its funding!!
The day Toyota release a car that doesnt need
fuel as such is the day Ford/GM die,.
I would say that a supermodel and a construction worker standing next to each other would totally invalidate your statement.
No need.. they are linearly scaleable so 4 machines become one without the latency or overhead incurred by beowulf... at least till you hit the 256 limit they mention, but by then you are at 1/2 petaflop and out $700 million... so 4 machines would be rather cost restrictive.
I believe Xilinx has pretty much wrapped up development on the XC6200's... A pity as it was a nice architecture to play with. You can still get XC6200 boards from Virtual Computer Corp. There are even linux tools and drivers for working with VCC style 6200 boards (check it out here).
How did they come up with the $26M number?
It does seem a little outrageous for what amounts to a shoebox full of Xilinx chips? I bet they said let's charge a 1/3 of what a Cray does and all we have to do is sell one and we're rich!
And the CTO might be an old computer whiz kid, but come'on, I learned a hell of a lot in college. And it is obvious to me after reading some pages on their website that the CTO knows absolutely nothing about computational physics or computer language theory, both of which I think is important for this company to succeed. The Starbridge pages throw around words like hueristics, ai, cellular automata, and object oriented design, but the words seem hollow with nothing to back them up. They are just trying to impress those less educated than themselves.
And 4 / 16 bit adders? Come'on, ya!, guess what happens to their performance when you turn those adder into 32 bit mults? How does the system scale then?
This is what I think Xilinx should do:
* make an ultra low cost PCI card packed full of Xilinx FPGA chips and a SDRAM socket and some high speed ADC/DACs or some other fast IO plug.
* release the driver for this card GPL.
* get the Linux/educational community to develop some really kick ass GPL software and languages for this card.
The world of "re-wiring" chips will take off, it will truely be a revolution, and Xilinx will make billions selling chips. Watch out Intel.
From the Utah News...
'This once unheard-of company expects to be "heard of" this week, now that it has unveiled Hal for all to see. But its address is a secret, for security reasons.
When you have a computer that's worth more than its weight in solid gold, you lock it up tight, every night.'
From Whois query on starbridgesystems.com...
Registrant:
Circa 65 (STARBRIDGESYSTEMS-DOM)
208 1/2 25th Street
Ogden, UT 84401
US
Domain Name: STARBRIDGESYSTEMS.COM
Administrative Contact, Technical Contact, Zone Contact:
Light, Doug (DL8191) dlight@LGCY.COM
(801)994-7337 (FAX) (801)994-7338
Billing Contact:
Gleason, Matt (MG11172) MGLEASON@CIRCA65.COM
(801)392-2600 (FAX) (801)392-6350
Record last updated on 17-Jan-99.
Database last updated on 9-Feb-99 15:17:13 EST.
Domain servers in listed order:
NS1.WHATEVERWEB.COM 209.160.196.62
NS2.WHATEVERWEB.COM 209.160.196.59
Try looking where the company is located
s/benefit/amusement
:)
it's either and early April 1st joke or we have a new computing science. I hope it's the latter. :/
Codifex Maximus ~ In search of... a shorter sig.
it's either an early April 1st joke or we have a new computing science. I hope it's the latter. :/
Codifex Maximus ~ In search of... a shorter sig.
Posted by Buffy the Overflow Slayer:
But does it run Win 98?
Posted by Parcells:
I'll take two please. Is this for real or is it an April Fools joke two months early?
Posted by His name cannot be spoken:
Hey, I have an interesting idea!
Lets grab one, load on that crypto software that the girl in Ireland wrote, and toss on that mystical compression that compresses files into 256 bytes( from waaaay back.. ) and add to that the secret of how to get the caramel into the caramilk bar.
Sure bet the aliens will come back and give us the keys to the pyramids, so we can find out what the fsck the 11 herbs and spices are in Kentucky fried chickens receipe!
Sheeesh!
Posted by twi:
> BTW, if you find a metalanguage with all possible tasks you could do on a processor, let me know.
What about turing-machines ? At least if you mean processor in our traditional sense.
Posted by twi:
:) ;)
Although I know next to nothing about this stuff and although what they say sounds a lot like a hoax, the principle strikes me as a typical case of "why did I never think about that". I instantly liked it
Sure, a "C++ to FPGA"-compiler would be a bit too complex to imagine, but if you find the means to
create good circuits from an algorithm-description, why not ?
And as for the speed-increase, think about a simple AND-operation. To do it on a conventional machine you load the instruction, decode it and execute it. Although that may run in on "cycle" it surely involves a lot of gate-switches. Hardcoding this AND on the FPGA takes the time of.. well, an AND. The time needed for one gate (or array, for register-AND) to calculate this operation is all it takes. It's not hard to believe that this is many times faster, even if the FPGA in itself is not as fast as a custom made "real" chip.
Hardware is always faster than software. 3D-grafics-chips do exist for a reason, don't they ?
And stuff like i/o-bandwith or context-switching might not be that important for a "supercomputer" which will probably not be targeted as your average multitasking-unix-box, even if it could fit on the desktop.
Being reprogrammable "only" 1000 times a second also is no problem at all, because you can leave one part of it running as a general-purpose-cpu all the time. Slow reprogramming is not a loss for its slowness, but a win for its reprogrammability.
Posted by pudi:
I don't suppose they run a conventional OS. But does it run any OS at all? Can it be used as a general purpose supercomputer? It sounds like a super-calculator to me.
Interesting how they compare 16 bit addition (for their system) to IEEE floating point on a Cray. Also of note, 50ns main memory? SDRAMS are faster than that.
As to their comparison of computing on their system vs another supercomputer, Most analysts don't re-build the computer to do a program run.
There are some interesting ideas there, but I'll bet that real world benchmarking won't look nearly as good as their estimates.
Enquire within. :)
My warning bells started clanging at this point:
6. Superspecificity is also achieved by SBS through advanced artificial intelligence algorithms and techniques such as recursion, cellular autonoma, heuristics and genetic algorithms, which are incorporated into a single system which naturally selects the most efficient library element for achieving maximum specificity.
Buzzword alert! Buzzword alert! He forgot "neural nets" though. I'm sure they're in there.
7. Higher orders of specificity are also possible because SBS's Hypercomputer system is self-recursive. It uses its own algorithms to evolve itself. The system is capable not only of producing systems that are more simple than itself, it is also capable of producing systems that are more complex than itself.
Cool, they've hit that holy grail of science fiction, the self evolving computer. All you have to do now is build a pair of robotic arms for it and it will build itself into a gigantic Übercomputer and take over the universe.
Oh, and my favourite part:
9. Because the Viva software system includes a formally accurate method for achieving an optimal solution to a problem, the layering of those optimal solutions is also optimal....
It looks like they've solved that nasty "computer science" problem we've all been working on! No more slaving over algorithm design! Just type in the problem (in English I assume) and this thing will solve it optimally.
Sun already has boxes that approach those speeds and shortly will be beyond that. And you can shoot a bullet through an e10000 as long as you don't hit anything vitally important (like going through all the power supplies for instance) and it will still run. Not so very different from this 'discovery'.
Still, interesting.
...Steve
Show me a LINPACK 1000x1000 or SPECfp95 benchmark and I'll *think* about considering this thing a supercomputer. Till then it's just hype.
I wonder which Cray they're comparing it to. There's more than one, after all. They're probably comparing to something slow like a Y/MP or a J90. They might look stupid if they compared to a T90 or SV1...
--Troy
"My life's work has been to prompt others... and be forgotten." --Cyrano de Bergerac
The Cray T3E #1024
per their about us page
Well, that tells me a little more... but not much. There are 3 different models of that particular machine, depending on whether it uses 300, 450, or 600MHz Alphas. Based on the 1 TFLOP number they quote, I'm guessing they mean the model with the 600MHz chips (the T3E-1200E/1088).
I liked the following little piece of idiocy from SBS's "About us" page:
The Cray machine, which costs approximately $76 million, can perform at a peak speed of one trillion instructions per second in a narrow class of applications. It cannot sustain performance at peak speed.
Well, duh!!! Of course it can't sustain peak! There's no machine in the world that can sustain more than about 50% of peak performance on useful, real world code; usually that number's closer to 25-30% of peak. Unless SBS knows something serious about compiler technology that the rest of us haven't figured out yet, sustaining a system's peak performance is impossible.
Their 12 teraop number is very suspicious, too. They define an "op" as a 4-bit integer add. The ops they quote on the T3E are 64-bit floating-point adds and multiplies. Apples and apples? I don't think so. There aren't too many interesting problems you can do with 4-bit integers, either; maybe extremely lossy signal processing, but that's about it.
I also noticed that SBS's press release page has been taken down some time in the last day or so... I'd love to believe these guys have some kind of breakthrough, but from everything I've seen they're either extremely naive or lying out their collective butts.
"My life's work has been to prompt others... and be forgotten." --Cyrano de Bergerac
It may be fast, but can it crack RC5? Just imagine that machine on team slashdot!
----------
Clinton made me a Republican. Bush made me a Libertarian. Trump is making me question reality.
Even ultra-secretive Transmeta had to get some patents and some recruiting, and that got some attention. How did this big a breakthrough happen in such secrecy?
I truly hope it's for real. I want to believe. But why is my baloney detector ringing?
Let's hope my detector is faulty, shall we?
--
The real Paul Vallee is slashdot userid 2192, and, what do you mean it's not cool to point out your low userid?
Look carefully (and subjectively, how rarely that happens) at the performance specifications. The IBM Pacific Blue did 1.2 TeraOps sustained peak running the actual ASCI codes (albeit in their own labs, SGI beat those numbers and did it on site). The SBS HAL-4rW1 did 12.8 TeraOPs doing a sequence of 4 bit additions, or 3.8 TeraOPs on a 16 bit adder.
This means that the memory and I/O subsystems aren't even exercised. Nobody uses a 4 bit addition as a performance spec, not even Intel.
The actual product description is unbelievable as well. The largest Xilinx FPGA's might be capable of being configured to fully emulate a 16 bit microprocessor. I haven't worked with them in a long time but when I worked with the 4000 series I figured I could shoehorn a rudimentary 8 bit processor into the largest devices. (which would mean that a rudimentary 8 bit microprocessor was produced for over one thousand dollars incidently. It's a bit cheaper to buy a PIC from MicroChip)
They said that they reached these performace levels with 280 of the largest Xilinx FPGA's. My take on what they've done is cram as many 4 bit adders onto a single FPGA and replicate it 280 times. They then had them all execute in parallel and pretended that this made up a supercomputer.
Keep in mind that performance on an FPGA isn't stunning. We're talking on the order of 10 nanoseconds to do the 4 bit addition.
So... if they've even designed and built this thing (which I doubt) the specifications are a complete fabrication.
I haven't checked yet, but browse through Xilinx's web site. If they don't mention this wonder of reconfigurable computing then it doesn't exist.
For those of who don't know what an FPGA is, they are chips that can be dynamically reconfigured to do a different purpose many times a second. A nice example that I once saw was a video deocding chip. It was a simple chip that reprogrammed itself several times for each frame. First to get the frame, second to decode the frame, third to display the frame, fourth to decode the sound, fifth to play the sound. And most of the stuff was done entirely in hardware. Becuase the fact that most of the decoding was hardware, it was extremely fast for the clock rate.
This could be something along those lines. However, I must admit that I'm a little bit skeptical.
My Slashdot account is old enough to drink...
for a moment that this is real, and this box can
run linux. Then imagine enough of them to take
up the space of ibm's box, all beowulf'd together.... BWHAHAHAHAHAH!
I wanna get 4 of these babys and set up a Beowolf cluster... then we need to port some games... :)
Just asking...
Is it just me or did we jump forward a few months to April... I see it is actually a time machine it is so fast that it has actually jumped back in time from April 1st to now...
Of all the things I miss
The whole thing is written in microsoft word and then "save as html"ed. THe author is clueless enough to belive microsofts claim that word supports HTML. It doesn't. You will notice that his numbered lists, have all the points as "1." and his tables don't work either.
---- Backwards compatible -- If it's not backwards it's not compatible
I can understand how, if you were able to determine what you wanted out of your FPGAs fast enough, you could build a VERY fast machine. My problems are:
1) How the heck is he reloading the FPGAs fast enough to be all that hot? I've not worked with Xilinx parts lately, but the Altera (one of Xilinx's competitors in the FPGA market) stuff I have used takes many milliseconds to reload. Mabey this is a feature of the Xilinx architecture, but that leads to my second problem:
2) How the heck did he get enough information out of Xilinx to write his own compiler? Again, I've never tried, but when I asked Altera for information about the internal structure of their parts, I was told that was proprietary. Since the structure of the chips is the thing these companies are trading on, they are usually pretty closed mouth about this sort of thing.
3) Why isn't there an announcement on the Xilinx web site? If I were Xilinx and someone used my gear to beat Pacific Blue, I'd be shouting it from the rooftops, and trying to drum up buisness with it.
I wonder if they are busy signing up investors as we type?
Michael Kohne
mhkohne@discordia.org
A thousand pounds of wood moving at 300 feet per minute. Don't get in the way.
http://www.patents.i bm.com/details?pn=US05600845__&language=en
->www.chuma.org, ranting and Newtons, what more could you want?
err, Gilson :-)
Did you mount a military-grade, variable-focus MASER on an unlicensed artificial intelligence?
They spelled scalar wrong:
In addition to all of the tasks traditionally performed by supercomputers, SBS's Hypercomputer systems can perform the full range of functions requiring ultra-fast scaler processing, such as...
There, you anti-spelling flamers, is a great example of how spelling _matters_. The BS meter
goes off even louder when you can't spell your wild claims about your invention.
If it does run Windows 98, it will crash 60,000 times faster :)
Kythe
(Remove "x"'s from
Kythe
When am I going to see a Quake 2 timedemo on this thing?
...and call it "Take it with a grain of" Salt Lake City?
They do have an economy model for only 2 million. Maybe one of the AC's who's as rich as he are brilliant will put one on their AMEX card and report back to us on how well it works. Be the first one on your block. Operators are standing by.
(I've still got the articles on building that RCA computer around here somewhere, BTW, but I was strictly into analog back then).
I see even classic Slashdot is now pretty much unusable on dial up anymore.
...and call it "Take it with a grain of" Salt Lake City?
They do have an economy model for only 2 million. Maybe one of the AC's who're as rich as they are brilliant will put one on their AMEX card and report back to us on how well it works. Be the first one on your block. Operators are standing by.
(I've still got the articles on building that RCA computer around here somewhere, BTW, but I was strictly into analog back then).
I see even classic Slashdot is now pretty much unusable on dial up anymore.
Its not physically possible to reconfigure a Xilinx fpga 1000 times a second. The only ones that come close are low-end 3000 series, which are both hard to come by and not all that usefull due to their small size. A 4000 series FPGA takes on the order of 50ms to reprogram. Which means it could be reprogrammed at most 20 times a second. With 250 fpga's, you could easily get 1000 *total* reprogrammings a second, but there's no reason for a 1ms timeslice on reprogramming then.
But even then, this all assumes that you have the bitstreams already available to download to the fpga. Dynamically creating them is not too simple - just calculating the routing can take hours on a p2-300. So that means you have to have a pre-compiled set of bitstreams, which could be reconfigurable to a lesser extent (swapping pieces out and in) - but if you have that, why not make a bunch of ASICS that do what those precompiled bitstreams do?
Not that reconfigurable hardware isn't a neat and exciting paradigm, but these claims are so much cow feces (for now, at least).
The enemies of Democracy are
Who cares? Does it run Linux? :-)
Buried in the article it says it can run NT or Unix. Ok, so maybe they've got some sort of intel or alpha cpu buried in there for controlling all the fancy reconfigurable processes.
But they expect us to believe they've designed radically new hardware as well as a brand new fancy programming environment which runs on multiple platforms in the short life of their startup, and it was all done by 1 guy?
Ok. Sure.
Think what he could do if started hacking linux.
Wahey! I've been waiting for significant developments in reconfigurable computing with FPGAs - these are great chips...
"There are two major products that come out of Berkeley: LSD and UNIX. We don't believe this to be a coincidence."
They are announcing this so-called hyper computer, and they don't even have any patents on it.
This is transparent nonsense. The only hint of legitimacy derives from the fact that they scammed a couple of Mormon newspapers and TV stations into buying it.
Nice little fantasy though.
\
Pigs prepped and ready to fly sir....
Gentlemen, start your penguins
Doesn't everyone and his dog recall the news stories over the last few months about the HP researchers building huge reconfigurable arrays of FPGA's and getting stonking performance out of them even when there were high numbers of defunt chips in the mix?
There's also at least one company producing circuit simulation platforms hundreds/thousands of times faster than pure software simulation platforms, for the IC design industry.
What marks these guys out is that they can write hype with the very best Microsofties.
Heck what do I know, they might be the same guys after some marketing courses.
...an Englishman in London.
Sure, they wrote an ASIC for doing a 4-bit adder and programmed it into a small legion of FPGA chips... that's the way a machine of this architecture operates. If you want to do satelite communications you load in an asic designed to do satelite comunications. If you're also doing text to speech conversions, then you swap in a text to speech asic... It's a parayne shift in computing. You reprogram your FPGA chip to do different tasks on an as-needed basis...
Looks like the perfect 3D accelerator... (-:
Got time? Spend some of it coding or testing
I'm not sure I want to know about your baloney detector.
this sounds like a very bad april fools joke... can't be true, can it? i'd like to hear from somebody who has really seen the thing WORK with his own eyes.
sorry, VERY hard to believe....
This article http://www.newscientist.com/ns/990109/newsstory1.h tml
describes a similar machine where each FPGA simulates a bunch of neurons and cycles through 300 bunches a second giving an effective neural net of 40 million neurons! They are trying to get it to control a robot kitten in an intelligent way.
April Fools Day is in APRIL.
The owner of this domain is probably peeing his pants laughing, the domain registration money and site design time well spent.
I've finally had it: until slashdot gets article moderation, I am not coming back.
Abstract:
An integrated circuit computing device is comprised of a dynamically configurable Field Programmable Gate Array (FPGA). This gate array is configured to implement a RISC processor and a Reconfigurable Instruction Execution Unit. Since the FPGA can be dynamically reconfigured, the Reconfigurable Instruction Execution Unit can be dynamically changed to implement complex operations in hardware rather than in time-consuming software routines. This feature allows the computing device to operate at speeds that are orders of magnitude greater than traditional RISC or CISC counterparts. In addition, the programmability of the computing device makes it very flexible and hence, ideally suited to handle a large number of very complex and different applications.
But can you protect the OSes from each other?
I love my computer -- You make me feel alright (Bad Religion)
The company's stock is not for sale. Damn, get me in on the IPO.
--weenie NT4 user: bite me!
"Computers are nothing but a perfect illusion of order" -- Iggy Pop
Hmm, sounds just right for an informercial, I wonder if it fits under the bed...
-- To dream a dream is grand, but to live it is divine. -- Leto ][
The real trick in systems like this is getting the advertised performance out of them. Yes, if you managed to pack those FPGAs to their theoretical maximum with multipliers, run them at their theoretical maximum clock rate, and do ABSOLUTELY NO COMMUNICATION, you might beat IBM's blue supercomputer. Maybe.
But you don't EVER get real-world performance like that, for several reasons. One, you have a very complex piece of software that "compiles" the program for that sea of FPGAs, and your utilization is only as good as that software (and complex doesn't begin to describe it). Second, once you introduce communication into your computational model, everything goes to hell. You have to include room to route data (and hence "wires") between the chips, and that just eats up everything.
Just for the record, I contracted for a company that built a virtually identical box, used for chip emulation. It had ~300 Xilinx chips, and had a VHDL->Xilinx compiler and router. You COULD run Win95 AND DOOM at a clock rate of about 1000 HZ (i.e. VERY SLOW). But companies bought them. The price was about $750k to $1M, and that included a BIG profit margin. This thing is way overpriced. If you need more convincing of that, look up how much the EFF built Deep Crack for, and that was a one-of-a-kind box.
In fact, without going into details, the company is a competitor of Quickturn, and they did indeed get 1000Hz emulating a Pentium (that would be a VANILLA pentium, of course, not a MMX or P-II). It played Doom veeeeerrryyyyy sloooooowwwllly :-)
It's not that I don't think they have a germ of a good idea, but this has got to be a public relations ploy---I've seen too many start-ups "steered" by an "idea man" without clue one and drive what could have been great technology into the ground because of just such outlandish claims.
korc
IMHO this is just a bullshitty-buzzword-filled article.... :)
You try to give everything to everyone, and you end up giving nothing - e.g. WinNT/9x...
And besides - who spends 15 years working in the very low level processor design field, and ends up with a *tremendous* break through in the OOP products (as they claim in their release)
Flame On!
Ok, this super-computer-FPGA things looks like a stupid PR thing, but don't write stupid things about nanotechnology.
:-)
lead and gold are different atoms so nanotechnology (building object by assembling precisely atoms) can't help here.
But diamond is another story
The largest FPGA that I've heard of had a million gates on it. Pick-your-random-processor has 10-20 million transistors, giving it a high single-digit equivalent number of gates. Implementing anything with FPGAs will take up several times more space than using a custom chip.
This means that you will have a _big_ supercomputer.
While FPGAs are reconfigurable and hence very flexible, the implementations that they come up with for a given logic configuration aren't optimal. This, combined with the performance overhead incurred by the components that make it configurable, mean that an FPGA with a given logic pattern burned into it will be slower than an equivalent, optimized logic pattern implemented in CMOS.
This is another important point - CMOS. While the machine on your desk may use CMOS or might add BiCMOS in there for a speed boost, supercomputers and servers have significant amounts of ECL circuitry in them to speed up critical logic paths. ECL technology is based on bipolar transistors, which switch much more quickly than the MOSFETs used in CMOS but generate far more heat. Used sparingly with aggressive cooling, they can double the performance of a chip or more. This leaves CMOS chips in the dust, and by extension anything built with an FPGA.
If you're shelling out the money for a supercomputer, then you have a good idea of the classes of problem that you're going to be running on it. This lets you choose the type of processor and interconnection architecture that you use so that it matches the problems that you plan to be running. If necessary, you design a custom ASIC for even better performance (as was done with Deep Crack). A reconfigurable architecture that was magically as fast as hybrid ECL/CMOS still wouldn't get you much of a performance boost, because you're already fairly close to an optimum hardware implementation. With modern processors, this is expecially true, because the on-chip scheduling and pipelining is good enough to keep most of the chip busy if the problem even approximately matches the chip's logic capabilities.
There was much mention in the article about using processors that were tightly coupled. They'd need to be, to share logical functions with each other. However, this is extremely difficult to accomplish even with conventional processors. The communications traffic goes up with the clock speed and as the square of the number of processors (until it saturates the processors, at which point it goes up linearly). Processors have enough trouble communicating with other chips as it is; this is why new memory architectures are coming out. Asking n=lots processors to communicate tightly with each other and with memory in a reconfigurable manner is asking for a motherboard that can't be built. In practice, you'll wind up implementing either an n-cube architecture that allows fast communication but limits connectivity, an anywhere-to-anywhere mesh that has wonderful connectivity but seriously limits the amount of traffic that can be supported, or a hierarchial system using one or both of the above. The system as described just won't work.
It's hard enough to optimize well with hardware that doesn't change. Figuring out the best way to implement an algorithm using both hardware and software feels like an intrinsically hard problem. Your compiler will have to try to solve this. IMO this will result in either a compiler that requires the user to explicitly state what they want done in hardware, or else a compiler that tries to optimize but does it badly, or else a compiler that is never finished.
In summary, I think that there are a number of issues that the writer of the article was not aware of. I hope that the designers of the system took them into account, because otherwise this will be a neat-sounding project that disappears once the investors realize that there isn't going to be a product.
I think that if we could compile Linux into the native code, a computer would finally be worthy of running it.
Here's Xilinx's Virtex FPGA chip.
Nine devices, from 50,000 to 1,000,000
system gates (1,728 to 27,648 Logic
Cells)
Over 500 user I/O pins
Many package options, including leading
edge 1.0mm FinePitch ball grid arrays
and 0.8mm chip scale packages
Leading edge 2.5-Volt, 0.22 micron, five
layer metal CMOS process
Fully 5-Volt tolerant I/Os
Timing-driven place and route tools allow
compile times of 200,000 gates per hour
(400 MHz Pentium II CPU)
Vector-based interconnect for fast,
predictable, core-friendly routing across all densities
Fully 64 bit/66 MHz PCI and Compact
PCI compliant
Okay, so say they take 280 of these at the 1 million gate density = 280,000,000 gates. Currently, the Pentium II has 7.5 million transistors (probable 1.875M approximate logic gates)(http://www.zdnet.co.uk/news/1998/3 6/ns-5490.html)
Just raw silicon. Lets say they had a bunch of pre-compiled circuits, then there wouldn't be any lag in switching as they say. (I must admit that 1,000 switches per second would be a little overblown.
But - lets just say for equivilance, that we had 149 Pentium II's connected PARALLEL (Which is currently impossible. I think that LLNL uses PPro's currently at 2 chip SMP.) Such a system WOULD kill a cray. But the Pentium can't do that.
Everyone who has read the Beowulf papers know that the overall speed of the system is entirly dependant on the lag of the interconnect between systems. So, for fun let say we could put 18 chips on a board, and put 20 boards on a 128 bit local bus. That would lead to some damn fast computing. (Remember Deep Crack on the last RSA contest? It only ran at a system speed of 80 MHz?)
I believe they are at least on to it.
I said no... but I missed and it came out yes.
There is no way these guys are for real. First off there are already comapanies that are currently working on this technology, what makes them any smarter and knowledgeable than the next person. In addition, there is only mention of two people involved in this project only one with any sort of electrical engineering expertise. I highly doubt that they have a functional product. After visiting the web site it becomes very apparent that this organization is not one which is extremely professional(take a look at the press release). i am quite skeptical of any and all claims which these people have made. but hey, i hope i am wrong, this thing would kick a**.
Zebra X
Speed is great but it looks like you'll run out of memory and/or disk space before a real simulation gets finished running.
I don't know... Like most revolutionary advancements in technology, it seems to have been developed by two different people simultaneously. One, a huge company, the other, a freaking genius who has been building them since he was 16. If it turns out to be baloney, then so be it. But stranger things have happened before.
;)
This definitely sheds light on what Transmeta has been up to, however, and why Linus is working for them.
Actually, this seems like a quite elegant solution to the FPGA re-configuring problem to me. The paragraph about how their Viva software determines many times a second whether each function would be best done in hardware or software, and reconfigures the FPGA appropriately, sounds rather elegant to me. I did some work with FPGA's once, and was limited to "booting" the processor from a PROM and executing silly little instructions; with this sucker, you could specify a metalanguage with ALL the possible tasks you could throw at the processor, and have the processor make its own instructions to execute whatever subset of the language that was needed to execute! Any additional power could be tossed in there by creating additional parallel instruction units to execute the most frequently executed instructions... the possibilities are mind-boggling.
Of course, there is a limit to how many things you can throw at the system at one time; The ridiculously high benchmark was for a 4-bit adder; of COURSE a bunch of special-purpose parallel chips that did nothing but 4-bit ADDs would be able to outperform a cray with the speed and power reductions mentioned. But I'm betting flipping the FPGA into a dynamic x86 emulation mode, with instruction parallalism, would slow the whole thing down to something more reasonable. Even still, it should outperform anything the x86 chipmakers currently manufacture. The graphics possibilities are what really grab me; the documents were mentioning that as well. Imagine a 3D accelerator that doesn't have a fixed instruction set! If the application was coded to use a particular instruction 80% of the time, Viva would adapt the FPGA grid to create massive numbers of parallel execution units for that instruction, and the speed would go through the roof.
I'm really happy about this; I wonder how the mainstream processor manufacturers are going to react once the possibility of this thing becoming mainstream technology shows up in the press.
-- thalakan
... they'd be able to spell "scalar" correctly in their press release. :-)
How the hell are they going to such a thing???
I cannot understand how is that technology going to work at all.
Except for "magic" or "ghosts".
(reprogrammable chips? like EEPROM? doesnt sound logical to me)
Please explain...
---
I'm going to live forever, or die in the attempt.
I'll believe it when I hear it from a reputable source. Company press releases and local news stations are notorious sources for hoaxes.
Bleep!
Praise the Force Field! Praise the Laser Project! Slackware Loon #19830573
Is this DiMora above the greatest engineering minds or will he give the media more, obvious, fun.
Will Salt Lake be dubbed the "Shifty City" theologically, commercially, . . . quite technically?
of course it would be cool if this thing lived up to the press release. but utah is quite the fraud capital and their marketing committees do pull a few extra punches to get the job done.
maybe the former olympic committee members have something to do with this...
man, if i could get fuzzy dice for my rear view mirror, put this thing in my trunk, i could have a car mp3 player AND composer - because it would write original kick-ass mp3s. the babes would be all over me.
I think a twelve gauge shotgun would convince me of the fault tolerance. Otherwise, I'm not forking out $26 million for one.
No.
Is this how Utah writes articles? I've not read something so badly written in a very long time. If there wasn't an exclamation mark at the end of each sentence, I would have at least expected a big shiny happy clown face to have appeared! =-)
"It's really fast! >" "You could shoot it and it'll keep working!! >" "It can rearrange its wires a thousand times a second!! >"
Next time, Utah News, some *fact* and *detail* would be nice.
At "60,000 times the speed of a home PC," this thing should be able to raytrace in REALTIME (30 fps) what would take my humble K6-2 nearly half an hour per frame.
*shudder*
All we would need then is a neural VR interface, and then things could get really interesting...
iSKUNK!
Someone do the math -- how long would it take for this monster to decrypt everything ever sent across the net.
_______
2B1ASK1
Although the weather feels like spring lately, I don't think it's April just yet. Even so, the whole mission statement smacks of bull$hit. I'd love for it to be true but it reminds me of the feeling I got from reading press releases from many claiming to have invented a perpetual machine, discovered a room-temp superconductor recipe, etc...
Wouldn't mind being wrong though...
When you go to internic and search for "starbridge" you get:
------------------------
Whois Query Results
Starbridge (STARBRIDGE2-DOM) STARBRIDGE.NET
Starbridge Communications (INTERNET37-DOM) INTERNET7.COM
Starbridge Communications (ADULT24-DOM) ADULT21.COM
Starbridge Communications (SEXSUPERSTORES-DOM) SEXSUPERSTORES.COM
Starbridge Communications (SEXYNUDEGIRLS2-DOM) SEXYNUDEGIRLS.COM
Starbridge Communications (FREDDIEFREAKER-DOM) FREDDIEFREAKER.COM
Starbridge Communications (FREAKER3-DOM) FREAKER.COM
Starbridge Communications (STARBRIDGE-DOM) STARBRIDGE.COM
-----------------------
Interesting scam though... what do THEY get out of it?
I should have searched internic for "starbridgesystems" instead of just starbridge. Here's what you get then...
-------------------------
Registrant:
Circa 65 (STARBRIDGESYSTEMS-DOM)
208 1/2 25th Street
Ogden, UT 84401
US
Domain Name: STARBRIDGESYSTEMS.COM
Administrative Contact, Technical Contact, Zone Contact:
Light, Doug (DL8191) dlight@LGCY.COM
(801)994-7337 (FAX) (801)994-7338
Billing Contact:
Gleason, Matt (MG11172) MGLEASON@CIRCA65.COM
(801)392-2600 (FAX) (801)392-6350
--------------------------------
So, maybe they're legit?
And what are 'cellular autonoma' anyway?
Are they like cellular automata, but loners?
And do you get the impression that they only
have (at most) one working system?
The whole things just seems like some CS-naive
EE has managed to get carried away with himself.
It reminds me of other naive projects, like
'The Last One' (UK, circa 1982, which was to
be the last program ever written, because it
would take a natural language description of
the problem and write the solution for it), or the
miracle data compression algorithm reported
in Byte magazine a few years back that could repeatedly compress its own output without
data loss. Both failed, because both were
quite stunningly naive about the nature of
the problems they were trying to solve. This
super-specific hypercomputer sounds just the same.
I'm a configurable computing researcher so I'm a fan of the FPGA and what is has to offer to the computational world. This announcement, however, is a typical demonstration of how to abuse computer benchmarking. Their claim of being the world's fastest computing architecture is based on comparing their 12.8 TFlop number to IBM's 1.2 TFlop number. But, they're just numbers. To understand what they mean, you have to look at the units. The same way that you can't say that 12 inches is a lot longer than 1 yard, you can't really say that executing 12.8x10^9 4-bit add operations is more than IBM's 1.2x10^9. For one thing the press release doesn't even say what the unit on IBM's number is. At the minimum it's probably a 32-bit integer add and it's probably an IEEE floating point operation. Comparing a 4-bit add to IEEE 32-bit floating point add is like comparing an inch to a yard.
I've reviewed the information about HAL, and am very disappointed. There are misleading or just plain wrong information at the web site. I'm not saying that it's not a good machine,just that i would be careful drawing any real comparisons from the HAL documents.
1) If you read the "About Company" link, it states that in fact they have not actually built the machine that they claim will reach 12.8 Tops. It states that it will be built by Feb 99. I believe that they scaled the performance of a machine much much smaller than the one they claim betters the IBM machine. Note that scaling performance of a smaller machine is considered a big faux pas, as it totally neglects parallel overheads.
2) They quote 4-bit operations as though they are equivalent to the 32-bit Floating point ops that were tested on BlueMountain. They are not similar. The performance drops off to 3.8Tops when they use 16-bit operations, but the IBM is still doing twice as much real work because they are using 32-bit math.
3) They have not actually stated which benchmarks they used (if they actually had a machine to test). The IBM used (i think) the LinPeak, which is a matrix multiply operation. That benchmark is very good at showing off parallel architectures. But the size of the matrix must be quoted in the results. I don't see that information.
4) The HAL computer is very under memoried. This might be easy to fix. The rule of thumb is 1byte RAM per Flop. That's why the BLUE machine has 2.5Tbytes of RAM for 3.8TFlops. The max listed for HAL is 100GB, or about 1-2 orders of magnitude too small.
5) On one page at StarBridge, it lists the I/O performance in comparison to a Cray T3E-1024. But the numbers are differnt on the press release. In the press release is sez 50GB/s, but the company link indicates 50MB/s. 3 orders of magnitude different. I wonder if one of thoses is actual I/O data, and one is (50GB) is supposed to be memory bandwidth, which is a very very different concept from I/O. If the machine only has 50MB/s I/O, but 100GB of memory, then it will take about 2000 seconds to load memory from disk (or, say, to do a check point of the current data set).
6) The marketing data for the Cray T3E-1024 is wrong, which in my mind negates most of the comparisons. The Cray T3E-1024 does not cost $76m, but the Cray/SGI Blue Origin2000-3000 does cost about that much. It states the Cray does not have fault tolerence, but it most certainly does. It states that the maximum I/O of the T3E is less than 2GB/s, which i know is wrong. (Did someone in marketting write this without double checking the numbers??)
7) The company link states that the HAL 4rW1 has a minimum sustained rate of 3.8 Tera-ops. Would any company really claim that there is no program that they could run that would not perform worse. If that is a challenge, i'd be willing to put a huge bet down that i could write a program that will give LESS than 3.8 Tops!!!
8) programming. On the company page, it does not state that you can program this in C or Fortran or any other common language. Instead it only talks about the GUI that you can use to describe your problem, and the software will automagically start running (at 3.8Tops minimum!!). This is a HUGE drawback if this is true (no C or Fortran). Also how can they possibly claim that their machine does not have the same parallel exectution overheads that are common on other parallel machines?? Just because you can change your network on the fly (and just how long does that change take??) does not mean you are immune to Amdahl's law!!
So to sum up:
1) 4-bit math is NOT equivalent to 32-bit math.
2) What are the benchmarks and data sets?? What were they programmed with? Was the test actually run with a full scale machine, or just scaled results??
3) How to deal with Amdahls law?
4) Hardware is under memoried, and very likely less than perfect I/O performance.
-r.
-- Straights are for fast cars, corners are for fast drivers.
The ASCI RED machine is not at LLNL, but at Sandia. It does use PPros. But a parallel machine with P-II's is also possible. It just takes an investment in designing your own chip-set. The PPro chipset supports low order SMP natively in most chipsets. But for the RED machine, Intel used custom networking chipsets to get the large machine. This can be done with Pentium-II's if you wanted to do that.
And a 149 processor Pentium-II would not kill a Cray. Well, not a large one at least. I would guess 149 processor P-II would come in around the same as a 100 processor Cray T3E or Origin2000. But since they are selling T3E's as large as 1380 processors, and Origins in the thousands of processors, a small 149 processor would not come close.
-r.
-- Straights are for fast cars, corners are for fast drivers.
It seems pretty simple to me. If it was fake and making money was the scam then the company would have to be publicly traded, its not. Since the companys only income is from licensing the technology then they would have to have the goods.
So, I don't think it is fake.
The fastest reconfigurable Xilinx FPGA is a 200MHz part.
Assuming that you can do 1 FLOP in one cycle, that means that their machine would need 16 TFLOPS / 200MHz = 80,000 computational elements.
This same FPGA has 500,000 gates per chip. Assuming that you could fit 100 floating-point pipelines onto this FPGA (5,000 gates per pipeline), this would mean that they would need 800 FPGAs. Does this fit in their box that they said? I think not!
Think about it from the power side as well. If we assume that those FPGAs are 5W chips, that's a total of 4kW of power consumption. Minimum.
And we haven't even breached the subject of adding support components like real logic elements for control, RAM for storing any kind of software that is needed, I/O subsystems, software support layers (Oh yeah, that's right, maybe Viva is the real-language OS that the government has been secretly developing all these years to do mind control on us all ;)
Hey, maybe now we have enough hardware to run Windows 2000's bloat. :)
---
gr0k - he got juju eyeballs - http://www.juju.org
http://evoketv.com - TV Listings 2.0
What fps will I get with it in quake2? ;-)
If it's over 1000 I buy one!
If they built this supercomputer-class device, why would they put an RJ-11 connector on it?
Witness http://www.starbridgesystems.com/about.html under the features of HAL-4rW1.
Why bother?