The solution, of course, is to implement a whole new cross-platform replacement for the M$ "standard" under the GPL or LGPL. It's a bit of a large sledgehammer...
Forgive my apparent ignorance, but I refer you to the post to which I originally replied. His comment was that he didn't like C, C++, Java, C# or any other ALGOL-derived languages. He was implying that only Java targets the JVM whereas many languages target the MS CLR. I was merely pointing out that although Java (language) is promoted as the preffered language for compiling to JVM bytecodes, many others are available. Whether or not you can dervice sub-classes from classes compiled from one language in another sounds like an implementation detail, and it could be implemented on the JVM.
Re:Sexier - New Age Bollock More Like
on
The Sexiest Metal
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· Score: 0
Oh dear, I doubt the moderators of the above comment were being ironic when they gave you "insightful" I'd give you a funny though:-) That "antigravity" scam has been about for years. Basically there was this dude on a fruitbreak called Bob Lazar who used to go around claiming to have worked on alien flying saucers stored at the skunk works in Area 51. He said the aliens were helping the US DoD by letting them study their flying saucer technology. He had diagrams of "flying saucer simulators" and stuff. He span this pseudo-science new-age clap-trap about the repulsive strong nuclear force "leaking" out of the atomic nucleus of element-115 (ununpentium) and using "gravity amplifiers" to boost this "anti-gravity" to create a gravity wave upon which the flying saucer would surf. The sorfing gravity waves is a semi-respectable scientific postulate. However the "anti-gravity" is not. The strong nuclear force != gravity. End of story. You'd have more luck flying an aircraft with a buch of Yogic flyers holding new-age chackra amplification herbal piles healing crystals. Or something. Element 115 has been made in the lab. IIRC it's half life is the order of miliseconds at the most, so how you get enough of it in one place long enough to power an anti-gravity drive escapes me.
Yes, probably. The BBC's science reporting is notoriously naieve. They had a guy on Radio 4 once talking about the perpetual-motion anti-gravity device he'd "invented." They were being serious about it!
What do you mean by "support under LinuxPPC"? If the kernel knows about the registers, it can preserve them during context switches. I'd imagine this trivial kernel mod was done years ago. As for general programming, you're right about gcc. There isn't much vectorisation in gcc (c.f. intel's cc which vectorises for SSE2 on PIV) so I (with unrealistic self-confidence as usual) set about writing a C library of vector, matrix, complext etc. functions to use the SIMD features of K6-2/3, Athlon, PIII, PIV and PPC a while ago, and to provide a plain C implementation for folks without SIMD. If you want to help, have a look here. I've only done 3DNow and C so far for a small number of functions, but one or two people are already interested.
Just buy an Athlon XP. It runs at 1.67GHz and does SSE (128-bit SIMD registers holding 4 32-bit floats) and 3DNow! (64-bit MMX registers used to hold 2 32bit floats).
This is a good article giving a basic overview of SIMD coding using altivec. However, when Apple claims that MHz don't matter, they're only telling the story, because SSE (on PIII and Athlon4/XP), 3DNow! on K6-2, K6-3 and Athlon all do much the same thing. I hate to say it, but the Pentium IV even has double-precision SIMD in the form of SSE2, currently the only consumer-grade processor with souble-precision SIMD. The AMD Hammer will have SSE2 as well when it comes out.
"Just because you don't understand it, don't mean it don't make no sense, and just because you don't like it don't mean it ain't no good" - Suicidal Tendencies.
A better idea, which has been done already, might be to put loads of very simple and fast processors on RAM chips instead. Putting 64 cores on one die creates a heck of a memory bottleneck.
Yes, they folded and for want of a few $10k. :-( If I had a million dollars, I'd have been straight in there. I'd have given up work and gone to work on their rocket for nothing.
They built one just such contraptions in Scotland back in the late 80's/early 90's but the steel was too thin, and they towed it out to sea in rough weather. The machine broke:-( Too bad, because it was a brilliant idea. The world is full of such brilliant ideas, and they're relatively cheap to make but no one wants to pay for them. If I had a million dollars I'd (fix the tree fort in our yard) fund one or two of these experiments. Alas, I'm poor. ...but not a real green dress, that's cruel.
Re:Serial ATA could REALLY cut into SCSI sales
on
Serial ATA Coming
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· Score: 0
Well, yes it could cut into SCSI sales, but high-end workstations and servers are using Fiber Channel nowadays, so U160 SCSI has already been superceded. I think this serial ATA stuff is just a marketing exercise - to the low end currently occupied by IDE/ATA.
Some modern CPUs have SIMD instructions/registers for doing just that sort of thing, ie operating on the elements of vectors, or rows of matrices, in parallel. These have been very successful on x86 processors, since their "normal" floating-point sucks so badly. It's a feature derived from old Cray machines. Itanium also does this sort of thing (only much more complicated). Other processors, such as UltraSPARC have such good FP units that SIMD isn't really required. Anyway, SIMD and MIMD (ie VLIW) is going to get ever more popular in niche applications such as 3D and physics modelling.
Funny, but true. It just shows you how held back we are by the x86 architecture. Yes, there are better architectures out there, but because of economies of scale, unfortunately we're stuck with the VHS of processors.
Hmmm... it doesn't look all that advanced, and it's not that much different to what I've been doing in my library. Never mind, as time passes, I'm sure there will be "seamless" vectorisation built into gcc.
Yes, but PIII has SSE which is very similar to altivec. AFAIK there aren't many compilers out there that can do vectorisation, and GCC 3.0.x doesn't do it, so I'm working on this: libSIMD I haven't done any SSE or AltiVec yet, only 3DNow!.
The solution, of course, is to implement a whole new cross-platform replacement for the M$ "standard" under the GPL or LGPL. It's a bit of a large sledgehammer...
Forgive my apparent ignorance, but I refer you to the post to which I originally replied. His comment was that he didn't like C, C++, Java, C# or any other ALGOL-derived languages. He was implying that only Java targets the JVM whereas many languages target the MS CLR. I was merely pointing out that although Java (language) is promoted as the preffered language for compiling to JVM bytecodes, many others are available. Whether or not you can dervice sub-classes from classes compiled from one language in another sounds like an implementation detail, and it could be implemented on the JVM.
Oh dear, I doubt the moderators of the above comment were being ironic when they gave you "insightful" :-)
I'd give you a funny though
That "antigravity" scam has been about for years.
Basically there was this dude on a fruitbreak called Bob Lazar who used to go around claiming to have worked on alien flying saucers stored at the skunk works in Area 51. He said the aliens were helping the US DoD by letting them study their flying saucer technology. He had diagrams of "flying saucer simulators" and stuff. He span this pseudo-science new-age clap-trap about the repulsive strong nuclear force "leaking" out of the atomic nucleus of element-115 (ununpentium) and using "gravity amplifiers" to boost this "anti-gravity" to create a gravity wave upon which the flying saucer would surf. The sorfing gravity waves is a semi-respectable scientific postulate. However the "anti-gravity" is not. The strong nuclear force != gravity. End of story.
You'd have more luck flying an aircraft with a buch of Yogic flyers holding new-age chackra amplification herbal piles healing crystals.
Or something.
Element 115 has been made in the lab. IIRC it's half life is the order of miliseconds at the most, so how you get enough of it in one place long enough to power an anti-gravity drive escapes me.
Yes, probably. The BBC's science reporting is notoriously naieve. They had a guy on Radio 4 once talking about the perpetual-motion anti-gravity device he'd "invented." They were being serious about it!
Of course, in real life you'd never fill a church up with that many people, because nobody in their right mind believes in that shit any more :-)
There are loads of languages that compile to the Java Virtual Machine as well. Google is your friend. Nice troll though.
Naw,
Maybe we'll get a "MajorWoodrow" and "BigPiney" Windows soon.
That strange. I remember Macs back in the '80s that did the soft power thing. Never had one though :-(
Thanks for putting me right.
So, you can still learn something from slashdot...
:-)
Yes, I know, I'm writing in assember.
What do you mean by "support under LinuxPPC"?
If the kernel knows about the registers, it can preserve them during context switches. I'd imagine this trivial kernel mod was done years ago.
As for general programming, you're right about gcc. There isn't much vectorisation in gcc (c.f. intel's cc which vectorises for SSE2 on PIV) so I (with unrealistic self-confidence as usual) set about writing a C library of vector, matrix, complext etc. functions to use the SIMD features of K6-2/3, Athlon, PIII, PIV and PPC a while ago, and to provide a plain C implementation for folks without SIMD. If you want to help, have a look here.
I've only done 3DNow and C so far for a small number of functions, but one or two people are already interested.
I post a semi-informative piece and all there are are first-posters and trolls at a higher score.
I've had it up to here with slashdot.
It sucks.
Just buy an Athlon XP. It runs at 1.67GHz and does SSE (128-bit SIMD registers holding 4 32-bit floats) and 3DNow! (64-bit MMX registers used to hold 2 32bit floats).
This is a good article giving a basic overview of SIMD coding using altivec. However, when Apple claims that MHz don't matter, they're only telling the story, because SSE (on PIII and Athlon4/XP), 3DNow! on K6-2, K6-3 and Athlon all do much the same thing. I hate to say it, but the Pentium IV even has double-precision SIMD in the form of SSE2, currently the only consumer-grade processor with souble-precision SIMD. The AMD Hammer will have SSE2 as well when it comes out.
"Just because you don't understand it, don't mean it don't make no sense, and just because you don't like it don't mean it ain't no good" - Suicidal Tendencies.
The fact that he refers to them as "folders" does not bode well for his credibility in the rest of the article.
I thought the slowing down of the pioneers/voyagers had been attributed to the emission of radiation from a radiator on the craft?
A better idea, which has been done already, might be to put loads of very simple and fast processors on RAM chips instead. Putting 64 cores on one die creates a heck of a memory bottleneck.
Yes, they folded and for want of a few $10k.
:-(
If I had a million dollars, I'd have been straight in there. I'd have given up work and gone to work on their rocket for nothing.
They built one just such contraptions in Scotland back in the late 80's/early 90's but the steel was too thin, and they towed it out to sea in rough weather. The machine broke :-( Too bad, because it was a brilliant idea. The world is full of such brilliant ideas, and they're relatively cheap to make but no one wants to pay for them. If I had a million dollars I'd (fix the tree fort in our yard) fund one or two of these experiments. Alas, I'm poor.
...but not a real green dress, that's cruel.
Well, yes it could cut into SCSI sales, but high-end workstations and servers are using Fiber Channel nowadays, so U160 SCSI has already been superceded. I think this serial ATA stuff is just a marketing exercise - to the low end currently occupied by IDE/ATA.
Some modern CPUs have SIMD instructions/registers for doing just that sort of thing, ie operating on the elements of vectors, or rows of matrices, in parallel. These have been very successful on x86 processors, since their "normal" floating-point sucks so badly. It's a feature derived from old Cray machines. Itanium also does this sort of thing (only much more complicated). Other processors, such as UltraSPARC have such good FP units that SIMD isn't really required. Anyway, SIMD and MIMD (ie VLIW) is going to get ever more popular in niche applications such as 3D and physics modelling.
Funny, but true. It just shows you how held back we are by the x86 architecture. Yes, there are better architectures out there, but because of economies of scale, unfortunately we're stuck with the VHS of processors.
Hmmm... it doesn't look all that advanced, and it's not that much different to what I've been doing in my library. Never mind, as time passes, I'm sure there will be "seamless" vectorisation built into gcc.
Yes, but PIII has SSE which is very similar to altivec. AFAIK there aren't many compilers out there that can do vectorisation, and GCC 3.0.x doesn't do it, so I'm working on this:
libSIMD
I haven't done any SSE or AltiVec yet, only 3DNow!.