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Fin-Fet Transistors on the Horizon
MORTAR_COMBAT! writes "According to this 9 September News.com article, IBM scientists have "manufactured a working static RAM chip out of so-called Fin-Fet transistors, which feature two gates, rather than a single one, for conducting electricity". What does this mean for us? 50 percent performance increases, due to increased throughput of electricity, and 50 percent less power usage, due to decreased electrical leakage. Longer battery life for laptops, lower power bills for server farms. Moore's law lives on. More pretty pictures here."
Now when I buy my new machine it'll be eventually outdated!
Damn you Moore and your laws!
WWJD.... for a Klondike bar?
Man oh man, the this throws a whole new wrench into the gigahertz wars. Amd and Intel lookout, IBM gonna be rolling out some 33 mhz processers that will whip both your collective asses and further confuse computer owners.
This is good news but I sense wierdness in the space time contiunuim with this announcement.
Puto
The Revolution Will Not Be Televised
Here's for more awesome AMD processors! My computer architecture class was discussing Moore's law and we all agreed that it was reaching a plateau in respect to the law itself. Looks like this is the breakthrough that will take processors to the next level.
There are only 10 kinds of people in this world... those who understand binary and those who don't
I love it. The date on the press release says - January 11, 2002.
- Zav - Imagine a Beowulf cluster of insensitive clods...
Link
Course RDRAM is QDR memory, but whatever happened to the much ballyhooed bubble ram?!?!? Oh well....
Contrary to popular belief, coding is not all free blow-jobs and beer. Those things cost MONEY!
My mistake. I mis-read that to mean that this new process would reduce half of the electricy usage, when that sentence has nothing to do with the Fin-Fet process, in particular.
But basically, since half of the electricity pumping through would be loss to leakage, things that reduce leakage by 50% would lead to the 25% overall power reduction the pretty pictures show.
MORTAR COMBAT!
Please, the world has enough "Gates" already ;-)
I would think that the performance increase OR lower power usage would be the result... not both at once. If you take the performance increase, you need to use the same amount of power... or if you take the power savings, performance needs to stay the same.
Someone correct me if I'm wrong.
"I will trust Google to 'do no evil' until the founders no longer run it." Hello Alphabet.
The first one is very good. It explains the problems with conventional scaling methods then presents the solution to the Gordian knot, the FinFet. Found by searching IBM chips (It is on my information resources list)
Maintaining the benefits of CMOS scaling when scaling bogs down
Process requirements for continued scaling of CMOS--the need and prospects for atomic-level manipulation
Obviously right now this is much more expensive than SRAM because it's not being mass-produced. But let's face it, computers would be faster and cheaper (because of reduced circuitry from lack of refresh stuff) if we could use SRAM, but because it's so much more expensive than DRAM, we don't. My question is this: at the same size (capacity and size in micrometers) how much more/less will this cost than SRAM? Does the price become comparable to DRAM? if it is comparable to SRAM, we will definalty see improvements, but the majop improvements will come if it becomes near DRAM (even if a little more expensive) we could see drastic increases in performance. My 2 cents.
Comment forecast: Bits of genius surrounded by a sea of mediocrity.
The inversion layer forms on the sides of the fin and the conduction occurs along the fin. Actually, at these dimensions it is debatable that you may have volume inversion of the fin. The source/drain contacts occur at the ends of the fins. A top-down drawing/SEM would have helped.
Won't they get sued over that?
Napster-to-go says "Fill and refill your compatible MP3 player", which is a lie. It's not MP3. It's WMA with DRM.
Ok, now I understand. I was much confused by all the press writing "two gate" device. Every rational NAND/NOR gate made in a MOS process is made with 2 gates. A 4 input device would have 4 gates.
The big advantage of the FinFet device is rather than being an embedded surface device with the gate on top of the channel which is embedded in the substrate, the FinFet uses a channel elevated out of the substrate so the gate wraps three sides of the channel. The papers report access to the top and bottom of the channel as "two gates" it is really a three side wrapping of the source-drain channel which is raised out of the substrate.
The big advantage is that for a given gate voltage the penetration into the channel in blocking carriers is only so far. With the gate on both(3) sides of the channel the penetration effectiveness for a given voltage is greatly increased.
Actually the performance benefit from double-gate is minimal. The approximate delay associated with switching a capacitor is CV/I, where C is the capacitance of the gate, V is the source voltage, and I is the on current of the device. Double-gate gives you double (or slightly more) the current, at the expense of twice the capacitance. You don't really gain much at the same gate length. The real advantage is scaling. You can make shorter double-gate FETs, and gain the kind of performance you're used to from following Moore's "Law".
- From the post: "... and 50 percent less power usage."
- From the web site: "... new type of transistor which reduces power consumption by 20 - 25%."
Somewhere along the way, that thing got twice as efficient! Amazing design.Too big to fail? Does that make me to small to succeed?
Mentioned in that story was that HP scientists are scrambling to publish anything they've been working on because people not putting out anything contributing to the bottom line in a year are going to get laid off.
I know that IBM just fired thousands of people and has a hiring freeze on their RAM research division (I have a friend that works there), besides letting a number of people go there.
I suspect the IBM scientists are in the same pickle as HP. When the economy goes down, the first thing to get axed is R&D, and they'd rather not be out on the street.
May we never see th
... scientists at IBM created a working prototype static RAM chip using Jango-Fett transistors. Consuming 4 times the power, it will store information with a cold air of dread and competence.
A secondary line of static RAM chips based on an exact genetic replica (called Boba-Fett transistors) will be developed throughout the year for mobile computing purposes. Support for the Dark Side is eminent.
Why not try reading a source other then The Register about what Palladium _really_ is. Then post some bright, inquisitive comments on it, poking holes in it or stating what about the Palladium program you specifically find worthless. Rather than this "woe is me, and woe is the world for the palladium doth commeth.... abandon all ye hope".
Christ, palladium comes with an off switch. Turn it off and run your 'untrusted' code on your machine. Your corporate firewall may not let you throw if you aren't in Pallidum mode, but so be it. It has nothing to do with the gov't throwing you in jail.
-malakai
-Malakai
A Dragon Lives in my Garage
You won't see much static RAM (SRAM) in a server farm. SRAM is what most call CMOS RAM (for most of the wrong reasons.) A server farm runs on Dynamic RAM (DRAM) but it's not where the power is chewed up. Disk drives and CPU's take the power, esp. the 10,000 and 15,000 RPM SCSI drives in use today.
The devices that will gain some power savings are those that we'll enjoy it most in; handheld toys!
-- I have a private email server in my basement.
DRM at twice the speed then.
I'm feeling sad. If the future (2-5 years) means PC's are gone and all we will have are X-Box type boxen on the desktop, I'll cry.
Me too. Funny how things go, isn't it? Now I'm looking to IBM for the way out here. I'd happily drop x86 instantly if IBM keeps their spine stiff and keeps DRM out of PPC. Plus, these chips are really kick-ass, no legacy goo.
Life's a bitch but somebody's gotta do it.
Christ, palladium comes with an off switch. Turn it off and run your 'untrusted' code on your machine. Your corporate firewall may not let you throw if you aren't in Pallidum mode, but so be it. It has nothing to do with the gov't throwing you in jail.
Sure, and the first thing you'll find is tons of software refusing to run with the switch in the off position, whether or not it has anything to do with digitial media. Don't be naive.
Life's a bitch but somebody's gotta do it.
Or...
Fin Fet: Can fit inside a human hair
Boba Fett: Uses disintigration, so you can fit inside a human hair.
Kill, Tux, kill!
But the web site said it was twice as fast and the post only said 50% faster :-)
Bill Stewart
New Fast-Compression-only CPR http://preview.tinyurl.com/dy575ks
... also in related recent news ...
IBM announced a new line of system processing units, dubbed the "personal computer". These amazing compact systems weigh only 53 lbs and clock in at 4.77 MhZ. This magic box puts more computing power at the fingertips of more hobbyists than ever before.
IBM expects further growth in the Personal Computer field. "We could see speeds around 8MhZ within a few short years", claims Dick Johnson, chief engineer of the computing division.
Skiers and Riders -- http://www.snowjournal.com
Good. It's about time, though 50% of current high-power CPUs may be too little too late. I know of at least one major embedded systems corporation in a panic, because modern CPUs consume way too much power for use in many embedded environments.
Slashdot. Vapor for nerds. Stuff that won't matter for years.
Not that I'm complaining about new breakthroughs, but it sure seems like the vapor:substance ratio is sucking eggs lately, at least on slashdot. When someone offers an actual working product for some reasonable cost, maybe then I'll get excited. Until then I'll just stuff this into the mental round file.
One probable reason that the industry is looking closely at finFETs is that the original invention of them at UC Berkeley was not patented originally. Note that there are several patents on fabrication methods for manufacturing them now, but the original invention was not patented.
From an article about the early work on this at Berkeley:
Hu said the FinFET prototype was successfully fabricated last July and appeared to perform well. He said no patent had been taken out on the device. "We made the decision not to patent," Hu said. "We want the widest possible usage. We hope this becomes a mainstream transistor structure in the future."
As a VLSI design engineer working in the industry, I can see that finFET's are becoming a serious technology contender in the 50nm process timeframe.
The "fin" in finFET is not an acronym. It refers to the shape of the device which resembles the fin of a fish or tailfin of an airplane. You need to look at the device cross-sectioned to see where the name comes from.
Definition from the Semiconductor Glossary.
The TEM picture is not too clear, but try this site at Intel for a picture. Search down for the term "finFET" near the bottom.
The SEM picture shows the "fins" being in the source and drain region. I always though the "fin" was the gate as shown in the TEM cross-sectional picture. In this picture, what I thought was the "fin" is kinda hard to see. It's above the thing labelled "si island" in figure 26. Perhaps I'm mistaken. Or perhaps the authors of the document at Intel are mistaken.
Actually, the editor that you are chiding has a valid point in my opinion. Leakage is headed towards the point where it won't matter how many transistors you can pattern in lithography ino a given area if they leak so much that you can never be sure when they turned off. FinFET's are one technique to enable transistors to actually work as MOS transistors when the industry heads below 50nm process technologies. Without some solution to the leakage problem, Moore's law is in some danger of becoming invalid.
and 50 percent less power usage, due to decreased electrical leakage. Longer battery life for laptops,
Battery life for laptops has always been 2 hours. It will always be 2 hours. This is the minimum we'll put up with, and thus we'll invariably find ways to suck up the power until it *is* two hours. Much like how we're so very willing to load bloatware on our computers until windows takes 5 minutes to load. Any more, and we'll think it's too long. Any less and we'll think there's room to spare.
"No problem. I have the capacity to do infinite work so long as you don't mind that my quality approaches zero."-Dilbert
Not to mention that the narrow end of the fin contacting the substrate decreases channel/substrate leakage. This is a VERY cute idea. It probably can get better density, too, as it gets developed further.
That is all.
IBM is a trustworthy computing founding member and is on the steering comittee..
They are pushing DRM
The only major company absent from trusworthy computing is VIA... I can't seem to find Sony on the list either but they have to be pushing a DRM of their own. They are both content producer and hardware manufacturer.
If voting were effective, it would be illegal by now.
IBM license these ideas to anyone who'll buy them for $$$$
Why is Moore's Law always referred to with a shrug, as if it's some amazing, consistent, unstoppable force? The results that are interpreted as "Moore's Law" exist purely through human effort. Surely Moore's Law can't actually be the law of maximum human ability to improve, can it? Surely people in high places at Intel are throttling the engineers back when they get ahead of themselves, and pouring on the cash when they get behind... Setting and meeting expectations is what matters most to the stock market, after all. Moore's Law is just a means to that end.
like magnetic ram, and all the other wiz-bang new techs in the news recently.
Question is, when is it going to be common? Nowadays, it seems even with standards, solid backing, things sometimes still don't take off.
And until they do, it's got nothing to do with us little people.
Here's a link to the AMD info
Intel also announced FinFet CMOS at some point, because it's mentioned on the frontpage of that article.
Not to mention that the narrow end of the fin contacting the substrate decreases channel/substrate leakage. This is a VERY cute idea. It probably can get better density, too, as it gets developed further.
Now, with additional gate surface area, we'll have LOTS of gate leakage to look forward to!
Same problem, different place.