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Intel Plans to Overhaul Chip Architecture
Carl Bialik from the WSJ writes "Intel is planning to announce an entirely new chip architecture later this month at the company's developer forum, the Wall Street Journal reports. The company isn't discussing details yet, but it's expected that Paul Otellini will discuss a 'technology foundation designed from scratch to improve energy efficiency and make it easier to add more than two processors.'"
One thing the article didn't make clear is what exactly Intel means by "A New Chip Architecture". i.e. Do they mean a new architecture as in the Itanic (but low power!), or a new chip architecture as in, "We're ditching the 20 stage pipeline in exchange for a more reasonable 6 stage pipeline, swapping out most of the control circuts for those from our StrongARM line, and rewriting the microcode to execute all of the Pentium instructions on a simple, low power RISC core."
While they could go either way, I hope they've learned from the Itanium and EM64T debacles that they should stick with a compatible microcode. Leave the super-instruction sets to the MIPS and SPARCs of the world.
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You remember back in the day when processors had only one core?
Slices, dices, eats your lunch.
Conroe according to Anandtech...4 92
http://anandtech.com/cpuchipsets/showdoc.aspx?i=2
HJ
Who wants to bet that the announcement includes a integrated memory controller? I wouldn't be suprised if they just licenced Opteron technology from AMD; it would be alot cheaper than developing their own. Although, they could always just outright steal it.
Bugs are just features that have been fixed.
On NPR this morning, they mentioned that Intel had said that a typical PC user wouldn't notice any change as a result of this new architecture. So one presumes this means no major instruction set revisions or anything.
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This is kinda funny in two ways..
'technology foundation designed from scratch to improve energy efficiency and make it easier to add more than two processors.'
Not overheard anywhere: "We are peeking through a knothole in AMD's fence and seeing what they are up to.
Nitpick: "The company isn't discussed details yet"
The proper word is ain't.
A feeling of having made the same mistake before: Deja Foobar
One has to wonder if Apple had any 'insight' to these plans when they signed the deal.
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mac switches to intel :-p
intel switches to PPC ?
The war with islam is a war on the beast
The war on terror is a war for peace
Meanwhile, Intel's desktop dual core chips seem to offer much more aggressive pricing at this time. AMD's lowest price dual core chip, the X2 4200 is almost twice as expensive as Intel's lowest cost dual core processor. However, an interview with three AMD execs on PCPerspective.com claims that "AMD would eventually have lower priced Athlon X2 processors via the waterfall effect in the future".
As we all know, the Pentium 4 is a pretty goofy, shlocky design. The Pentium M is good, but it's essentially a Pentium Pro. That's 10 years old.
Intle NEEDS to prove that they can still make a good x86 chip from "scratch".
Intel announced some fud about EPIC, and except for fujitsu who kept Sparc alive despite Sun's layoffs this FUD wiped out the entire market.
Methinks they saw the power of this approach and if the last round killed 4 leading nplayers, this round will kill off the remaining 2 (IBM & AMD).
I hope their new logo isn't as easily confused with a feminine hygine product.
Performance per watt? Notice now Intel is singing the exact same tune that Apple is? I'm not saying that it's being made specifically for Apple, but clearly Steve Jobs looked at the roadmap and, since Intel wants something new, saw a common goal that he could pursue.
That just has to do with the market. In the start when the automobile was introduced, a person had to walk in front of it with a bell to warn for the danger. Since with computers there is still this risk, so a sysadmin has to run around and warn everybody of dangers in the use of computers, people just can not let go of the car analogy.
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The word "multiprocessor" should be "multicore". They're talking about 4 or 8 cores on a single CPU, which might be nice for blades but not so useful for a laptop or a gamer.
And of course, Macheads note the phrase "performance per watt".
The article seems to pretend that the Israeli design teams low power Pentium M doesn't exist. It says the last major design change was the Pentium 4 (which was prior to the Pentium M), and doesn't mention that current and (already announced) future Pentium M based designs match the description given.
Oh sweet! That sentence was written so balmily I think it has even qualmed my pre DRM large-scale nationwide deployment fears.
Given that Apple's porting (so far as we know) has all been focused on the x86 series, one would assume any new architecture designed for Apple would be compatible. Otherwise, Apple would have to throw away all the porting work they've done so far and/or create three-way fat binaries instead of two-way. Unless the benefits are staggering, it doesn't make sense for them to switch to yet another design at this point.
Will it run Lotus 1-2-3?
---- "Logoff! That cookie shit makes me nervous!" - A. Soprano
We use the Car analogy because everyone will understand it.
Cars have been around for so long today that it is taken as ubiquitous, and common knowledge. So when we talk about DDR effectively doubling the bus bandwidth, people go "Oh, like the difference between a 2 lane highway and a 4 lane".
The fact is, computers, like cars, are modularly constructed, and both devices follow a strict set of rules. This makes for direct analogies from one part to the next simpler (engine vs CPU for example).
Lastly, we use the computer/car relationship because it works!
"Victory means exit strategy, and it's important for the President to explain to us what the exit strategy is." G.W.Bush
Well, Risk and Alpha are going away, and Itanium is the way of the future for HP-UX and OpenVMS. What was interesting was what they told us about the forthcoming Intel processors - the entire Alpha team was hired by Intel and the next gen intel chips will use the Alpha style switchless mesh architecture. This style architecture removes roadblocks inside the box -- no more intermediaries. Your data takes a straight line to its destination.
In other words - it connects processors directly to one another to render true linear scalability. This differs from other architectures in that there is no traditional bus, and you can add processors, memory and I/O capacity in a Lego block-like fashion.
They also mentioned they will be coming out with quad core in 2007.
Though they may not want to admit it, Intel knows they've lost the 64-bit format war for desktops at least.
So probably what the are working on is a next gen x86 architecture. Those don't come out too often, usually the design one and just modify it for a number of years. It sounds like they are going to start using modifiations on their Pentium M for desktops, which is cool since it is efficient both thermally and in terms of what it does per clock, but there's a limited life to it and they know it. The Pentium M is something of a throwback to the P3, which itself is really based on the Ppro design.
So my guess is Intel figures it's time to unviel a new design for a core, but on x86 architecture.
"A big emphasis is going to be performance per watt," said Bill Calder, an Intel spokesman. "That is a very big deal."
Seemed to come right out of Jobs keynote, didn't it?
"Flyin' in just a sweet place,
Never been known to fail..."
Make a fast and efficient enough chip, and any legacy stuff can be run in emulation anyways. This was certainly done for the WOW stuff in the non-x86 versions of Windows NT, and with the speed of processors nowadays, I don't see any reason why any chip designer would waste the silicon on supporting DOS and Win3.x apps at the chip-level anyways.
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You might start here. Lots of other books will tell you how to use semaphores and mutexes. This book will help you to understand why to use semaphores and mutexes (and perhaps open your eyes to better concurrency constructs), and teach you how to reason about your multithreaded design so that you won't get any nasty surprises when it comes time to run it.
And the chips would be cool also...
All processor architectures are based on the algorithm, a custom started by a guy named Babbage some 150 years ago.
A really new architecture should abandon the algorithmic model and adopt a non-algorithmic, signal-based synchronous software model. It would revolutionize computing and solve the nastiest problem in the computer industry: software unreliability.
But we cannot expect a big company like Intel to be truly innovative. Hopefully a bright upstart will get the message and make a killing while the behemoths are busy fighting each other for market share. The won't know what hit them until it's too late.
exactly what I thought when I read the headline. The timing is too exact. It would have to be somewhat x86 compatable though you would think, else they wouldn't be developing on it now, they'd wait at least for prototype chips.
The 64bit format war hasn't even started yet. And besides its hard to call it a war when intel doesn't even have a 64 bit chip out. When we see 50%+ penetration of 64bit chips on the desktop then you can start to say who is the winner.
I'm told that AltiVec is vastly different (and superior) to SSE.
They're not very different at all, actually. Both are SIMD instruction sets essentially designed to achieve the same goals. That AltiVec is superior to SSE is true, but only if read literally. SSE2 is about an even match, with each having a few advantages over the other. SSE3 pretty much added all the horizontal data movement instructions previous incarnations lacked and is actually somewhat better than AltiVec.
If a job's not worth doing, it's not worth doing right.
The X2 3800+ has been out for weeks and is currently at $400. It should be down to $300 by year end or less.
[RIAA] says its concern is artists. That's true, in just the sense that a cattle rancher is concerned about its cattle.
Actually, I get fond memories when I think of old computers. If the Apple ][ and the Trash-80 didn't exist when I was waaay back in the first grade and doing stupid BASIC shit on them in school, I probably wouldn't have any interest in computers now.
not quite actually. The big difference being that the cell architecture has a host processor, and many smaller sub processors. The subprocessors have a backwards memory model (which seems extremely confusing) in that each one has a scratchpad memory. Also each sub processor has a limited instruction set. What I described consists of many identical processors although the possibility exists for a chip to have one high-ILP core and many high throughput cores to optimize for both single and parallel app). However even with asymetric cores like that they'd all be capable of running any x86 instruction. Phil
What processor is in your computer?
If it's a P6-based chip (Pentium Pro through Pentium M), Netburst-based chip (Pentium 4), Nx586, or an AMD K6 or later, then you've got one that does it already.
It translates (in hardware - not the same as Transmeta, which did it in software) x86 instructions to an internal RISC instruction set (the one that the Nx586 and AMD K6 used was called RISC86). The most commonly used x86 instructions directly map to the instructions used in the internal RISC processor. Then, it processes it using a RISC core. The system is totally unaware that there's not a true x86 CPU in there, though.