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Could HP Beat Moore's Law?
John H. Doe writes "A number type of nano-scale architecture developed in the research labs of Hewlett-Packard could beat Moore's Law and advance the progress of of microprocessor development three generations in one hit. The new architecture uses a design technique that will enable chip makers to pack eight times as many transistors as is currently possible on a standard 45nm field programmable gate array (FPGA) chip.""
Since the wiring in an FPGA is not fixed, they have to integrate more flexible ways of routing. According to TFA this takes up 80% to 90% of the silicon, leading to a much worse ratio of wiring to transistors dedicated to logic processing compared to "normal" chips. HP is developing something they call "field programmable nanowire interconnect (FPNI)", which consumes a lot less space. So they are not beating Moore's law, they improve chip space use in FPGAs to become similar to what todays dies with fixed routing achieve.
And even if you are desperately seeking more efficient FPGA, you'd have to be patient. TFA mentions that they are targeting a 25-fold increase packing density compared to todays 45nm chips in 2020. That's thirteen years, which in Moore's laws steps means about eight 18 month periods, each doubling density. My math may be flawed, but shouldn't that mean that by then we have 2^8 = 256 times the density in the normal process as we have today?
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Can You Imagine a Beowulf Cluster of These?
"God fights on the side with the best artillery." - Napoleon, Marshal of France - speaking truth to power
I never understood why it was called a law. It was an incredibly accurate prediction, but there was nothing holding is there. I would think that any dramatic increase in technoloby would lead to a jump larger than Moore's law.
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HP has research labs? Honestly, I thought they were an ink company. Damn, and I was getting quite used to mocking their "Invent" logo.
Cthulhu Saves.
So, who uses FPGAs in a big way? Whom is this likely to affect?
TCP: Why the Internet is full of SYN.
Exactly .Also FPGA have a rather specialized use, as for majority of applications such flexibility is not really needed. As in the end they do essentially same thing (turing machines can emulate another turing machine remember) - and the tradeoffs needed to make hardware flexible imho are just not worth it for general computing. - Better to make faster ,more densely packed chip than reconfigurable one.
I think that even if they were to jump ahead, in the long run the development here would lag behind and even out, thus equating to what it would be if Moore's law had been followed exactly.
the Political Inquirer
Moore's "Law" is actually a prediction that's been remarkably accurate.
I think, though, that's what happening here is employing the technology is causing positive feedback loops in the design and development of the technology, which is accelerating the improvement of the technology.
It's only going to get faster from here. Human consciousness executing on "silicon" by 2030.
Welcome to the singularuty.
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Xilinx is the worlds largest producer of FPGAs.
Their biggest customer? Cisco. (by far)
The big iron routing guys use heaps in high end devices.
--Q
The mean value theorem shows that if the average rate is x, and the instantaneous rate ever goes below x, then it must necessarily also be above x sometimes. Put another way, progress will sometimes be faster than other times.
Dewey, what part of this looks like authorities should be involved?
As a rule of thumb i was told ... an fpga normally uses 6 gates to 1 gate used by a custom ASIC chip ... so a 5 million gate chip would require a FPGA with 30 million gates ...
This may have changed over the years ... but i'd like to know how this announcement changes this heuristic ...
HP Engineers Defy Moore's Law, New Nano-Chip Prototype in 2008
They havent even made a chip yet.
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Anyone who wants a low-volume run of custom chips. For runs up to a few thousand, FPGAs are cheaper than ASICs (and have the advantage of being firmware-upgradable). If you don't need latest-process speed or power efficiency then FPGAs are likely to be good enough. Take a look here for some of the people who use them.
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Maybe HP should focuse on beating the illegal wiretapping case before they break another law? They're not Microsoft, you know.
I always thought 'fold' meant "doubled this many times" or 2^24 in this case.
If I could walk that way I wouldnt need cologne.
http://memory.oyhus.no/
By using that technique, that programmable logic could be thousands of times more powerful without increasing the space it takes.
Kim0
OK, the actual paper's here (full text freely available).
As far as I can tell this has nothing to do with standard processors and everything to do with FPGAs.
It seems what they propose is: Instead of the FPGA configuration bits being done with gates on the silicon wafer, why not perform configuration by configuring the metal-to-metal interconnects? After all, if the metal layers are thick compared to the interconnects between them, you can blow connections you don't need like blowing a fuse. By removing the FPGA configuration bits from the silicon wafer, they can save a lot of space, leading to higher speeds and lower costs.
They have a clever way of arranging such a system, which should be easy to fabricate.
What Moore's law is supposed to have to do with this I don't know.
Michael
"Goodness me, how unlike the FBI to abuse the trust of the American public." -- The Onion
Its not like Moore's Law is a law of physics (like the speed of light). Its more like an observation.
If they wait for it in a dark alleyway with a lead pipe and stay very, very quiet...
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That is all well and good but will it ultimately result in faster pr0n downloads for me?
The development board is going to use a FGPA, because a custom chip design would be too expensive. For later, they plan to produce it as ASIC to improve the price/performance ratio. With better FGPAs, they could stick to the FGPA for the end-user version which would help to reduce investment costs.
Quote about the ASIC design:
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I thought FPGA's were a common microcontroller that *could* be altered to run as a microprocessor. You can configure FPGA's to run as a micro-controller and you can get microprocessors to act like a microcontroller but they are not the same thing. Most FPGA's run at far lower clock frequencies and far lower transistor density's when compared to your desktop CPU. This isn't because one is better than the other its because they are designed for different purposes, getting more transistors on a chip is great for your smartphone but doesn't mean much for your desktop.
I just don't see how this would would allow for moore's law to be broken. The largest FPGA I have been taught about (and gotten to use) had 22,000 transistors on it, I thought your average CPU was supposed to have billions.
Me bad. TFA:
So it should say 25 times as dense.
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there are lots of uses for FPGAs in radar processing, image recognition, you can even do small
floating point kernels REALLY fast on FPGAs if done correctly.
granted on most of them you have to know verilog or vhdl to use them, but there are a couple
companies that have fully functional C/Fortran programming environments that take it all
the way down onto an FPGA. using those general codes can run faster on FPGAs.
plus they are really low power. a room full of general computers running a teraflop
takes large amounts of power, fpga based systems take 1/20th or so the watts.
If I could walk that way I wouldnt need cologne.
we had another article yesterday.</plug>
Someone tell HP that a faster chip!= more printer cartridges sold
I entirely agree. Moore's law is about general ICs, not FPGAs.
;)
But that does not mean this is insignificant. FPGAs are extremely useful in many applications, but cost and transistor count hold it back for a lot of applications. An increase in transistor density by 3 orders of magnitude is significant enough that it could make FPGAs a viable option for a lot more people.
Too bad the article made no mention to the effect on cost
FPGAs are sweet. In addition to what the sibling posts have said, FPGAs are great for prototyping, because programs running on them can be implemented so quickly and easily. Finite state machines are a cinch on FPGAs, which makes them perfect for embedded systems. Plus, when programming them, there's the added benefit that you don't have to worry about the complexity of an actual processor or microcontroller: no stacks, no instruction sets, no interrupts, etc. Obviously it comes with a trade-off of processing power, but it can often be worth it.
That HP should field their chip researchers to beat the rap? Though courts seem boring places to me, I'd like to be a fly on the wall when that case comes up!
....."
In other news, HP legal department invent new heuristic chip architecture based on rat's brains. "The development was comparatively simple", says Attorney Splitz, "but we are still having trouble defining the intellectual property rights
Also FPGA have a rather specialized use, as for majority of applications such flexibility is not really needed. ...for general computing.
I don't think you quite understand the meaning of "specialized." More general is sort of the opposite of more specialized. FPGAs are less specialized than pretty much everything else.
I imagine they'll end up seeing a lot of neat uses when they're cheap and small enough to replace MCUs - which are currently what people use when they want to do generic processing of various things from various locations.
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One of the reasons that Moore's law has so accurately predicted the continual doubling of storage and speed is that it offers companies an excellent guideline for product roll-out. It's a self-fulfilling prophecy. Customers expect computers to get more-bigger-better-faster at that rate, so companies have a production target. That provides a much more stable product ecosystem than one that is marked by a punctuated equilibrium of sudden large advances followed by unpredictable periods of status quo.
JHDL is my favorite alternative to these languages. Rather than embedding the behavior in the language itself (which I personally think is the source of most confusion and poor HDL design) JHDL provides you with Java APIs that can be used to construct the circuit.
It works surprisingly well, in part because circuit design is more object oriented to begin with. Just like in good OOP design, you want your circuits to be simple, black-box designs that will always produce output Y for input X. More complex circuits can be designed by simply "snapping together" smaller circuit Objects to create larger, more complex entities.
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Packin' transistors on a FPGA
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Even if they had the technology of 3 generations ahead, they would still release the chip at Moore's Law's pace to get the most revenue out of it.
But...companies beat Moore's law all the time. The reason it seems like such a hard-and-fast law is because they typically restrict themselves to it's proposed schedule so as not to shoot themselves in the foot; it would be too hard to compete with everyone releasing everything they develop immediately.
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As if HP's shit didn't run hot enough as it is.
They really need to focus on better cooling before they go anywhere. Damned laptops overheat daily because of the crap cooling systems in them.
Still waiting on Serviscope_minor to wake up to fucking reality and realize that Jessica Price isn't going to fuck him.
Those scoundrels at HP are doing it again. They probably managed to do this by tapping Moore's phone line or something.
No that you who didn't quite understand - microprocessors are already flexible enough by their nature (hence my reference to turing machine emulation on another turing machine). The need to actually have flexibility in hardware is narrow and specific (specialized) - as in majority doing "flexible" part in software makes a lot more sense .
,ASICs etc -FPGA make sense in those .But those are specialized uses.
I am not sure what you mean by "generic " processing -as a standard CPU is pretty generic , now if you talk about microcontrollers , DSPs
The Open Graphics Project http://lists.duskglow.com/mailman/listinfo/open-gr aphics is an attempt to make an open-source-hardware graphics card, so that we don't have to wrestle with companies like nVidia (ok, Intel) or ATI (ok, AMD) to get decent open-source drivers.
The OGP cards use FPGAs, which is the technology that HP's work (hopefully) innovates. I wonder if this advance will make OGP's cards much more competitive with nVidia/ATI cards? Heck, maybe HP would even consider showcasing its technology using the OGP project.
International Technology Roadmap for Semiconductors
You can read more about it at the ITRS website.
A quick scan of the website reveals this interesting image. The observant will note that with current news progress is already ahead of their curve.
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They're more like... guidelines! ARGHH MATEY!!!
!#&*
Soon we will have even faster, smaller prototype use graphics calculators with horrible user interfaces! SWEET.
Take a shot every time the word nano makes it into a Slashdot article.
They are more generalised chips, yes, but that makes their use more specialised :) The two are not mutually exclusive. Just as, say, your pair of glasses is pretty specialised - they fit on your face and hold your lenses - that's all they do. However the Optician has a pair of adjustable specs, which can fit on anyone, and hold any lenses. That pair of specs is far less specialised in ability, but is far more specialised in usage.
Another interesting thing that came to my minds are "chaos" chips which can rearrange their architecture to become something else i.e possibilities of evolving chips comes into my head this research will greatly boost of this happening in the future
Tm
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Am I missing something here?
Peter predicted that you would "deliberately forget" creation 2000 years ago...
http://www.lavistachurchofchrist.org/Pictures/Tr easures%20of%20the%20Bible%20(Divided%20Kingdom)/t arget9.html
Although, that may have something to do with molecular cohesion instead.
Peter predicted that you would "deliberately forget" creation 2000 years ago...
Whoever said we should be 2^8.6 times faster failed to read the whole line. It said by 2020 it could fit the same amount of transistors in 4% of the space. So even if for whatever reason this technology wouldn't benefit from other advances in chip speed(like Die Shrinks) the difference wouldn't be that much. It will be interesting how other companies use this and how HP decides to license it.
FPGA? ASIC? Sounds vaguely familiar. Maybe that 8am class that still gives me nightmares 5 years later? The wikipedia articles make my head hurt the same way.
IMO, Moore's Law is totally flawed due to the fact that it essentially only predicts the miniaturization of silicon chips. Any move to more advanced technologies (either not involving silicon, or in some configuration unlike current ones using copper) automatically breaks the law due to said technologies not adhering to the performance ratio of silicon chips. Of course, some of that is mitigated by the fact that such new technologies tend not to go into circulation for a very long time, perhaps preserving some of the validity of the law, but if this weren't the case, Moore's Law definitely wouldn't hold up against more advanced tech than silicon.
Just because someone either now or in the future has the capability to 'exceed' the prediction implied by Moore's Law doesn't make it necessarily certain that they will. Bringing that technology to the market has to clear a lot of hurdles, such as money sucking leeches (otherwise known as "business people" and/or "lawyers"). Why give someone a ten-fold increase in capabilities when you can give them a two-fold increase for which they will happily pay the same amount?
"..the number of transistors on an integrated circuit for minimum component cost doubles every 24 months." (Wikipedia)
See the "cost" part? Cost isn't determined by technology. It's determined by leeches. Honestly, i'm surprised it's held up this long. By the time this gets to market (if ever) it ought to be just in time to fit in nicely.
Else they are slower than Moore's Law in 18 month doublings.
I must be hungry, because when I saw that this story was tagged with "mooreslaw", I thought, "Mmm, that sounds good. Is that anything like coleslaw?".
Then you've always been wrong. Tenfold = x10, threefold = x3 etc.
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If this is true, then within two years there will be virtually no CPU/memory availability limit and we'll be bandwidth-limited only (and that isn't much of a problem even now).
Given such an environment, declarative languages (e.g., Prolog and parallel-prolog) provide performance, reduced code complexity, faster time-to-market, and auditability unavailable to procedural languages. And as a bonus the database is part of the language.
Because Moore's law is like Moore's love: Hard and fast, and doubles every 18 months.
... and then they built the supercollider.
So they are not beating Moore's law, they improve chip space use in FPGAs to become similar to what todays dies with fixed routing achieve
Agreed, but if the article were titled "HP Enables Increase in FPGA Logic Density", it would have never made it to a slashdot headline.
I've looked at the examples and by far it seems far worse than VHDL. You basically add all of the syntax of Java (extending classes, constructors, class hierarchy) that are absolutely irrelevant to hardware design on top of the modular hardware design. Not to mention this provides absolutely no provision for behavioral RTL, which is pretty much what all digital design in FPGA's are done with anyway.
Just like the speed limit is a law. When the speed limit is 65, it doesn't mean that I can't go faster than 65. It just means that if I do, there may be consequences. Moores Law is kind of like that. It has become a self fulfilling prophecy. It has become the defacto standard for that industry. If you advance at less than that rate, you're in trouble. It seems pretty clear to me that 40 years ago, he set a realistic goal, which today everybody has accepted as the standard, just like we have accepted a speed limit of 65 or 70 as the standard. There's no reason it couldn't be 50, or 90. We all just roughly drive at that speed. Same with Moores Law, everyone more or less drives at that speed.
Reading the paper provided by another poster, it seems like configuration of these FPGA's is solely done by use of antifuse nanoconnections. This would essentially mean that these things were one-time configurable. That is, you configure the FPGA and it'd stay like that for the rest of its life. Kinda like one-time-write PROMs. Actel has been making FPGA's like this for years:
http://www.actel.com/products/mx/
Albeit not to the same scale. These types of FPGA's are much less convenient or usable as you can just keep re-configuring them to iterate and trouble-shoot your design. This makes using them as prototyping platforms impractical.
Someone who's been able to read more into this than I and can explain to me why I'm wrong, please do so. Have they come up with an anti-fuse method that allow re-fusing?
Roughly, other advancements... multi-cores etc. We should keep pace with Moore's law. It is a rather stupid suggestion. Every time one of these stories comes along they always suggest they are beating Moore's law, when really they keep pace.
New Wammy Co. method for silicon fab... this is going to double the speed of our computers and crush Moore's Law! It should be on the market about 18 months from now!
It is no longer uncommon to be uncommon.
10 transistors says that either (a) they will fail, or (b) it will take them 3 "generations" (about 4.5 years, based on the doubling every 18 months rule) for the technology to make it to market. They said the same thing about the Cell processor, and probably a lot of other architectures. Nothing to see here. Move along.
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Flipchip Pin Grid Array, hmmm..... where synopsis guy is when I need him
Doesn't anybody chack what they are talking about before writing headlines? FPGA is interconnect limited. CPUs and memory have entirely different limits. Increasing the density in FPGAs by 8x still leaves them significantly below CPUs and memory....
Most ACs are not even worth the keystrokes to insult them. Be generically insulted by this and ignored otherwise.