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DIY 1980s "Non-Von" Supercomputer

Brietech writes "Ever wanted to own your own supercomputer? This guy recreated a 31-processor SIMD supercomputer from the early 1980s called the 'Non-Von 1' in an FPGA. It uses a 'Non-Von Neumann' architecture, and was intended for extremely fast database searches and artificial intelligence applications. Full-scale models were intended to have more than a million processors. It's a cool project for those interested in 'alternative' computer architectures, and yes, full source code (Verilog) is available, along with a python library to program it with." Hope the WIPO patent has expired.

135 comments

  1. Neat... by jetsci · · Score: 2, Insightful

    So, that's neat and all but did I misunderstand something. His model doesn't seem that powerful unless he was using modern processors?

    --
    Bored at work? Play Game!
    1. Re:Neat... by jetsci · · Score: 1

      I can't help but wonder if this couldn't be emulated for a fraction of the price. Are there any virtualization systems out there that could accomplish what this guy did? I imagine something along the lines of GNS3 might work...

      --
      Bored at work? Play Game!
    2. Re:Neat... by kdawson+(3715) · · Score: 5, Informative

      Check this out...

      Article at /dev/null.

      Everything that you wanted to know and more. An interesting read.

    3. Re:Neat... by kirbysuperstar · · Score: 0

      Wha? Where's the fun in that?

    4. Re:Neat... by mea37 · · Score: 4, Interesting

      Of course a modern computer can simulate a 1980's computer. It would probably take about a day to write a functional simulation in Java.

      For that matter, it's not like this computer can do anything that a modern computer can't do in spite of the different architecture. It was designed to do certain things fast, but anything off the shelf today could run circles around these relics regardless of such optimization. (To GP's point -- since the article indicates that he was building to the functional design of the original, it's probably not powerful by today's standards. He may have used faster components than they had back then -- and he obviously used smaller components than they had back then -- but we're not looking at a modern billions-and-billions-of-transistors-on-a-chip optimized-in-ways-you-cannot-comprehend heat-sink-needing CPU.) So once you talk about "what can it do" at a useful level of abstraction, the answer is "nothing all that practical".

      But that's not the point, is it? This kind of stuff is a hobby and a fascination to some people. I'm interested enough that I might write a software simulation of the machine, but not interested enough to build one. This guy was interested enough to build one.

      It's not like stamp collectors are saving up for a big letter-writing campaign...

    5. Re:Neat... by jetsci · · Score: 2, Funny

      It's not like stamp collectors are saving up for a big letter-writing campaign...

      That's what they want us to think....all the while, draining the stamp supply!

      But seriously, I understand your point and I can respect that. I just wanted to know if it could actually do anything useful. If not, cool; he's got a pretty neat toy now and that's well worth it.

      --
      Bored at work? Play Game!
    6. Re:Neat... by Anonymous Coward · · Score: 0

      "Of course a modern computer can simulate a 1980's computer. It would probably take about a day to write a functional simulation in Java."

      It would then take another 2hrs days to actually run a simple 'hello world' or equivalent test simulation in java.

      an FPGA could run it in a few uSec.

    7. Re:Neat... by Anonymous Coward · · Score: 0

      interesting how the vagina is blurred out but the perfectly rounded asshole spewing shit is perfectly visible

    8. Re:Neat... by Anonymous Coward · · Score: 0

      Stop talking out your ass. This could be useful in todays worlds vs even against the fastest General perpuse CPUs. You would need to add several FPGAs (say about 10) and interlink them but then you could do huge database searches and rewrites much faster then you could on a normal computer. Of course you would need a good reason do this and a limited data set because you would be very limited by the number of FPGAs you had. But I can think of a few places where it could be useful. Also if you made ASICs you could improve the speed and the density. Though in reality this is more of a smart memory then a CPU and needs to be combined with a regular CPU. It might find application in low powered embedded devices. I know that if I get a chance to suggest we use a similar architecture, I will.

    9. Re:Neat... by fpgaprogrammer · · Score: 1

      A Field Programmable Gate Array (FPGA) is a fundamentally different type of architecture than what you think of as "modern processors." Instead of serial instruction stream execution engines you are provided with an array of programmable logic blocks in a sea of programmable routing. The programming model is akin to programming a spreadsheet in which each cell updates in parallel. Traditionally we think of this as "reconfigurable hardware" since the languages we use for designing physical hardware and FPGA emulations are the same (VHDL/Verilog). For most tasks that exhibit any sort of parallelism, an FPGA can grossly outperform a CPU of similar transistor count and cost both in terms of throughput and power consumption. The major barriers preventing the FPGA architecture from pushing serial instruction stream executers aside is the learning curve of the programming model and the economic barrier-to-entry: FPGAs are historically expensive VHDL/Verilog simulators and good design tools aren't cheap either. FPGA emulations of legacy systems can replace computing components that can no longer be purchased. This is what I do professionally.

    10. Re:Neat... by harry666t · · Score: 1

      These days Java doesn't run that slow:

      http://shootout.alioth.debian.org/debian/benchmark.php?test=all&lang=gcc&lang2=gcj&box=1

      C'mon.

    11. Re:Neat... by hardburn · · Score: 2, Interesting

      An architecture like this is useful for massively parallel algorithms. It could theoretically outperform modern desktop or server systems within that domain.

      In fact, a rebuild of COLOSSUS was estimated to be 240 times slower than a modern desktop at decoding old German cryptographic signals. That might not sound that good, but if you run Moore's Law in reverse over 60 years, you should get a factor a lot higher than 240.

      --
      Not a typewriter
    12. Re:Neat... by topherama · · Score: 4, Informative

      Uhhh... right here. Now don't say I didn't warn you, but it's pretty relevant.

      Link attempts to install a virus; need to kill his comment.

    13. Re:Neat... by Anonymous Coward · · Score: 0

      That can only be one shock site...

    14. Re:Neat... by mea37 · · Score: 1

      Ok, he was able to put a 32-node system on an FPGA. You interconnect a few, and you'll have a special-purpose procesor for a couple-hundred-record dataset. That won't do "huge database searches", I'm afraid. Ultra-fast processing of a few hundred records is not impressive.

      If you're going to tell me I'm talking out my ass, you might want to do the math first.

    15. Re:Neat... by yttrstein · · Score: 2, Insightful

      "But that's not the point, is it? This kind of stuff is a hobby and a fascination to some people. I'm interested enough that I might write a software simulation of the machine, but not interested enough to build one."

      I'd be very interested to hear your opinions of these monsters after you've actually attempted to convert one into a real hardware emulator.

      Something tells me if you're really serious about doing it in Java though, I'll be waiting a bit more than "about a day".

    16. Re:Neat... by e2d2 · · Score: 2, Informative

      Agreed. Every time something is posted on slashdot there inevitably comes a "yeah but this isn't useful to me" post. Ok, we get it. It wont solve _your_ problem. In fact it might not solve any problem at all. It may just be cool.

      It baffles me that some people don't get that. It's like they just tossed the "right brain" out the window because it wasn't relevant to the logical problem at the forefront of their mind. Think outside that box you call a head for once.

      I am always surprised where I find inspiration because it's never where I expect.

       

    17. Re:Neat... by mea37 · · Score: 1

      I'm curious what "monster" you think I'm talking about simulating. Having RTFA (before my initial post, no less), I'd say modeling the nodes of the NON-VON will be pretty simple.

      As to how long you'll be waiting... especially since I said I might do it, it could indeed be a while in terms of calendar time. I didn't say "I'm going to do this by tomorrow"; I said I expect the programming to take about a day's effort. If/when that effort might start, or how spread out it might be even then, nobody knows.

    18. Re:Neat... by mr_mischief · · Score: 1

      That is code written in Java that's being tested. It's not code running on a simulator for a 31-processor 8-bit SIMD machine written in Java.

    19. Re:Neat... by Anonymous Coward · · Score: 0

      Either you're joking, or you're looking at the numbers backwards:

      http://shootout.alioth.debian.org/debian/benchmark.php?test=all&lang=gcj&lang2=gcc&box=1

      The gcj behchmarks are worse almost all of the time.

      I'm not even disagreeing with your main point, that java isn't necessarily slow. I just don't see how the numbers you cited demonstrate at all what you're saying.

    20. Re:Neat... by harry666t · · Score: 2, Interesting

      LOL

      4x slower is much better than 40x or 400x slower (see gcc vs Ruby), that's what I wanted to show. Where did I say that gcj was faster than gcc?

    21. Re:Neat... by DaVince21 · · Score: 1

      Well, someone might recognize her if they didn't blur that part out!

      --
      I am not devoid of humor.
    22. Re:Neat... by Lord+Kano · · Score: 1

      This is slashdot baby. Survival of the fittest around here.

      LK

      --
      "Hi. This is my friend, Jack Shit, and you don't know him." - Lord Kano
    23. Re:Neat... by sjames · · Score: 1

      For one, it's just a model. For two, though it's easy to forget, we've come a LONG way in a short time in computing. Your cellphone is vastly more powerful than the flight computers on Apollo. Your desktop machine a way faster than the Crays of the '80s.

      The same general concept done today would necessarily look different simply because CPUs have gotten a lot faster relative to communications channels. The more modern CPUs would spend too long idling in that sort of setup.

      I have seen related designs on PCI cards used for signal processing recently.

    24. Re:Neat... by Anonymous Coward · · Score: 0

      it was in the 80's... also they were intended to be connected in the millions so yeah instant database access of millions of entries was the goal most likely

  2. Obligatory by Big+Nothing · · Score: 0, Redundant

    Does it run Linux?

    --
    SIG: TAKE OFF EVERY 'CAPTAIN'!!
    1. Re:Obligatory by Lord+Lode · · Score: 0, Redundant

      Maybe if you make a beowulf cluster of them.

    2. Re:Obligatory by Big+Nothing · · Score: 1

      I was just thinking the same thing! Maybe we can use it to display pictures of Natalie Portman, naked and petrified and covered in hot grits. I just bought the goatse.cx domain, we can use it!

      --
      SIG: TAKE OFF EVERY 'CAPTAIN'!!
    3. Re:Obligatory by Big+Nothing · · Score: 0, Redundant

      To he who modded me down:

      All your memes are belong to us!!

      --
      SIG: TAKE OFF EVERY 'CAPTAIN'!!
    4. Re:Obligatory by wcb4 · · Score: 1

      In Soviet Russia, the gostse.cx domain buys you. But its a lie, you don't own it... all your goatse.cx domains are belong to us.... next.

      --
      I reject your reality ... and substitute my own.
  3. Web Server by Anonymous Coward · · Score: 0

    Obviously not running on a supercomputer...

  4. If that's what's running his website... by sunking2 · · Score: 1

    Then I'm not impressed.

  5. Call me... by K8Fan · · Score: 3, Funny

    ...when he's emulated a Connection Machine.

    --
    "How perfectly Goddamn delightful it all is, to be sure" Charles Crumb
    1. Re:Call me... by serviscope_minor · · Score: 2, Insightful

      Who the hell modded the parent insightful? To the parent: call me when you ever do anything except post here.

      --
      SJW n. One who posts facts.
    2. Re:Call me... by Anonymous Coward · · Score: 0

      But... how do you emulate das blinkenlights on an FPGA?

  6. Holy CRAP! by zappepcs · · Score: 2, Interesting

    FTFA:

    What if I want to build my own?

    Yay open-source! The code isnâ(TM)t exactly polished, but in the interest of promoting weird retro computer architectures, Iâ(TM)ve provided the python library I wrote for it and the verilog code for the Processing Elements. Wire together as many as youâ(TM)d like! Use it to catalog all of your WhiteSnake and Duran Duran tapes!

    How the hell did he know about my music collection?

    This is pretty cool. 32 core non-von computing architecture on an FPGA. This is more or less the ARM process... license the IP and put it in an ASIC, except this is free. I've often wondered what might be done with the millions of 30xx series FPGAs that are out there in the world. I could lay my hands on probably 40-50 free. If there were some way to do something like this with them, that would be awesome. I like hobby robotics so it's tempting even though they would not be very power efficient. Still, that's a lot of potential processing for free. Now I'm going to have to look for free/open source code for them.

    1. Re:Holy CRAP! by Anonymous Coward · · Score: 0

      31.

      The number of nodes in this architecture will always be expressable as ((2^n)-1), where n is the number of layers.

    2. Re:Holy CRAP! by zappepcs · · Score: 1

      oops, typo... and, if you're interested, check out this

    3. Re:Holy CRAP! by GuruBuckaroo · · Score: 1

      You know, I always wanted to implement a VAX processor on an FPGA. Or better yet (but impossibly expensive), a real, 45nm, full-out printed die.

      I used to collect VAXen. They were powerful boxes for their day. And yes, I /did/ have a Beowulf cluster of them - 8 VAXStation 3100s, a VAXStation 4000/60, and a MicroVAX 4000/200. NetBSD ran great on them. But with modern, fast processors with tons of memory... muahahaha.....

      But seriously - take all those poor legacy folks out there who still have VAXen in business use (yes, there really are some still in use) and give them a new CPU card to drop into the cage. Would be a thing of beauty. Replace memory cards with banks of DIMMs with appropriate QBUS (or what have you) glue/emulation.

      Yes, I know I'm weird. I already told you I collected VAXen.

      --
      Poor means hoping the toothache goes away.
    4. Re:Holy CRAP! by zappepcs · · Score: 1

      That's awesome. I worked with a company once whose lifeblood was a single redundant PDP-11... yikes.

      I've got a hand full of Motorola MVME systems in the garage that I'm either going to eBay or play with... I can't decide what to do with them really. Guess I need to get one up and running. Only have AUI network cards for them, so could be awkward. I've been called a bit weird at times too... sigh

    5. Re:Holy CRAP! by mmkkbb · · Score: 2, Informative

      This is more or less the ARM process... license the IP and put it in an ASIC, except this is free.

      Yes, ARM ships soft cores, ST Microelectronics uses soft cores (at least internally), Altera, Xilinx, OpenCores. Here's a list so you don't search for "soft core" and find something totally different.

      --
      -mkb
    6. Re:Holy CRAP! by zappepcs · · Score: 1

      I hope you know that you just gained karma points by passing up the opportunity for a goatse link. I have to say that I've been rather impressed by some of the ARM processors that are out there. Some tweaked for multimedia apps, others for motion control etc. I've not done detailed comparison between the TI Omap and ARM, but I have an ARM-7 proto board I've yet to play with. May hack an older phone for the Omap complete with screen for a small robot. Thanks for the links

    7. Re:Holy CRAP! by fpgaprogrammer · · Score: 2, Interesting

      i'm currently wrapping up a PDP-11 emulator on FPGA. I'm writing this post while waiting for the simulator to run test code that was written before I was born.... our contract also has us replacing a fixed-head disk with magneto-RAM.

    8. Re:Holy CRAP! by Anonymous Coward · · Score: 0

      a VAX processor on...a real, 45nm, full-out printed die

      Don't we call those "Alphaa"?

    9. Re:Holy CRAP! by e2d2 · · Score: 1

      The hurdle for FPGAs seems to be the learning curve for programming using VHDL. It's a bit daunting coming from programming on a Von Neumann architecture. That's just my experience so far, being new at FPGA programming. But they do intrigue me now that their prices are coming down.

    10. Re:Holy CRAP! by zappepcs · · Score: 1

      Verilog and HDL et al are very different, though there are scripting setups that look/feel similar... ugh, switching between things like C, Perl, javascript, shell, JAL (PIC mcu), NQC (Lego), Python, HTML, and so on, then go home and try to learn VHDL.... you'll find me in a fetal position in the corner of my home office, under a foldup table, whimpering and praying for sudden savant skills. The shallow smears of blood on the backspace key and gibberish on the screen will be the only clues as to how I got that way.... then I wake up, TYGHN imprinted backwards on my forehead. Grab a coffee and wonder why I thought I could learn VHDL in 6 weeks.

    11. Re:Holy CRAP! by ogdenk · · Score: 1

      So get an AUI twisted pair transceiver and plug the machine into just about any hub or switch. It plugs into your AUI port, has some blinkenlights and an RJ-45 jack. They can be had for cheap on eBay. I have a few in my closet. Works great for my old VAXstation 3100.

      AUI ports don't have to be used with ThickNet. I don't think I've seen a functional 10Base5 installation in a LONG time.

  7. binary tree by Anonymous Coward · · Score: 0

    a binary tree in hardware, whats next? implementing google file system in hardware?

  8. Transputer? by Muad'Dave · · Score: 4, Interesting

    Wasn't the transputer an example of this architecture? I'm old enough to be able to say "Get off my lawn!" and remember when the transputer came out; it caused quite a stir.

    --
    Tiller's Rule: Never use a word in written form that you've only heard and never read. You will end up looking foolish.
    1. Re:Transputer? by AtrN · · Score: 3, Interesting

      The transputer architecture was quite different. It wasn't SIMD but just a processor with communications links, some on-chip RAM and h/w support for CSP - a scheduler for threads (called a process in occam/transputer-land) and comms via synchronous, uni-directional channels. The scheduler and stack machine architecture made context switches very fast and communications easy. The h/w was notable that you just needed some power and a clock to get a transputer machine up and building multi-processor systems wasn't too difficult.

  9. WIPO does not grant patents by Anonymous Coward · · Score: 0

    WIPO does not grant patents, The document indicates that it entered the national phase in Europe. The publication date was in 1987, so the patent should be long expired by now.

    The US patent was filed on June 26, 1989 and granted on june 4, 1991. 20 years from filing is June 26 of this year. 17 years from granting has already passed. However, it is 20 years from the earliest filing date, and that date is the claimed priority date of October 31, 1985. Therefore barring some extension that may have been granted, the US patent ended 17 years after grant, or June 5, 2008.

    Have fun!

  10. GOOGLE CACHE LINK by Brietech · · Score: 3, Informative
    --
    I'm perfect in every way, except for my humility.
  11. pity the programmers weren't up to it by Anonymous Coward · · Score: 1, Insightful

    Still not.

     

  12. Virtualization vs Hardware vs Verilog by Anonymous Coward · · Score: 5, Informative

    Folks just don't understand what FPGA's do.

    "So, that's neat and all but did I misunderstand something. His model doesn't seem that powerful unless he was using modern processors?"

    It's implemented in HARDWARE. Everything runs in parallel. To do the same on a "modern" processor, would require 300-400Mhz. A FPGA running at a [modest] 25Mhz could get the same or better performance.

    "I can't help but wonder if this couldn't be emulated for a fraction of the price. Are there any virtualization systems out there that could accomplish what this guy did? I imagine something along the lines of GNS3 might work..."

    FPGA's are cheap. A Spartan-3 board can be had for 100-200, and probably hold 2-3 32 node cpu's.

    Programmers just don't understand the difference between say verilog, and C/C++/Java.

    verilog is the basic building block of CPU's. Everything is done in PARALLEL by default, while in C++/Java everything is done SERIALLY.

    1. Re:Virtualization vs Hardware vs Verilog by Man+On+Pink+Corner · · Score: 1

      Interestingly, though, while FPGAs are cheap, they're still not as cheap as MIPS on a modern, mass-market Intel or AMD chip.

      There's a fundamental natural limit -- some kind of physical constant that nobody has named yet -- that governs how much computing work can be done on a given amount of silicon, using a given amount of power. It's far from clear that massive parallelism is the way to get closest to that limit.

      The demise of Moore's Law tells us that at least some parallelism will have to be involved, but going all the way to FPGA-level RTL coding is probably not going to be necessary. (I hope.)

    2. Re:Virtualization vs Hardware vs Verilog by jgtg32a · · Score: 1

      I know that FPGA's do get better performance than a generalized processor but is it really to the level that you've described?

      I may have to screw around with Verilog again.

    3. Re:Virtualization vs Hardware vs Verilog by Anonymous Coward · · Score: 0

      What the hell does MIPS have to do with an FPGA? MIPS is an ISA, not a large-scale programmable embedded device/chip.

      This "fundamental" natural limit... did you learn this at ITT Tech or something? I think and really hope you understand that when a transistor is shrunk in size, its power consumption during switches drops as well?

      Do you realize that we still have yet to produce any computer that can surpass the human brain in computing power? You think the brain operates serially?

    4. Re:Virtualization vs Hardware vs Verilog by Man+On+Pink+Corner · · Score: 1

      What the hell does MIPS have to do with an FPGA? MIPS is an ISA, not a large-scale programmable embedded device/chip.

      It has everything to do with getting computational tasks done.

      This "fundamental" natural limit... did you learn this at ITT Tech or something? I think and really hope you understand that when a transistor is shrunk in size, its power consumption during switches drops as well?

      Just curious, since you seem rather knowledgeable. Why wasn't your PC made by Thinking Machines?

    5. Re:Virtualization vs Hardware vs Verilog by Anonymous Coward · · Score: 0

      Yes, it's that low level.

      Verilog [or VHDL] is the basic building block of everything digital.

      All modern CPU's are designed in verilog [or VHDL].

      You essentially construct individual registers and describe the data transfer mechanism between them.

      Everything is managed in 'clock cycle', not machine cycles, so there is no real 'abstraction' typically present in programming languages.

    6. Re:Virtualization vs Hardware vs Verilog by Man+On+Pink+Corner · · Score: 1, Informative

      What the hell does MIPS have to do with an FPGA? MIPS is an ISA, not a large-scale programmable embedded device/chip.

      Sorry, to clarify (with an </i> even!): MIPS is not an "ISA," whatever that is. MIPS is a rather generic term for computational throughput (millions of instructions per second). A million cores running at one instruction per second generates 1 MIPS, so does a single core running at a million instructions per second.

      You will use less die real estate and less power with a general-purpose processor designed for the second case than you will with an FPGA that implements the first case... so unless you're lucky enough to be working on one of a few specific parallel problems, you probably do not want to treat FPGAs as the religion you seem to think they are. Most general-purpose computational tasks don't parallelize to the extent that an FPGA is the right way to run them.

      If you wanted to perform IDCTs for a video codec all day, a programmable gate array is fine. But if you want to write the rest of a video player, from its file system to its UI, you'd be nuts to do it in an HDL.

    7. Re:Virtualization vs Hardware vs Verilog by DarkOx · · Score: 1

      The parent does seem to be speaking about things he knows nothing about but to be entirely fair....

      *Its probably the case that anything programmable device you were going to mass produce you could probably do the computation it needs to do more cheaply by using off the self MIPS products then if you used a FPGA in some configuration of your own design.

      *He is probably correct that there is a hard limit on the amount of logic operations you can do with a given number of joules of input energy and a given size of silicon surface you have to implement your circuit. Eventually we will get to the point where no matter what novel doping and etching methods we develop we can't make a transistor any smaller, and can't stable output with less input power.

       

      --
      Repeal the 17th Amendment TODAY! Also Please Read http://www.gnu.org/philosophy/right-to-read.html
    8. Re:Virtualization vs Hardware vs Verilog by jgtg32a · · Score: 1

      I was referring more to 25mhz being equivalent to 400mhz.

    9. Re:Virtualization vs Hardware vs Verilog by virtue3 · · Score: 1

      Oh, I'm a programmer, and I understand the difference. I'm just terrified of trying to write a massively parallel program :D

    10. Re:Virtualization vs Hardware vs Verilog by raistlinwolf · · Score: 1

      A million cores running at one instruction per second generates 1 MIPS, so does a single core running at a million instructions per second.

      You will use less die real estate and less power with a general-purpose processor designed for the second case than you will with an FPGA that implements the first case...

      That's why I clicked on this article right there - why not have a 1MHz gigacore cpu?

    11. Re:Virtualization vs Hardware vs Verilog by Man+On+Pink+Corner · · Score: 1

      Correct, I didn't phrase it very well. I'm basically saying, once Moore's Law has tanked once and for all due to physical limitations, what's the die going to look like? Nothing but configurable gate arrays, a few massive general-purpose cores, lots of smaller cores, or some combination of the above? There's going to be a limit as to how fast a given computing task is going to execute on a given amount of die area. Chips like Cell and Larrabee suggest that we'll eventually see hybrid approaches everywhere, but there's still a lot of room to argue about core count, core complexity, and interconnect fabric. What doesn't appear likely is that non-von Neumann architectures are going to stage a comeback anytime soon. If you're not doing wacky architecture experiments, DSP work, or otherwise spending most of your time in highly-parallel code, you probably don't want to deal with FPGAs.

      At least that's what they're teaching us at DeVry. :-P

    12. Re:Virtualization vs Hardware vs Verilog by raistlinwolf · · Score: 1

      Oh well, when I actually thought about solving a mathematical problem that needed hundreds of cycles... I realized why, lol.

    13. Re:Virtualization vs Hardware vs Verilog by Chris+Burke · · Score: 1

      Sorry, to clarify (with an even!): MIPS is not an "ISA," whatever that is.

      To be fair to the confused AC, MIPS is also the name of a line of RISC microprocessors and the corresponding Instruction Set Architecture.

      --

      The enemies of Democracy are
    14. Re:Virtualization vs Hardware vs Verilog by Ambiguous+Puzuma · · Score: 1

      MIPS can stand for either:
      "Millions of Instructions Per Second", a measure of processor speed
      "Microprocessor without Interlocked Pipeline Stages", a processor architecture--"ISA" might stand for "instruction set architecture"--developed by MIPS Technologies (presumably named after the architecture).

      From the use of "MIPS" in "while FPGAs are cheap, they're still not as cheap as MIPS on a modern, mass-market Intel or AMD chip", I had initially guessed that you were referring to the architecture (it's plausible on some level that Intel and AMD could make MIPS-based processors in addition to their x86 ones). With your clarification, I see you meant that for tasks that don't parallelize well, you can get more computational power per dollar with a mass-market Intel/AMD x86 processor than with FPGAs.

    15. Re:Virtualization vs Hardware vs Verilog by nurb432 · · Score: 1

      Its not true hardware, the FPGA is processing a really low level application, technically.

      Until you put it into silicon its not really hardware.

      But it is pretty damned close to hardware and still really cool, and a good example of the power of programmable logic.

      --
      ---- Booth was a patriot ----
    16. Re:Virtualization vs Hardware vs Verilog by mako1138 · · Score: 1

      The speedup is not always of that magnitude. If what you do is embarrassingly parallel, then yes, it will be a good candidate for an FPGA. However these days, processing cycles are cheap and getting cheaper, so it does not always make sense to do things in hardware.

    17. Re:Virtualization vs Hardware vs Verilog by Anonymous Coward · · Score: 0

      verilog is the basic building block of CPU's. Everything is done in PARALLEL by default

      To be pedantic, this is not strictly true for the Verilog language. Writing things a certain way will lead to priority coding, a pitfall for the unwary. How things turn out in hardware also depends a great deal on what the synthesis program does.

      http://www.sunburst-design.com/papers/

    18. Re:Virtualization vs Hardware vs Verilog by mako1138 · · Score: 1

      So, Intel processors use microcode patches. Does that make them "not really hardware"?

    19. Re:Virtualization vs Hardware vs Verilog by Cassini2 · · Score: 1

      FPGA's are really slow for some applications. This means a narrow window exists between an application that can be done on a micro-controller in software, and the equivalent application being done in an FPGA.

      Many of my applications require long chains of counters and magnitude comparators. FPGA's seem to be particularly bad at implementing them. The estimates I use are:
      A 50 MHz Schottky TTL counter can count at 25 MHz fairly easily.
      A 100 MHz FPGA can count at 2-4 MHz, and
      A 25 MHz micro-controller can count at 100 kHz.

      Certain classes of PAL like devices can count quickly, but may be limited in how many bits they can put onto a single chip. For any given application, I try to figure out how quickly the counter chain needs to count at, and select appropriate solutions based on that. Often a micro-controller is a preferred solution, as so many different things can be done with it. Additionally, many modern devices have dedicated hardware that can remove the need for the FPGA entirely.

      Counters also seem to be a particularly nasty corner case for FPGA devices. They are cheaply available as stock parts, so an FPGA based solution can be very expensive. Also, modern micro-controllers with built-in counter hardware are becoming very inexpensive. Sometimes cheaper than TTL devices.

      Counters also have a very critical timing chain where one bit (the carry bit), must make it through every stage of the device inside one clock cycle. In an FPGA, every logic operation, interconnect, and cross-connect carries a timing penalty. FPGA's are different from PALs. In a PAL, every output bit can be used in any combinatorial operation on any output inside one clock cycle. In FPGA's, combinatorial delays can stack up very quickly, and significantly.

      Researchers simulating new computer hardware designs love to use FPGA's, because expensive FPGA's can be used to simulate complex pieces of dedicated silicon. The delays in FPGA's accumulate in a similar scaled fashion as to what would happen in dedicated silicon. The resulting FPGA based solutions though, are roughly at one to two an orders of magnitudes worse than dedicated silicon, on a speed basis, a cost basis, and a speed/cost basis. This isn't really a problem if the simulation is only to verify functional correctness before one commits to "real" silicon, but it is a big problem if you are trying to build something with cheap hardware.

      It's the one to two order of magnitude slower problem that always seems to mean that software solutions are always just a hair worse than FPGA based solutions. Every once in a while, a very FPGA friendly application does occur, and then the technology works well. It's just that it takes the "right" applications. Specifically, a register oriented application with a relatively small number of combinatorial inputs per register.

    20. Re:Virtualization vs Hardware vs Verilog by nurb432 · · Score: 1

      In my view of the world, microcode does not qualify as true hardware.

      MicroCODE qualifies as software. Sure its really really really low level ( i have done my share of microcoding on dec processors ), but its still software.

      --
      ---- Booth was a patriot ----
    21. Re:Virtualization vs Hardware vs Verilog by Anonymous Coward · · Score: 0

      You're picking on people and you think that "verilog is the basic building block of CPUs" ? Verilog is an HDL just like AHDL, VHDL, SystemC, etc etc. Better start getting some new glass panes for your house.

      Hahah the submit captcha for this was "houses"

    22. Re:Virtualization vs Hardware vs Verilog by mako1138 · · Score: 1

      I see. That's a strict worldview, but I have to admit that it's consistent.

  13. It's a cluster by jrothwell97 · · Score: 1

    but it ain't a supercomputer (at least not any more, by today's standards.)

    --
    Those using pirated Tinysoft signatures(TM) are a real threat to society and should all be thrown in jail.
  14. Before it was slashdotted... by enigma32 · · Score: 2, Informative

    I managed to catch this one before the site went down.

    Cool stuff. The author says that these were originally designed to have each processor operate on a record in a database. All concurrently.

    I imagine the speed of such a system would be staggering... though tough to implement for large data sets. Still pretty cool.

    The Python library apparently implements machine code functions so he can debug in real time from the command line. Not my cup of tea, but cool for people that like to fiddle with machine code.

    1. Re:Before it was slashdotted... by mea37 · · Score: 1

      I found this original intent of 1 processor = 1 record interesting as well, but more from a "so that's why this isn't around today" standpoint.

      In the day it may have sounded like a promising approach. 1M records may have sounded like a big dataset. But today there are two types of dataset -- those so small that a conventional computer can handle them just fine, and those so big that this architecture cannot scale to them. I work in a data warehouse that loads several million records per day.

      To be fair, I respect this approach as possibly contributing to the massively-parallel database architecture in Teradata. It, too, works on the premise that a large number of processing elements (it calls them AMPs) each independently handle some of the data -- and in early implementations each AMP was a piece of hardware, kind of like this system. It scales better because each AMP handles an arbitrary subset of the data, not just one record. Each AMP has its own disks, not merely a bit of RAM and a few registers.

  15. Transputers were for MIMD systems by N+Monkey · · Score: 4, Informative

    Wasn't the transputer an example of this architecture? I'm old enough to be able to say "Get off my lawn!" and remember when the transputer came out; it caused quite a stir.

    The transputer was a RISC-ish CPU with 4 high speed DMA/serial links allowing it to be easily connected to other Transputers (each with its own local memory) to form a network. As such, it could be used to build a large MIMD system - not a SIMD one.

    Transputers (+ the Occam language) supported multi-threaded programming with very fast context switches and, for its time, they also had very good FP performance when compared to the contemporary x86+float coprocessor.

    1. Re:Transputers were for MIMD systems by Anonymous Coward · · Score: 0

      Occam had a fairly elegant design influenced by CSP and was amenable to transformation, simplifying the use of formal proofs with it.

      It was used to derive the transputer FP implementation which became the first correct FP implementation in hardware.

    2. Re:Transputers were for MIMD systems by bitrex · · Score: 1

      I think these guys are trying to bring back the concept, with 64 interconnected processing "tiles" on a chip.

  16. Coral CDN Link (w pics) by Anonymous Coward · · Score: 0

    http://chrisfenton.com.nyud.net/non-von-1/

  17. Best article of month. by tjstork · · Score: 1

    Seriously, nice post, nice work by the engineer. Inspiring, and learned something new. FPGA... who wouldn't want to try one himself or herself?

    --
    This is my sig.
  18. jealousy by Anonymous Coward · · Score: 0

    I used to have free time too. That looks like a lot of fun.

  19. Expired by jbeaupre · · Score: 1

    IANAL, but it appears 20 years has elapsed internationally, and that US patents 5,021,945 and 4,847,755 are beyond their 17 year life. This is assuming these are the only live applications or continuations.

    --
    The world is made by those who show up for the job.
  20. URL isn't goatse, but it's equally disgusting by RedDirt · · Score: 1

    Like, ew and stuff.

    --
    James
  21. Which Might Explain Why: +1, Informative by Anonymous Coward · · Score: 0

    D. E. Shaw always has job vacancies:

    http://chronicle.com/cgi2-bin/texis/jobs/search

    * Quantitative Analyst
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Generalist Associate (New York)
    D. E. Shaw Group (New York) 2/10/2009
    Profile Learn more in our Employer Profiles

    * Executive Technical Support Specialist (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Ideal Day Job
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Tired of Consulting?
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Special Technology Coordinator (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Tired of Academia?
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Government Adviser Associate (New York)
    D. E. Shaw Group (New York) 2/10/2009
    Profile Learn more in our Employer Profiles

    * Senior Database Administrator (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Investor Relations Associate (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Rotational Associates Program (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * For-Profit Roles for Nonprofit People
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Strategic IT Security Adviser (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Investor Relations RFP Writer (New York)
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Quantitative Developer
    D. E. Shaw Group (New York) 2/20/2009
    Profile Learn more in our Employer Profiles

    * Software Developer
    D. E. Shaw Group (New York) 2/20/2009
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    * Receptionist/Administrative Assistant

  22. WIPO PATENT EXPIRED?!?! by Anonymous Coward · · Score: 0

    The author is a goober. Anyone who works with tech these days should know patent basics. And that includes the knowledge that THERE IS NO SUCH THING AS A WIPO PATENT.

    With WIPO, you file a PCT application. It gets examined, and they issue a Written Opinion. And THEN you can take your application into different countries that you designate, and try to get patents in those countries.

    See http://en.wikipedia.org/wiki/Patent_Cooperation_Treaty

  23. DSP? by Consul · · Score: 1

    I wonder if something like this would be good for DSP (not necessarily real-time) work. There is a DSP method called "lumped modeling" which uses binary trees to attach together small algorithms derived from bilinear transforms of electronic components (resistors, inductors, capacitors). The networks go together in a way that look almost just like electronic circuits.

    --

    -----

    "You spilled my egg... I needed that egg."

    1. Re:DSP? by acohen1 · · Score: 0

      Many DSPs for limited units are actually done on FPGAs. What you are describing works great on FPGA.

  24. Re:And the point is by squiggleslash · · Score: 1

    That's fascinating, but has nothing to do with your original point, which questioned why someone would find it fun and a positive learning experience building something that isn't the most powerful computer on Earth.

    It's jolly nice to hear that "Linux" is useful to people who have no imagination or desire to better themselves though.

    --
    You are not alone. This is not normal. None of this is normal.
  25. WARNING! by Hurricane78 · · Score: 1

    The link in the parent comment caused my X session to unexpectedly terminate. No idea how he did it, or if it was intentional, but it happened.

    --
    Any sufficiently advanced intelligence is indistinguishable from stupidity.
    1. Re:WARNING! by datadigger · · Score: 1

      The link in the parent comment caused my X session to unexpectedly terminate.

      One X won't do, you need a triple-X session.

      --
      Aphorisms don't fix code. (Bart Smaalders)
    2. Re:WARNING! by Hurricane78 · · Score: 1

      We have carnival here in Cologne. The last days. triple-X-sessions were the norm, not the exception. So a single X is enough for me today. :)

      --
      Any sufficiently advanced intelligence is indistinguishable from stupidity.
  26. I have one of these already by Anonymous Coward · · Score: 0

    A 31 node SIMD? It's called GEE PEE YEW.

    1. Re:I have one of these already by Anonymous Coward · · Score: 0

      But yours isn't from the '80s!

  27. This Account Has Exceeded Its CPU Quota by Anonymous Coward · · Score: 0

    This Account Has Exceeded Its CPU Quota

    slashdotted

  28. MasPar by mdegerne · · Score: 4, Interesting

    For several years I worked on a SIMD system called MasPar. The system had 8192 processors. It was installed in 1991 and it was not until about 1998 that conventional computers running Oracle could even come close to the performance for data warehouse applications. Sure, it's slow by today's standards, but I bet a modern version custom built would be an awesome code breaking and data analysis system.
    BTW: the system was used to help with the human genome project and to search Medical Services Plan data by the Province of BC. It finally decommissioned in 2000 (or early 2001).

    1. Re:MasPar by Anonymous Coward · · Score: 1, Interesting

      I helped install the MasPar at our Uni (as a student employee in computer services) and helped with its upgrade to 8k processors. It got used for a few simulations and some password cracking :)

      It was too bad that it never got more use for any of the tasks it'd have been really good at. Eventually the vendor failed, the software stopped being updated, and the MasPar was recycled... almost.

      At that time the U sold older computers in a biannual surplus auction, so students could get a 386 or whatever for their dorm or home. I went to get some hardware or whatever caught my eye, at the time I was living on one floor of a house off campus.

      The maspar compute unit was being sold for $10, without the workstation front end (a DecStation). The cable to connect it was missing. But, I was more interested in workstations than in PCs, and I spied the front end along with our original DEC Alpha near the front of the sale on a pallet of to-be-recycled items. I bought the compute unit, then talked the sale admins into selling me the pallet for $100, most of which I made back immediately selling a couple Macs off the top.

      I then took the maspar home, almost dying getting it up the stairs (verrrry heavy) and setting it up in my living room. I pulled the internal cable out of the compute unit and extended it far enough out to reach the front end, then started it up. I had to break the root password, but I got it all working.

      Unfortunately I didn't have the system CD nor the license Paks, and I didn't have any maspar software. I did download a few things and played, but I couldn't do anything interesting with the system without more development tools. Plus running the thing heated the living room on its own.

      Eventually I moved out and sold the decstation front end on ebay, along with the alpha, and junked the data array. It actually fell down my front steps and tumbled over... heck of an end for a half million dollar piece of hardware.

      Erik

    2. Re:MasPar by heironymous · · Score: 1

      Such a beautiful machine! I loved working on the MasPar back in the 90's. I remember the eureka moment when my brain clicked, and I stopped thinking Von Neumannly. To this day, those experiences shape how I approach Clojure and Scala.

    3. Re:MasPar by jellomizer · · Score: 1

      It was slow for 1 process. But when you started to use all the processors that thing sped up. If well designed code you can drop it by 1 Big O segment O(n) can be done in O(1), O(n^n) can be done in O(n)

      --
      If something is so important that you feel the need to post it on the internet... It probably isn't that important.
    4. Re:MasPar by SwedishChef · · Score: 1

      A customer of mine moved to Windows servers and away from the DEC Microvax they'd used for several years. My partner talked me into trading them two mice (logitech mice) for it and we loaded it up in my truck along with cables, workstations, software, manuals, etc. We figured we could load up a version of Unix on it and make it do something fun. Unfortunately it had no FP capability and we couldn't come up with any free unix to run on it. The thing spent a few years in a storage closet until we finally threw it away (covertly).

      Apparently trying to play with older high-tech gear is a common failing for geeks. Only one time did it work for me. Another customer migrated away from an IBM i5 and asked me to come get it. I thought they were kidding until they called me and asked me to come get it "now!". Four of us moved it to my pickup truck and we sold it for $4k on eBay. In the paperwork we discovered an invoice for $30k that they had spent upgrading it the year before.

      --
      No one ever had to evacuate a city because the solar panels broke!
  29. Re:And the point is by amori · · Score: 0, Flamebait

    What else do you imagine ? I'm guessing you have one heightened sense of imagination, which I would probably associate with a gun totting Republican, who also happens to be a linux fanboy, and wishes to bring Linux into a subject that has nothing to do with it.

  30. Re:And the point is by squiggleslash · · Score: 3, Insightful

    I'm not imagining anything. I'm KNOWING you're the kind of asshole who posts on every Slashdot article about someone's homebrew project whining that it isn't "useful" in some arbitrary utilitarian sense and therefore is pointless. I'm knowing you do this, because like the others you have no imagination, no desire to learn, and no empathy with those who do.

    Oh, and it was you who raised Linux, in what appeared to be some kind of ironic "You're criticizing me, but I run Linux! Linux I tell you! Therefore I am cool!" defense against the suggestion you might actually be a wannabe geek. You do know that Linux wasn't utilitarian once too, right?

    No, you're not cool. You're an ass.

    --
    You are not alone. This is not normal. None of this is normal.
  31. Photo (with my cell phone) of an original NonVon1 by Anonymous Coward · · Score: 0

    Photo (with my cell phone) of an original NonVon1 PE Chip
    see:

    http://www.flickr.com/photos/35583156@N03/3295655132/

    If there is interest, I'll take a photo with a proper camera when I get home.

  32. many 1980s boutique supercomputers by peter303 · · Score: 2, Insightful

    One of my classmates was a Masspar founder. In the 1980s it readily doable for a 2 to 5 person team to design a custom CPU with the new Mead-Conway type circuit compilers and Silicon-fab factories out there. Lots of clever ideas too. Plus UNIX (before Linux) was a low cost way of porting an operating system that customer scientists were familar with. They all claimed C-compilers that made porting code easy. NOT! I put energy industry code on a half-dozen of them.

    The problems was the second generation machine. The prototypes got out the door, but only found a handful of customers - usually bold geeks. The second generation CMs, MassPars, Convexes, etc. then took 3-5 years. In the meantime that was about 3 to 5 Intel commodity chip generations which caught up in the meantime.

    The 1990s were expandable commodity clusters. Several of my friends started software services companies in their garages with a few dozen nodes, then expanded as business grew. Several cashed out very well. The 1990s approach made economic sense, but the 1980s were more intellectually interesting.

  33. Offtopic trip down memory lane by clary · · Score: 5, Interesting

    I got a chance to use a Connection Machine (real, not emulated) in the late 1980s, just a couple of years out of college. It was an internal R&D project for a defense contractor, porting a computational fluid dynamics program I didn't understand from Cray vectorized Fortran to the CM's *Lisp. Fun stuff.

    I even got a chance to visit Thinking Machines headquarters in Boston, and hear Danny Hillis speak. Here he was speaking to a room full of suits, dressed in jeans, sneakers, and a T-shirt. I remember thinking at the time that being able to do that was quite an indicator of success.

    Yeah, yeah, I know...offtopic, overrated, etc. So mod me down if you must. (Or is that just reverse psychology on you moderators? Muhahaha!)

    --

    "Rub her feet." -- L.L.

    1. Re:Offtopic trip down memory lane by agilen · · Score: 1

      You mean this Thinking Machines? http://www.inc.com/magazine/19950915/2622.html

      I wouldn't exactly call that "success"...he did cool stuff, but his company was one of the biggest failures in tech history...

  34. Re:And the point is by Noodles · · Score: 2, Insightful

    And I could buy a chair from WalMart, but I get more satisfaction out of building one.

  35. Re:And the point is by CompMD · · Score: 2, Insightful

    With that attitude and week-old UID, its no wonder America is suffering in science and engineering.

  36. Re:Photo (with my cell phone) of an original NonVo by 32771 · · Score: 1
    Very nice! Did you work on it? What happened to the project?

    Actually I just found a paper about it: http://dli.iiit.ac.in/ijcai/IJCAI-81-VOL-2/PDF/072.pdf

    The author of said paper might know Chris Fenton in some way, since the verilog code mentions a company named

    // Company: D.E. Shaw Research
    // Engineer: Christopher Fenton
    //
    // Create Date: 19:54:35 01/29/2008

    Actually, I found a book at google

    "Strategic Computing, By Alex Roland, Philip Shiman" that mentions DADO and NonVon being canceled because they didn't offer anything fundamentally new. Compared to the CM they had little staying power.

    --
    Je me souviens.
  37. Non-Van by marol · · Score: 1

    It had been a wonderful evening and what I needed now, to give it the perfect ending, was a little of the Non-Van.

  38. Re:And the point is by Thuktun · · Score: 1

    And Dell ? Who uses Dell.

    In the Small and Medium Business (SMB) market, they have a 28% share in the USA and 10% worldwide. There are almost a quarter million SMBs in the USA alone.

    http://www.dell.com/downloads/global/corporate/about_dell/FYIR_08_Slide_9.jpg
    http://www.census.gov/epcd/www/smallbus.html

    Apparently quite a lot of business use Dell.

  39. non executable data space by xeniast · · Score: 0

    IBM re-introduced non-executable data spaces in the late 80s Prior to that all IBM machines since the 40s had been Von Neumann

  40. Re:And the point is by Anonymous Coward · · Score: 0

    Amen to that!

    I completely agree with Squiggles. Some people just lack the hacker spirit and the insatiable hunger for knowledge.

  41. Don't worry by Weaselmancer · · Score: 1

    Hope the WIPO patent has expired.

    Don't worry, it's probably public domain by now.

    Unless someone put it to music, that is.

    --
    Weaselmancer
    rediculous.
  42. Re:And the point is by theeddie55 · · Score: 0, Offtopic

    As the accepted English spelling is "ciao" and not "cíao" that shouldn't be a problem.

  43. Re:And the point is by Anonymous Coward · · Score: 0

    For someone who has their own "computational cluster", you don't seem to realise just how many Dells are out there right now running in large clusters. Shows what you know.

  44. WIPO by queler · · Score: 0

    WIPO publications are not patents and are not enforceable in the US

  45. Non-Von is utterly pointless by Anonymous Coward · · Score: 0

    If you consider that a Von Neumann machine is a self-replicating machine, and that none have yet been build (though there are machines that can replicate some of their own parts), calling anything Non-Von is just stupid. They might as well call cars and planes Non-FTL since we still don't have Faster Than Light capabilities...

    1. Re:Non-Von is utterly pointless by heironymous · · Score: 1

      Respectfully, AC has confused two unrelated uses of the term "Von Neumann." In this context, the poster is referring to a particular computer architecture, which executes instructions sequentially rather than in parallel. The "Von Neumann self-replicating machine" idea to which you are referring is more of a science fiction notion, which is not really applicable here.

  46. Python? by Bleargh · · Score: 1

    "...a python library..." Hopefully a MONTY Python library? Using all that technology to house all the Flying Circus episodes seems like a good idea.

  47. Neat hack, here's more like it... by Anonymous Coward · · Score: 0

    For those interested in the 'programming' of hardware processors
    via software tools like Verilog / VHDL, the following will be of interest.
    Just as with "Open Source" software there is "Open Source Hardware" too including Verilog/VHDL source codes for CPUs and other chips like ethernet controllers or MPEG decoders or so on that can be freely downloaded and compiled into FPGAs or used to create dedicated silicon chips.

    Unfortunately even though anyone can freely WRITE or ADAPT Open Source [or not] VHDL / Verilog code to implement great new CPUs or other devices, the ability to get that turned into an actual CHIP cost effectively for hobby / low volume users basically doesn't exist. Usually you're looking at $100,000 or so of costs to start producing any significant piece of semicustom silicon and then you're looking at ordering at least thousands, or millions of identical parts before the amortization of the production costs starts to make the proposition attractive. FPGAs can be used to implement simple programmable hardware designs, but it'd be a pretty unique application of them that'd achieve any cost/performance benefit over doing things in an alternative way unless you're really just doing "few of a kind" prototyping.

    There's little opportunity for small scale electronics hobbyists or FPGA tinkering anymore. The lower cost ($10-$300) FPGA chips and especially development boards ($60-$1000) are so basic that you really can't do much interesting / useful with them that you couldn't do as well or better if you just bought a $300 PC and implemented your computation and project around its capabilities.

    That said, FYI, here are a couple of the lower cost FPGA development boards I've seen:
    http://www.digilentinc.com/

    You COULD program a modest sized (250k-2M gate equivalent) FPGA to implement some kind of legacy CPU [PDP, VAX, 8080, Z80, SPARC] or small cluster of those cores, sometimes even with better performance than the ORIGINAL silicon CPU ever achieved in its time. But just don't expect it to computationally compete [in 99.99% of common tasks] with a $80 INTEL ATOM CPU/motherboard (which provides about 2 GigaFlops of CPU power) -- it's just NOT going to happen.

    The higher end FPGA chips ($100-$1,000) and development boards with the better capability FPGAs attached ($1000-$10,000) are so expensive and often so difficult to use that they're just impractical to consider for virtually any use that one can practically find an alternative to.
    The 'compute power' of even a large / advanced 1 Million to 20 Million gate FPGA -- even one which INCLUDES dedicated function CPUs in its silicon -- is still often inferior to a $300 PC with a dual core CPU. For certain kinds of very parallel or very specialized DSP algorithms the FPGA will perhaps be 10x - 100x faster than you could implement with a PC programmed for the same DSP/CODEC function, but those are a rarity, and if they're important / popular functions usually you'll be able to buy a cheap PC peripheral [e.g. GPU, encryption coprocessor, RAID controller, MPEG encoder/decoder chip] to perform that task much more cost effectively than you could possibly do it with an FPGA.

    For any kind of task that is computational in essence, using a commodity PC or a dedicated [non FPGA] piece of silicon to implement it is 99% of the time the right choice.

    If you have some kind of special [i.e. you can't do it with a PC and less than $200 of added interface peripherals] electrical INTERFACE problem then a FPGA can be a very handy solution since the one useful thing they do have is a lot of (dozens to hundreds) of electrical I/O pins you can program for various purposes.

    Tragically though they're rather behind the times and they generally don't make it cost effectively possible to implement modern RELEVANT electrical interfaces in FPGAs -- no gigabit ethernet, no USB 2.0 high speed, no firewire, no SATA, no PCI express, no DDR2/DDR3 RAM, no bluetooth, no 802.11 WLAN, no PCI, so bas

  48. Mmmm information theory by tqft · · Score: 1

    http://en.wikipedia.org/wiki/Landauer's_principle

    where physics meets computation

    Don't forget the Beckenstein bound

    http://en.wikipedia.org/wiki/Bekenstein_bound

    "In Computer Science, this implies that there is a maximum information processing rate "

    --
    The Singularity is closer than you think
    Quant