Intel and Micron Unveil 3D XPoint Memory, 1000x Speed and Endurance Over Flash

MojoKid writes: Today at a press conference in San Francisco, Intel and Micron unveiled 3D XPoint (Cross Point) memory technology, a non-volatile memory architecture they claim could change the landscape of consumer electronics and computer architectures for years to come. Intel and Micron say 3D XPoint memory is 1000 times faster than NAND, boasts 1000x the endurance of NAND, and offers 8-10 times the density of conventional memory. 3D XPoint isn't electron based, it's material based. The companies aren't diving into specifics yet surrounding the materials used in 3D XPoint, but the physics are fundamentally different than what we're used to. It's 3D stackable and its cross point connect structure allows for dense packing and individual access at the cell level from the top or bottom of a memory array. Better still, Intel alluded to 3D XPoint not being as cost-prohibitive as you might expect. Intel's Rob Crooke explained, "You could put the cost somewhere between NAND and DRAM." Products with the new memory are expected to arrive in 2016 and the joint venture is in production with wafers now.

Comments

Isn't electron based, it's material based?

[Burdell]

And what material are they using? Positronic unobtanium?

Re:Isn't electron based, it's material based?

[DigiShaman]

Is it like core memory all over again?

Re:Isn't electron based, it's material based?

[Anonymous Coward]

Chalcogenide glass.

Re:Isn't electron based, it's material based?

[Adriax]

Painted red.
Everyone knows red wunz go fasta!

Re:Isn't electron based, it's material based?

[Anonymous Coward]

It has two crossing stripes. What more does it need to prove that it is faster?

Re:Isn't electron based, it's material based?

[Anonymous Coward]

Hmm i could see some kind of chemical change in a substance that changes it's electrical properties that can me measured. And if the process were reversible then then we could easily have a memory system. There are many such processes, in fact the old EPROM's often used UV light to do something similar to reset the memory, but it was a slow process that could take hours or days. Considering the many ways to manipulate chemicals with electricity and light, and the new advances in these processes every day it does not surprise me that they can make this claim. What i really want to know at this point is if the speeds boasted are just the read speeds or the write speeds, or both.

Re:Isn't electron based, it's material based?

[omnichad]

No - green marker on the edge.

Re:Isn't electron based, it's material based?

[war4peace]

FLAMES! FLAMES on the SIDE plx.

Re:Isn't electron based, it's material based?

[Anonymous Coward]

Each of those cross points are powered by a little, unborn human soul. 3D Xpoint techonolgy is enabled by magic, occult and abominations, with Intel inside.

Re:Isn't electron based, it's material based?

[DigiShaman]

Type-R stickers.

WTF is everyone talking about here? Fuck it, throw a few more Acura badges on it too.

Re:Isn't electron based, it's material based?

[Anonymous Coward]

Poop.
They are using human poop.
From butts.
Human butts.
They are using human poop from human butts.

Also, farts.

cost per bit...

[Anonymous Coward]

“You could put the cost somewhere between NAND and DRAM. Cost per bit, it’s likely to be in between them somewhere. But actual cost will result from the products we bring to the marketplace.”

I would love the cost be between NAND and DRAM but we know that won't happen. Not when there's money to be made! But seriously, this is pretty exciting to hear about a leap in computing this drastic. I really hope it plays out in real world environments.

Re:cost per bit...

[mlts]

I can see this being used two ways:

A fast SSD.

A swap device/slow RAM.

This can make things interesting for SANs, especially because it adds another tier to the disk type hierarchy.

I'd like to see it used as a cache, as well for swap and the core OS files so booting is made quicker. However, it would be useful for database index volumes as well.

Re:cost per bit...

[Bengie]

L2ARC for your SSD zpool

Re:cost per bit...

[Anonymous Coward]

The long-term goal of this technology is persistent RAM in large quantities, making external storage media obsolete and serialization only required for data exchange. However, current operating systems and programming techniques aren't up to this yet. It will take a long time.

4k video editing

[Anonymous Coward]

This will be great for 4k video editing.

Re:4k video editing

[Anonymous Coward]

Fuck 4k, we're going to 5k with this biatch!

memresistor?

[Anonymous Coward]

http://www.bbc.co.uk/news/tech...

"By contrast, 3D XPoint works by changing the properties of the material that makes up its memory cells to either having a high resistance to electricity to represent a one or a low resistance to represent a zero."

Sounds like a memresistor?

Re:memresistor?

[Anonymous Coward]

http://www.bbc.co.uk/news/tech...

"By contrast, 3D XPoint works by changing the properties of the material that makes up its memory cells to either having a high resistance to electricity to represent a one or a low resistance to represent a zero."

Sounds like a memresistor?

Yup. Phase Change Memory. Only this one is good and manufacturable. Cheaper than DRAM. It's bad for DRAM manufacturers. A non volatile PC would be nice.

Re:memresistor?

[under_score]

A non volatile PC would be nice.

No it wouldn't. Not unless we go back to having hard reset buttons on the front of our machines. The distinction between volatile and non-volatile memory is useful since we still have such shitty software full of bugs and security flaws. I wan't to be able to "reset" my machine without having to erase my hard disk.

Re:memresistor?

[Impy the Impiuos Imp]

It's just another thing for people to wipe before shutdown.

Re:memresistor?

[Anonymous Coward]

Do you even computer, bro?

Re:memresistor?

[Anonymous Coward]

Nah.

Folks will start shipping kernels with the "zero newly-allocated memory" and "zero memory at system boot" options turned on.

Problem solved.

Re:memresistor?

[Archwyrm]

No, you can still soft reset. Once the kernel gets reloaded (by powering on/off and handled by the boot loader) then effectively everything in a section of your "disk" reserved for process memory ("volatile memory") goes *poof* because the new kernel isn't tracking any of it.

Additionally with a non-volatile memory the system could be "suspended to disk" / hibernated simply by syncing all pending writes and powering off. In most cases a 1000 ms operation. Resuming would have similar performance. The machine could also resize "volatile memory" dynamically. Think growing/shrinking your /dev/mem file. You wouldn't necessarily need to have it all contiguous or represented with a single file either. Certain applications would have an expectation of contiguous memory though.

Re:memresistor?

[mattack2]

since we still have such shitty software full of bugs and security flaws.

Why not try to solve those problems _too_?

Re: memresistor?

[Anonymous Coward]

Getting hardware people to solve software bugs is likely to make the problem worse. Relying on software people to fix their own problems hasn't worked well so far either.

Re:memresistor?

[Twinbee]

In most cases a 1000 ms operation.

That seems terrible that we have to wait for a second, even assuming we're talking about NAND rather than RAM-speed here.

Re: memresistor?

[mattack2]

I'd say it has worked, at least better, for, oh, the most valuable company on the planet.

Re:memresistor?

[TheRaven64]

The difference between persistent and temporary storage is important. Being able to have 128GB of RAM in a laptop that consumes no power when not being read or written would be a huge win (one of the reasons phones have limited RAM is that DRAM draws power all the time) would be very nice.

Re:memresistor?

[Bengie]

My LCD monitor takes longer than 1sec to turn on. I'm not too concerned. 1sec is "instant" for this class of interactions.

Ohh Ohh

[Anonymous Coward]

I bet it's tiny little ferrite cores, woven onto a fine grid of wires (the X-points) with the data stored in the direction of magnetization in the beads.

That would be truly revolutionary

Re:Ohh Ohh

[ArcadeMan]

And I already know how we're going to erase that memory.

Re:Ohh Ohh

[maugle]

The diagram actually does look like the memory uses the same basic principle as magnetic core memory, but without the "magnetic core" bit, and at much higher speeds and densities.

Re:Ohh Ohh

[Locke2005]

Magnetic memory (the re-invention of core memory with much higher density) has already been done. I believe the advantage was non-volatility, just like magnetic core memory. http://www.pcmag.com/article2/...

Newegg

[Snufu]

As with any new 'pewter tech, I'll believe it when when it I see it on Newegg with >500 reviews, > 3.5 stars, and affordable for the average Jane/Joe.

Re:Newegg

[tomxor]

Usually i'd agree... there's been countless up and coming new types of memory that never make it.

But i'm cautiously optomistic here because

a) It's Intel and not some tiny obscure VC

b) they said they already have wafers and mention 2016 O_o !

no wonder they ditched their awesome SSD controllers.

Re:Newegg

[TechyImmigrant]

Usually i'd agree... there's been countless up and coming new types of memory that never make it.

But i'm cautiously optomistic here because

a) It's Intel and not some tiny obscure VC

b) they said they already have wafers and mention 2016 O_o !

no wonder they ditched their awesome SSD controllers.

It's DRAM that's in the crosshairs.

Re:Newegg

[Anonymous Coward]

1000x improved endurance over NAND isn't good enough for main memory, DRAM is still safe.

Re:Newegg

[Anonymous Coward]

> It's DRAM that's in the crosshairs.

Only to a small extent. This would reduce the need for DRAM cache of SSD data. Computers will still need huge amounts of DRAM for workspace. Workspace memory needs trillions of times more write cycles than this provides.

Re:Newegg

[PRMan]

> 4 stars...

Re:Newegg

[TeknoHog]

As with any new 'pewter tech,

this one is also based on alloyed tin.

Re:Newegg

[mr_mischief]

It honestly depends on how they measure endurance. If it's measured as 1000x the 3 million writes, then no. If it's 1000x the three-year estimated wear-out time under consumer conditions, then that's phenomenal.

Re:Newegg

[TechyImmigrant]

> It's DRAM that's in the crosshairs.

Only to a small extent. This would reduce the need for DRAM cache of SSD data. Computers will still need huge amounts of DRAM for workspace. Workspace memory needs trillions of times more write cycles than this provides.

Or more SRAM cache local to the CPU with cache lines being merrily lobbed twixt the SRAM and the magic new memory. Maybe. A non volatile PC would be neat.

Re:Newegg

[tomxor]

It honestly depends on how they measure endurance. If it's measured as 1000x the 3 million writes, then no. If it's 1000x the three-year estimated wear-out time under consumer conditions, then that's phenomenal.

It doesn't make sense to quote endurance form an consumers perspective when it's not a product yet (as either write cycle or life span) - that's all highly dependent on what the size of the device is, how well the controller is designed and how much it utilises high endurance caches to reduce wear, NAND or not - it still has an endurance where these factors will play a role.

Worst possible case TLC NAND is 1,000 cycles on the page level, that would make this memory 1,000,000 at worst which is at least 10 times better than the highest quality SLC SSD you can buy.

Re:Newegg

[tomxor]

Forgot to say, my point was even though this will make an excellent replacement for NAND in SSDs, it's not good enough for cache or system memory, these must tollerate far higher write endurance at the lowest level without and magic of remapping memory space (unless maybe this falls in line with hardened BSD O_o)

Re:Newegg

[Kythe]

Evidently, Intel is saying the endurance levels quoted aren't based on write cycles.

Re:Newegg

[tomxor]

Where is that evidence, if they are saying it's 1000x based on a consumer product then it's marketing BS.

Re:Newegg

[Bengie]

TLC VNAND has upwards of 60k cycles, but as low as 5k. Depends on how fast you want it. It's a speed-endurance tradeoff. 60k cycles is about 1/3rd the speed of the 5k cycles. With a non-linear tradeoff that causes diminishing returns on gained speed, there's bound to be a happy medium.

Crooke

[Anonymous Coward]

Too good to be true? The guy's name is Crooke...

Re:Crooke

[Anonymous Coward]

Too good to be true? The guy's name is Crooke...

Well, we don’t hold it against you that your name is Wanker.

Re:Crooke

[Anonymous Coward]

We want information. We couldn't get it by Hooke.

Whoa! Damn! Next year!

[fustakrakich]

Upgrade treadmill's running double time, and we all know how that ends up

A memristor or something else?

[cruff]

The press release is lacking a lot of details, but the storage cells are two terminal devices. Sounds similar to the memristor.

Re:A memristor or something else?

[Anonymous Coward]

It's phase change memory, so... depends on your definition of memristor.

Re:A memristor or something else?

[Anonymous Coward]

Quoth the vulture:

An Intel spokesperson categorically denied that it was a phase-change memory process or a memristor technology. Spin-transfer torque was also dismissed. Whatever it is, Intel and Micron have been developing it for about ten years.

http://www.theregister.co.uk/2...

Looks Great, Beware?

[Anna Merikin]

As the digital world quickly grows – from 4.4 zettabytes of digital data created in 2013 to an expected 44 zettabytes by 20204 – 3D XPoint technology can turn this immense amount of data into valuable information in nanoseconds. For example, retailers may use 3D XPoint technology to more quickly identify fraud detection patterns in financial transactions; healthcare researchers could process and analyze larger data sets in real time, accelerating complex tasks such as genetic analysis and disease tracking.

The final sentence quoted, I feel, should have "and government agencies seeking to search ever-larger datasets." amended.

Of course, no technological advance comes without danger of government overreach.

Re:Looks Great, Beware?

[viperidaenz]

Of course it's a government conspiracy.
Who do you think they orchestrated the phase out of tin foil and replaced it with alunimium foil?

Cost?

[ArcadeMan]

You could put the cost somewhere between NAND and DRAM.

Okay, but...

Intel and Micron say 3D XPoint memory is 1000 times faster than NAND, boasts 1000x the endurance of NAND, and offers 8-10 times the density of conventional memory.

So it's going to cost from 8 to 10 times as much?

Re:Cost?

[duckintheface]

I don't usually bother to make negative comments, but this is too much. If their claim is true, then the memory would cost the same per bit of memory and 8 to 10 times as much per unit of volume. Got it? And it is not really important how much it costs per unit volume. It's just important that the memory will not take up much space. You really need to slow down and work on your critical thinking skills. /rant

Re:Cost?

[Anonymous Coward]

I just bought 16 GiB RAM for $100, and 250 GiB nand flash for $100. This will put the price somewhere between $0.40/GiB and $6.25/GiB. So, taking an average, I'll guess that we can expect to see it priced at around $3.3/GiB. Or, about 8 times as much. :-)

Re:Cost?

[Anonymous Coward]

See the AC reply below. Rant all you want, this may very well be the true cost.

Re:Cost?

[Anonymous Coward]

Eh, for things that vary by orders of magnitude so easily, you should consider a geometric mean instead, giving $1.58/GiB. But either way it isn't good to assume a price range implies the "middle."

Re: Cost?

[bill_mcgonigle]

and $3.30 is fine. I paid way more for my SLC SSD's for my primary ZFS log device. Which are still going strong - thank you Intel. Gimme a giant one of these to swap out the mostly unused VM memory pages that are lost to containerization. It's webscale RAM. :P

Time to hit that SDXC limit for uSD

[Overzeetop]

Is that a pair of terabytes on your phone, or are you just happy to see me?

Soooo you're saying

[Bruha]

SSD's are about to go to ludicrous speed.

Re:Soooo you're saying

[Anonymous Coward]

Did you see that ludicrous display last night?

Re:Soooo you're saying

[cdrudge]

Wake me when they've actually gone plaid.

Re:Soooo you're saying

[NatasRevol]

This is it. They're using plaid technology. SSDs were already at ludicrous speed.

Re:Soooo you're saying

[Anonymous Coward]

Look at the cell structure. They *have* gone plaid.

Re:Soooo you're saying

[Anonymous Coward]

What was Wenger thinking sending Walcott on that early??

Irony

[Fire_Wraith]

I find it ironic that the post right after the announcement that Dice is planning to sell Slashdot because their slashvertisement attempts failed miserably, is a MojoKid post pushing yet another hothardware link.

Oh well, at least it wasn't Nerval's Lobster or Bennett Haselton.

Is it the start of the Diamond Age?

[RevWaldo]

So is it actually nanomolecular, repositioning atoms to represent 1s and 0s like so many pegs in a pegboard?

.

bottlenecks

[peterpolle78]

At the end of the interview some guy asked a very good question. If it is really 1000 times faster you will end up with a bottleneck as even SATA 3 is nowhere fast enough. If this memory have to be used to its fullest for a normal consumer playing games for example, you need new kind of motherboards also.

Re:bottlenecks

[wonkey_monkey]

From the BBC:

Rather than pitch it as a replacement for either flash storage or RAM (random access memory), the company suggests it will be used alongside them to hold certain data "closer" to a processor so that it can be accessed more quickly than before.

Re:bottlenecks

[silas_moeckel]

M.2 is the desktop interface for this, it supports 4 PCI 3.0 lanes at 985 MB/s per lane that is nearly 4GB/s. PCI 4.0 is not to far off and doubles that.

Re:bottlenecks

[Anonymous Coward]

http://www.overclock.net/t/1489684/ssd-interface-comparison-pci-express-vs-sata

It's almost like that problem has already been thought of. Go figure.

Re:bottlenecks

[willworkforbeer]

And this will finally lead to the steeper curve on the desktop, etc. replacement upgrade cycle that hardware builders have been waiting for, probably in late 2017.

Re:bottlenecks

[Tower]

You just attach it directly to the PCIe bus with a dedicated controller like PCIe SSDs today rather than through the existing SATA ports http://www.engadget.com/2015/0... . Over time, the other interfaces will catch up. x4 Gen3 PCIe goes pretty quickly...

Re:bottlenecks

[Tumbleweed]

http://www.overclock.net/t/1489684/ssd-interface-comparison-pci-express-vs-sata

It's almost like that problem has already been thought of. Go figure.

Plus new Intel chips (I think) have more PCI-e lanes. I'm hoping that rumor is true, anyway.

Re:bottlenecks

[Anonymous Coward]

SATA?

WTF are you on about, boy?

This isn't the 90s.

Re:bottlenecks

[Anonymous Coward]

SATA Revision 1.0a was released on January 7, 2003 ; per wikipedia.

It just might be time to quit your day job.

Re:bottlenecks

[Forever Wondering]

SATA 3.2 (aka SATA Express) is a connector change, but is actually PCIe. PCIe is already fast enough. IIRC, Apple hooks up some SSDs directly through PCIe.

And, PCIe can actually go "off board" via a cable (since PCIe is based on separate upstream/downstream lanes and differential line drivers). Also, PCIe 4.0 will have a transfer rate of 31.5 GB/s, yet be fully backward/forward compatible.

Intel already has a CPU package that has two substrates wire bonded together, one for CPU and one for memory. When I saw this, I assumed it would be to accomodate HP's memrister memory. But, now, it's [obviously] been planned for this new type of memory.

Re:bottlenecks

[Locke2005]

Hey! I've still got a half-dozen boxes with IDE-only disks! (Would you like one? I'm willing to part with them for cheap!)

Re:bottlenecks

[im_thatoneguy]

One of the articles says the initial products will be PCIe and NVMe.

The Toms Hardware Article is much better:
http://www.tomshardware.com/ne...

Intel indicated the new memory would connect to the host system via the PCIe bus, which is yet another reason that Intel and Micron have been vocal proponents of NVMe. The NVMe protocol was designed from the ground up for non-volatile memory technologies, and not NAND in particular. Now it is apparent that Intel and Micron were laying the groundwork for something more as they developed the new protocol.

Clearly this memory will necessitate new motherboards. But I would also love to see this on Nvidia cards.

Seems Not

[DumbSwede]

from the The Register

An Intel spokesperson categorically denied that it was a phase-change memory process or a memristor technology. Spin-transfer torque was also dismissed. Whatever it is, Intel and Micron have been developing it for about ten years.

Re:Seems Not

[Anonymous Coward]

They can deny all they want - intel has been filing patents on a new type of GST PCM left and right over the last 6 years.

Re:Seems Not

[Anonymous Coward]

Probably PCM based off of this job opening from last year: http://idaho.jobing.com/micron-technology-inc/senior-cell-engineer-perm-job

Re:Seems Not

[mr_mischief]

Nanoscale slider switches? ;-)

Seriously, though, it's some sort of material change according to what little information has been released.:

These columns contain a memory cell and a selector, but the real innovation is that unlike other technologies, which store data by trapping electrons in insulators (and other electron trapping techniques), 3D XPoint stores data by using the property change of the material itself. This bulk material property change utilizes the entire portion of the memory cell, which increases scalability and performance.

-- Tom's Hardware

What's really interesting is the PDF with one diagram showing Xpoint sooner and then 3D XPoint on the 2018-2019 timeline at Semicon Taiwan that later has a diagram much similar to Intel/Micron's diagram. It appears to be showing a variable resistor (potentiometer) then a diode between the word line and bit line crossbars.

If they are building a materials-based variable resistor that gets written to be more or less resistive based on voltage what are they calling that process? It needn't be chalcogenide, but it sure sounds like some other sort of phase change to change the resistance. If it is memory that adjusts its resistance based on past voltages and uses that resistance for reading the value, that sounds like a memristor. (According to Chua all PCM, ReRAM, and MRAM are memristors.)

I think perhaps Intel and Micron are saying it's not PCM and it's not memristors just so people don't confuse it with other attempts at similar but different approaches.

Re:Seems Not

[Anonymous Coward]

To such speed and endurance level I think this is a variation of Filamentary Memory (CB-RAM). Definitelly not STTMRAM nor PCM

Re:Seems Not

[Sir Holo]

In one of their PR presentation vids, they stated: "changes the properties" of the "bulk material."

That implies PCM very strongly over ReRAM (memristor).

Last I checked (a while ago), PCM was slow. The smaller the faster, though.

Re:Seems Not

[mr_mischief]

Could be the Mott transition. Could be filaments. Could be a different PCM method than what's been done before, although like you I have my doubts considering the durability claims. In any case, any of those resistive methods would by some definitions fit under "memristor".

Comment removed

[account_deleted]

Comment removed based on user account deletion

Ram replacement?

[duckintheface]

There has been some discussion http://bit.ly/1SLtYAh that 3D XPoint might be a replacement for RAM in mobile devices because it is "ram-like" in speed and low power due to the fact that it's non-volatile. If this can replace RAM and NAND in phones and tablets, it will be a major milestone in the history of computing.

Re:Ram replacement?

[Anonymous Coward]

At "up to" 1000x the endurance of NAND? Who wants RAM cells that die after "up to" 300k writes?

Re:Ram replacement?

[duckintheface]

If we are talking MLC NAND, you are off by a factor of 10. http://www.anandtech.com/show/...

But since the XPoint cells are individually addressable bit by bit, the comparison is probably to SLC, in which case the relevant number of P/E cycles for XPoint would be 10E8 and you are off by a factor of more than 33,000.

Re:Ram replacement?

[omnichad]

The 1000x durability wasn't based on writes alone. In fact, they even say it's "not significantly impacted by the number of write cycles"

Re:Ram replacement?

[Anonymous Coward]

1 Performance difference based on comparison between 3D XPoint technology and other industry NAND
2 Density difference based on comparison between 3D XPoint technology and other industry DRAM
3 Endurance difference based on comparison between 3D XPoint technology and other industry NAND

They don't actually specify *what* NAND.
So assuming typical marketing weasels, that means it's 1000x the worst TLC they could find anywhere - and that's typically rated at 300 P/E cycles.

But since the XPoint cells are individually addressable bit by bit, the comparison is probably to SLC

Yes, they totally wouldn't write "1000x the endurance of industry-leading IMFT SLC NAND" if that were the case...

in which case the relevant number of P/E cycles for XPoint would be 10E8 and you are off by a factor of more than 33,000.

Would you like a bridge with that?

Re:Ram replacement?

[duckintheface]

Hmmm. You do have a point. :)

Re:Ram replacement?

[Anonymous Coward]

Even if 10e8 is correct, that's 1 second at 100MHz to completely trash a bit. You'd be sure to find someone stupid who left a for loop "timer" which does just that in their JS function on the internet.

Re:Ram replacement?

[duckintheface]

Also note that the cost per bit for XPoint is lower than for existing DRAM. If the endurance is not cycle related and the speed is close and the power use is lower, this would be a clear improvement.

Re: Ram replacement?

[bill_mcgonigle]

Who cares? Your carrier will still stop shipping security updates before your RAM error map is full.

Re:Ram replacement?

[MSG]

I think you mean 333 in the latter case?

Re:Ram replacement?

[duckintheface]

Yes, you are correct. But now I have seen that Micron says the endurance is not related to write cycles. This gets better and better.

Re:Ram replacement?

[im_thatoneguy]

Don't forget that when new technology is announced they always list the upper limits of a technology. So it has 1,000 times the potential of current best-case-scenario NAND but you won't see that 1,000 performance boost for 3 decades when they tap out the technology's maximum potential.

Re:Ram replacement?

[cheesybagel]

Material based makes it sound like the Ovonics (Phase-change) memory that has been bandied about since like forever by Intel.

The performance seems to be more in line with MRAM though. I suspect some of those claims they make are bullshit. But we'll see.

Re:Ram replacement?

[cheesybagel]

This could be it: Resistive random-access memory i.e. ReRAM.

Quoting Wikipedia:

"The basic idea is that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path formed after application of a sufficiently high voltage. The conduction path can arise from different mechanisms, including vacancy or metal defect migration. Once the filament is formed, it may be reset (broken, resulting in high resistance) or set (re-formed, resulting in lower resistance) by another voltage. Many current paths, rather than a single filament, are possibly involved."
"Compared to PRAM, RRAM operates at a faster timescale (switching time can be less than 10 ns), while compared to MRAM, it has a simpler, smaller cell structure (less than 8F MIM stack)."

Re:Ram replacement?

[sectokia]

Modern systems have various cache levels. The switching would be done in blocks and could be ware levelled. Flipping a bit at 100mhz is never going to leave the cpu.

Re:Ram replacement?

[Bengie]

The switching would be done in blocks and could be ware levelled

With all of the issues wear leveling has created with SSDs, I would be very skeptical about wear leveling in system memory. And memory has much different write characteristics than HDs. Memory is typically written bytes at a time, not large blocks. This would cause massive write amplification for any block based wear leveling.

Of course this memory is bit addressable, so the wear leveling blocks could be made very small, but as your blocks get smaller, the meta-data overhead to manage the blocks approaches the size of your actual data.

Re:Ram replacement?

[Bengie]

Flipping at bit at 100mhz would burn out your L1 cache's SRAM in one year.

put me name down!

[ihtoit]

I'll have some o' that!

How does it compare to RAM, though?

[wonkey_monkey]

Intel and Micron say 3D XPoint memory is 1000 times faster than NAND, boasts 1000x the endurance of NAND, and offers 8-10 times the density of conventional memory.

How does the speed compare to conventional memory, though?

Re:How does it compare to RAM, though?

[Kjella]

How does the speed compare to conventional memory, though?

Well, SSD typically have speeds in the range of 100s of MB/s and graphics cards in 100s of GB/s so if it's 1000 times faster than NAND I'd say pretty close.

Re: How does it compare to RAM, though?

[Anonymous Coward]

You're neglecting latency.

Re:How does it compare to RAM, though?

[Anonymous Coward]

The press release says *up to* 1000x faster than NAND. What's the very slowest NAND that has ever existed? Multiply that speed by 1000.

Re:How does it compare to RAM, though?

[PhrostyMcByte]

SSDs get their speed from being essentially a RAID-0 of several NAND chips. Individually, they're a good bit slower.

The librarian will be pleased.

[bobmajdakjr]

Sounds like a Jedi Holocron. Just sayin'

Is it going to matter much?

[Guspaz]

We've already got non-volatile memory with extremely high endurance on the mass market (SLC NAND), so what you basically get out of this stuff is "It's like flash, but much faster."

The question becomes, what is enabled by having much faster flash memory? Sure, you might see some minor power efficiency increases in mobile devices if you don't need to keep the RAM powered, but that's not exactly world changing.

I'm not saying this isn't good, just that people are hyping it up, and I'm trying to determine what it might enable that is worthy of hype.

Re:Is it going to matter much?

[MobyDisk]

Good point. When they say this is faster and has better endurance than NAND, did they mean TLC, MLC, or SLC? You are right that SLC NAND has good endurance and speed, but maybe this is better? The ultimate memory would be memory that is fast enough to eliminate the separate concepts of "RAM" and "storage" entirely, and make it one thing. Then instead of having 8GB of RAM and 2TB of storage, you would have 2TB of "storage RAM." This might be fast enough and reliable enough for that. Or maybe it is close enough that DRAM is used merely as a cache. No more save buttons. No more need to read a file into memory before processing it. You would just use memory mapped I/O for everything.

Re:Is it going to matter much?

[Kjella]

Even if it's a thousand times more durable than NAND it's not much in a loop, if you just write to the same memory location over and over with DDR4 you can write every 5 cycles @ 1.25ns/cycle = 160,000,000 writes/second. I would think the greatest advantage would be a write cache which could return ~1000 times faster from a flush() making sure it's committed to non-volatile memory. The SSD can then work "behind the scenes" to move it to slower SLC/MLC/TLC.

Re:Is it going to matter much?

[Guspaz]

But at that point you're basically just replacing the current approach of a supercapacitor and DRAM with some of this new stuff. You might save a few bucks, but that's a relatively small difference.

Re:Is it going to matter much?

[Guspaz]

Would that really make much of a difference? Computers already act, for the most part, like they have non-volatile memory. When you shut the lid on a laptop, it writes RAM to disk and goes to sleep. If you wake it up without having cut the power, it wakes up quickly. If you pull the power/battery, it takes a few seconds longer. In either case, it wakes up where it left off.

There is also nothing stopping developers from doing what you describe right now. Storage is fast enough that changes to most files can be saved directly to disk as they're made. When working in the cloud, this sort of "every keystroke saved" thing is already the norm.

I'm not trying to say that really fast and durable non-volatile memory wouldn't make some improvements in some places, but generally the workarounds currently in use have gotten so good that the impact would be relatively minor.

Re:Is it going to matter much?

[Jheaden]

Isn't NAND approaching its theoretical limit on density? From the article it sounds like the biggest benefit will be the increased density

Re:Is it going to matter much?

[Jheaden]

On the other hand the article says 10x the density of conventional memory. Not sure how that compares to NAND density

Re:Is it going to matter much?

[MobyDisk]

Even if it's a thousand times more durable than NAND it's not much in a loop

That's why I said to use the DRAM as a cache. But maybe it just isn't good enough even with that.

Re:Is it going to matter much?

[MobyDisk]

Storage is fast enough that changes to most files can be saved directly to disk as they're made. When working in the cloud, this sort of "every keystroke saved" thing is already the norm.

Not quite: Just open a 500MB word document and insert a single character at the top of the file. Google Docs can't even handle this kind of file - delays are seconds to minutes. Even if it could work with a word processor, it won't work with everything. When I play MineCraft, it takes 30 seconds to save my changes. You can't commit my actions to disk at 60fps. Same thing with Photoshop or SolidWorks.

However, you made me realize that in-memory structures are vastly different from structures on disk to avoid this very problem. We might still have this problem even if storage was as fast as RAM, because our disk formats are usually optimized for size, while our memory formats are optimized for performance.

Re:Is it going to matter much?

[viperidaenz]

SSD's are fast because they have 8 or 16 chips in parallel.
If you want to cram that in to a smaller form factor, you can't.

If you can figure out an interface, you could have a 128GB SSD in the form factor of a micro SD card that performs better than current NAND based SSD's

Re:Is it going to matter much?

[Locke2005]

They are already talking about running massive data servers entirely in flash: https://newsoffice.mit.edu/201... I'm thinking using this instead would be an obvious improvement. Of course, that assumes they actually deliver decent price-per-byte of memory. You'll probably see this first in massive NSA data farms... or rather, it will probably be used in them, and nobody will tell you about it, so you won't see it at all.

Re:Is it going to matter much?

[viperidaenz]

As long as your super cap is large enough to power the device while the entire DRAM cache is written to NAND (or your DRAM cache is small enough)
That could also mean performing erases as well as additional writes, to fit new data where old data used to be.

Or you could reduce your DRAM cache significantly or even remove it entirely and add some of this new memory to get faster sustained sequential write and less wear on the NAND.

Re:Is it going to matter much?

[Guspaz]

> Not quite: Just open a 500MB word document and insert a single character at the top of the file.

COW filesystems would have no problem with that scenario, especially when they have dynamic block sizes. There might still be some nasty write amplification (such as writing kilobytes of data to insert the one character), but it wouldn't be any slower than appending one byte to the end of the file.

Re: Is it going to matter much?

[Anonymous Coward]

The SSD DRAM is usually used for tracking the sector allocations, very little is used to buffer incoming writes on a modern drive.

Re:Is it going to matter much?

[swb]

It sure sounds like the outcome could be cheaper, faster, more reliable and possibly even denser storage. How about a 10 TB drive that can saturate a SAS link for the price of a consumer 1 TB SSD now? It sounds appealing to have 40 TB of home storage at performance levels that would make a $200k enterprise storage buyer jealous.

Or that makes for 240 TB enterprise san shelf for the price of an existing 10 TB flash/rust hybrid shelf at speeds that will melt 16 gig fiber channel?

And who knows what value fast/cheap storage would have in terms of software applications. Maybe it would enable machine learning in more of a real-time basis by enabling analysis of vast datasets on demand.

Re:Is it going to matter much?

[Guspaz]

Why would you expect it to be cheaper or denser than NAND? IMFT says it'll be more expensive than NAND, and even if the cost drops over time, so too will the cost of NAND.

Re:Is it going to matter much?

[im_thatoneguy]

If I can buy a TB of RAM that's maybe DDR4 speeds but not DDR5 speeds but at say somewhere between NAND and DRAM pricing that would be huge.

Also incredibly useful for something like a phone where you might want to shoot 4k video. The CPU would have a hard time processing that but if you buffered to say a 64GB cache and then processed you could shoot highspeed for a minute instead of 2-3 seconds.

Re:Is it going to matter much?

[Guspaz]

Why would most people need a terabyte of RAM? There is such a thing as diminishing returns, and you have to be doing pretty crazy stuff to need more than 32GB or so. Ultimately making RAM cheaper might save a few bucks, but that's not justifying the massive hype that non-volatile memory has had over the years.

In terms of 4K recording on a phone, video encoding is done in hardware, not software, and no amount of cache is going to solve that. If you're talking about highspeed, your 64GB cache would store around 11 seconds of raw 240FPS 4K video, and if you're encoding it first, then the speed of the storage isn't really the bottleneck.

Re:Is it going to matter much?

[Forever Wondering]

This memory is byte addressable (e.g. RAM-->random access memory), so no "block erasure" needed in the write cycle as in NAND flash. It's also 1000x faster than NAND flash (at 2ms), so access time should be about 2us, and no wear leveling needed. It also has a higher memory density--9x if you believe the block diagram. It can also be stacked 3D, which, IIRC, flash can't [or hasn't been] up to this point.

There are a number of other non-volatile "solid state" memory technologies in the works: magneto-resistive (memrister) RAM (with an access time of L2 cache), ferroelectric RAM and carbon nanotube memory (with a switching time on the order of picoseconds).

These are a few years off--depending. But, this new memory is slated to go into full production in 2016. Cost is a bit more than DRAM, but less than flash.

With regard to SSDs, we're at a similar point just before core memory got replaced by DRAM, some 30 years ago. It should also be noted that Intel is a major NAND flash developer/manufacturer/proponent, so if they're coming out with this in production volume, it will [quickly] erode the market for their own NAND flash business and they seem to be happy to do this.

Re:Is it going to matter much?

[im_thatoneguy]

I'm rendering a project right now that has over a hundred instanced trees in a forest. So the forest is pretty much instanced, but each tree instance is around 1GB of memory and there are about 12 individual models. Then once I get into terrain geometry and villages and trains and that isn't even getting into the volumetric sparse oct-trees for like smoke from chimneys... etc.. anyway long story short 32GB is already gone *with* massive scale instancing.

Re:Is it going to matter much?

[im_thatoneguy]

Oops I mean "over a hundred million instanced trees" obviously haha.

Re:Is it going to matter much?

[Guspaz]

Samsung started shipping 3D NAND in consumer SSDs in mid-2014 with the 850 Pro. It used a 32-layer 40nm process. It was their second-gen 3D NAND, with their first-gen 24-layer product released in 2013 for enterprise SSDs.

IMFT and Toshiba are both sampling 3D NAND, 32-layer for IMFT and 48-layer for Toshiba. Neither is saying what size, but some googling indicates the consensus is somewhere between 35nm and 50nm.

You're still going to need to do wear leveling. If you can write a byte every 2us, but you only have 1000x the endurance of NAND, you've only got 3 million write cycles, which you could burn through in around 6 seconds for a single byte. And since per-byte wear leveling is nuts, you're back to using the same sort of blocks as NAND does.

In terms of quickly eroding the market for NAND, if this stuff is still significantly more expensive than NAND, I don't see how it would have much of an impact. They're saying the cost is "in between there somewhere" in terms of DRAM and NAND. For consumer products, NAND is at ballpark $0.38 per gig, and DRAM is at around $5.00 per gig. So depending on where XPoint is in that range, it could either have a huge impact or a small impact.

Then again, $0.38 is MLC or TLC, and SLC is obviously going to cost a lot more than that. So maybe this new stuff might be more competitive with SLC and supplant that, but the SLC market is probably pretty small: Intel doesn't even use it in their enterprise drives anymore.

I would imagine where this stuff will have the biggest impact is in completely new use cases (places that needed non-volatile memory and so had to use flash, but were significantly performance bottlenecked), or in places where a combination of NAND/DRAM/supercapacitors are currently used. I can see enterprise use being a thing.

Re:Is it going to matter much?

[Guspaz]

You're far from a typical user, however, and 100 petabytes of this new stuff would be just as cost prohibitive as 100 petabytes of NAND or DRAM...

Re:Is it going to matter much?

[Forever Wondering]

NAND will eventually hit the "die shrink" wall. Since this new Intel memory apparently fits nine cells in the same die area as a NAND cell, it will eventually take over from NAND.

As a side note [to show I'm not totally against NAND flash], a Japanese researcher found, about a year ago, that if you add a heating element to a NAND cell [similar to the one in ferroelectric memory], you can "boil off" the excess trapped charge and eliminate the "wear out". He believed that this was a trivial addition to existing NAND process tech [and could have been done five years earlier] and would take less than a year to enter full production. Note further, that the "boil off" operation only needs to be done periodically, say once every six months or so [it resets the "wear out" cycle].

Intel, historically, charges through the nose for new tech like this [they certainly charged a lot for NAND when it came out], then eventually drops the price. When the 80386 came out, they were charging $750 per chip, even though the chip was designed to be sold at a handsome profit at $35/chip. So, I suspect they will keep the price high, serve the market high end, and then drop the price, increase the speed, etc. if other competing technologies look like they'd overtake it [and when their own NAND factories reach EOL, etc.]

My long term bet is [still] on Hewlett Packards's [or others] memristor memory. Back in Oct 2011, they were planning an SSD replacement within 18 months, followed by a DRAM replacement in another 18, and then on board CPU memory later. They've since dialed that back to 2018 for SSD. See http://www.theregister.co.uk/2... (Also, wikipedia on memristor). They must believe that they can compete effectively with flash, even with projected NAND advances. Meg Whitman recently got a presentation on memristor from the engineering team, and when it was all over, she said to the finance VP [I'm paraphrasing] "Find them whatever money they need".

Disclaimer: I have a special fondness for memristor because the guy who first postulated its existence was Leon Chua [at Perdue]. My EE professor was one of Chua's students [and used to tell amusing anecdotes about Chua].

Re:Is it going to matter much?

[Anonymous Coward]

Unless it starts at $100/GB when released, it shouldn't take long for the price to drop down below $1/GB at which point it becomes an interesting alternative to SSDs for performance-critical applications (due to the higher speeds / responsiveness). There can be as much as a 4x difference between how SSDs perform across the board. Something that is 100-1000 times faster and is permanent storage would be still be a game changer, even at $10/GB.

Re:Is it going to matter much?

[sectokia]

Yeah but your method is inefficient. 100 million for a display of I'm guessing not even 6 million pixels.

Re:Is it going to matter much?

[swb]

I might expect some cost reductions because the increased durability will lessen the amount of excess memories needed for remapping when cells go bad. And don't larger drives use NAND chips in parallel for speed? If you can simplify packaging by using a single chip you might cut costs there, too.

If its as supercalifragilisticexpialidocious as they say it is, you might also expect enterprise adoption to increase, lowering the cost of NAND by cutting demand or resulting in more reliable NAND.

It's also hard to know what kind of process improvements may take place over time.

Either way, I think cheap, durable and fast-or-faster-than-flash storage is pretty exciting, so I guess I'm willing to be optimistic. Storage is so expensive and so relatively slow that something that pushes the envelope on speed and cost just seems to have a lot of potential.

Re:Is it going to matter much?

[epine]

COW filesystems would have no problem with that scenario, especially when they have dynamic block sizes.

What file system do you have in mind? It's certainly not ZFS.

Furthermore, supporting dynamic block size poses real problems for efficient random access. For this reason, almost all file systems support fixed-size payload blocks, and only provide for dynamic on-disk storage size after compression.

If you have any clue what you're talking about, this file system technology is news to me.

Re:Is it going to matter much?

[Guspaz]

No, you're right. Looking into it, there appears to be no reason why what I've described couldn't happen at the ZVOL layer, but none of the layers on top of it support it. An exception would probably be block-sized inserts in the middle of a file on a ZFS filesystem that has dedupe enabled. As the "new" blocks were written out for the rest of the file, the filesystem would see that they were identical to existing blocks on disk and just point to them instead.

Of course, dedupe on ZFS is a terrible memory hungry monster that should be avoided unless you can afford to throw ridiculous amounts of RAM at it. Enterprise customers might have hardware that can feed the beast, but a home user sticking three 4TB drives in a raidz vdev would be hard pressed to feed it the 60GB of RAM that those few disks would require.

Re:Is it going to matter much?

[Bengie]

if you just write to the same memory location over and over with DDR4 you can write every 5 cycles @ 1.25ns/cycle = 160,000,000 writes/second

And you'd both burn our your CPU's SRAM and DRAM in under a year. They're only rated for around 10^16 writes.

Re:Is it going to matter much?

[Bengie]

As the "new" blocks were written out for the rest of the file, the filesystem would see that they were identical to existing blocks on disk and just point to them instead.

That only works if the newly resulting blocks are the same. If you cause all of the data to shift, then all of the data in the blocks could also shift creating blocks are that not the same. Flipping bits is one thing, but changing length is another.

Re:Is it going to matter much?

[Bengie]

2ms is a few magnitudes too high for NAND. Google is returning back latencies of 5us-25us for NAND.

Re:Is it going to matter much?

[Guspaz]

Re-read the text right before what you'r replying to. Block-sized inserts. If you shift all the data by exactly one block, then the blocks would be the same.

Re:Is it going to matter much?

[Forever Wondering]

Thanks for the info. Honestly, I can't remember where I got the 2ms figure [even though it was within a day or so--sigh]. It may have been from somebody else's post, or I misread a wikipedia entry, or another article (e.g. arstechnica, or [gasp] cnn).

This is even better. 1000x faster than flash (at 5us) means 5ns which brings 3D/XPoint into the realm of DRAM [or beyond]. I've done a quick check and at least two different pages peg DRAM at 50ns [don't quote me--obviously :-)]. In fact, I just found another page that pegs DRAM at 10ns. This is still 25x slower than a 2.5 GHz processor, which is enough to justify the internal cache.

Most DRAM memory systems (e.g. DDR2, DDR3, etc.) take X time to produce the first cache line, but can produce the next N cache lines (from different interleaved banks) in short order as they've been fetched in parallel (they assume a linear access pattern as for a simple loop through an array). This makes it harder to compare apples-to-apples given the sketchy info Intel has released at this point.

I reread the fine print on one of Intel's slides and it just says that XPoint has negligible endurance problems. So, no wear leveling needed. I've refrained from buying laptops that have SSDs (based on flash) because of this. I was an engineer in a company where the marketing dept pushed for flash instead of hard drive (some 10+ years ago). They wanted it because it was sexy and fewer systems arrived at the customer with DOA hard drives due to jostling in shipment. But, these systems would fail at random times due to wearout (despite wear leveling and some additional mitigation we were doing). Eventually, the CEO said to me: "I guess we made a mistake using flash". I said: "Yup, you should have listened to your engineers" [our attitude was flash will be the choice but not now].

Since the cost hinted at [between DRAM and flash] means that XPoint will have a lower cost than DRAM [at higher density]. So, if the access times are at DRAM or better [or even slightly slower], XPoint will make a DRAM replacement. Since DRAM/flash cost differences are something on the order of 10x per bit, if XPoint's cost is closer to flash, it's also a flash replacement, even if it's a bit more expensive.

XPoint seems to be much simpler/smaller in cell design [no transistor in the cell], no complex timing sequences as in DRAM, no complex wear leveling or block access as in flash. The simplicity of designing a system around XPoint can make it very attractive in a variety of use cases. The claim that this will open up design of systems we haven't thought of yet isn't mere hype.

In short, if only half of what they've said about XPoint is true, it is a big deal.

Re:Is it going to matter much?

[Bengie]

Not just block sized inserts, but also inserts at block boundaries. And block sized inserts only works for dedup. CoW won't help with dedup off if the blocks shift, but no issues flipping bits or appending.

But is is crystalline?

[DarthVain]

But is is crystalline and available in pretty glowy colours? Because otherwise I don't want it. For too long we have been waiting for our 3D crystals that are memory devices in science fiction, and now we better get 'em!

Retention time?

[Tapewolf]

How long is it able to retain the data and under what range of conditions? Currently this is one of the big problems with flash, where small-process TLC memory is so fragile that reading it damages the contents, much like core.

Finally, Data Crystals!

[Anonymous Coward]

A 3D memory storage using a 'crosspoint connect' structure? Sounds like the 3D addressable stuff of SF (think Babylon 5, if you're old enough). Wow I hope this isn't vapourware.

Nano-RAM (NRAM)?

[Anonymous Coward]

Sure sounds like they licensed NRAM from Nantero.

http://hardware.slashdot.org/story/15/06/02/2056228/fabs-now-manufacturing-carbon-nanotube-memory-which-could-replace-nand-and-dram

Yay!

[eyepeepackets]

Finally, a solid replacement for NAND: I was past the point of despair.

The patent points to PCM

[smaddox]

The patent points to PCM. Maybe they're applying the same X-Point structure to a different material system, though. I'm guessing, however, that they're just saying it's not PCM in an attempt to dodge other patents.

PalmOS

[DrYak]

However, current operating systems and programming techniques aren't up to this yet. It will take a long time.

PalmOS has been 100% RAM-only from the original Palm Pilot all the way up to Palm Thungsten III (Palm T5 with Flash, and Palm Live with a micro drive where the first to actually have a permanent main storage).
Everything is in-RAM, everything is stored in in-RAM databases. Data saving is immediate, etc.

(Also, although not so extreme:
lots of embed system, usually Linux-based, only have a minimal amount of ROM as sole storage and mainly work using RAM. Though they aren't completely in-RAM oriented and still use the concept of "files" and "storage", and thus make use of ramdisk (usually tmpfs) to hold files.
Still, that also machine which mainly count on RAM storage).

Memory paritions.

[aNonnyMouseCowered]

The distinction is useful but can be adapted as part of a unified volatile/non-volatile memory/storage technology. I'm thinking of a memory partitioning scheme similar to the way we already divide hard disks.

Game changer

[Anonymous Coward]

I for one, am excited.

NV, without the block-write difficulties and unwieldiness of Flash.
I wonder what the power usage/thermal characteristics are like, and the reliability.

Thank me

[marciot]

You can thank me for this being announced now, because I *just* bought a SSD last week. You're very welcome.

Likelyhood of ACTUALLY seeing it in stores?

[AbRASiON]

Even if it's intel, rather than a tinpot outfit, I think it's very unlikely we're going to see this product on shelves ready to use in less than 4 to 6 years.

What's it for also? It's going to wear out? So using it as standard RAM is probably not practical. Should it simply be a replacement to SSD's? an even faster primary storage device?

Re:Likelyhood of ACTUALLY seeing it in stores?

[sectokia]

one use is as a ram cache. You could have 16g dram swapping out to 128g of this new memory, with the swaps in ware levelling blocks. However I think it's more likely that this tech has the potential to be in smaller packages. For example it could fit into micro SD sized cards while retaining huge speeds.

MRAM?

[Taco Cowboy]

This '3D Xpoint memory' sounds very much like MRAM as described by the following article

http://spectrum.ieee.org/semic...

Last year (2014) Samsung reportedly was collaborating with 15 partners in developing similar spintronic MRAM memory technology

http://www.mram-info.com/samsu...

Hynix and Toshiba also partnered to develop their own version of MRAM

http://phys.org/news/2014-04-f...

In less than 5 years we might get to enjoy the fruits of the labor of the thousands of researchers who have been working very hard to make the spintronic dream come true, and I for one, wish to take this chance to thank them for their hard works!

For when?

[Anonymous Coward]

And will be available to users in 1000 years?

Rob Crooke?

[Anonymous Coward]

How ironic that a vague cost range is provided by a person named "Rob" with a last name of "Crooke". Gives me confidence that I'm getting a good deal.

addendum: web apps

[DrYak]

as an addendum:

modern web-apps don't think too much about how exactly data is *exactly* written on disk as ordered bits.

the global way of thinking, the high-level at which programmer design the architecture of their system, tend to be around key-value store: "I want this piece of data to be associated with that key"

i.e.: ...I want to be able to retrieve it later. I want it to be in a pemanent store. But I don't give a damn abou how this store works and how the data get written to a file on a disk. Or even if there are file and the media is a disc, or if some more exotic form of storage are involved.
In fact once I call the API to store my object, the object could as well continue to live in-memory for long term storage.

Either because it's 2025 and we use some exotic form of memory storage, or because it's 2005 and we run on an OS that has exclusively RAM as storage and never erase a portion of it, even across reboots.

But most high level approach of application could very well be ported to this new kind of storage because their are not at a level where it matters.

Or in other words:
- it's sqlite's job to get re-written to take advantage of in-RAM permanence.
- your app is still going to address sqlite all the same and not give a fuck of how the data is stored behind the scene.