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To Keep Pace With Moore's Law, Chipmakers Turn to 'Chiplets' (wired.com)
As chipmakers struggle to keep up with Moore's law, they are increasingly looking for alternatives to boost computers' performance. "We're seeing Moore's law slowing," says Mark Papermaster, chief technology officer at chip designer AMD. "You're still getting more density but it costs more and takes longer. It's a fundamental change." Wired has a feature story which looks at those alternatives and the progress chipmakers have been able to make with them so far. From a report: AMD's Papermaster is part of an industry-wide effort around a new doctrine of chip design that Intel, AMD, and the Pentagon all say can help keep computers improving at the pace Moore's law has conditioned society to expect. The new approach comes with a snappy name: chiplets. You can think of them as something like high-tech Lego blocks. Instead of carving new processors from silicon as single chips, semiconductor companies assemble them from multiple smaller pieces of silicon -- known as chiplets. "I think the whole industry is going to be moving in this direction," Papermaster says. Ramune Nagisetty, a senior principal engineer at Intel, agrees. She calls it "an evolution of Moore's law."
Chip chiefs say chiplets will enable their silicon architects to ship more powerful processors more quickly. One reason is that it's quicker to mix and match modular pieces linked by short data connections than to painstakingly graft and redesign them into a single new chip. That makes it easier to serve customer demand, for example for chips customized to machine learning, says Nagisetty. New artificial-intelligence-powered services such as Google's Duplex bot that makes phone calls are enabled in part by chips specialized for running AI algorithms.
Chiplets also provide a way to minimize the challenges of building with cutting-edge transistor technology. The latest, greatest, and smallest transistors are also the trickiest and most expensive to design and manufacture with. In processors made up of chiplets, that cutting-edge technology can be reserved for the pieces of a design where the investment will most pay off. Other chiplets can be made using more reliable, established, and cheaper techniques. Smaller pieces of silicon are also inherently less prone to manufacturing defects.
Chip chiefs say chiplets will enable their silicon architects to ship more powerful processors more quickly. One reason is that it's quicker to mix and match modular pieces linked by short data connections than to painstakingly graft and redesign them into a single new chip. That makes it easier to serve customer demand, for example for chips customized to machine learning, says Nagisetty. New artificial-intelligence-powered services such as Google's Duplex bot that makes phone calls are enabled in part by chips specialized for running AI algorithms.
Chiplets also provide a way to minimize the challenges of building with cutting-edge transistor technology. The latest, greatest, and smallest transistors are also the trickiest and most expensive to design and manufacture with. In processors made up of chiplets, that cutting-edge technology can be reserved for the pieces of a design where the investment will most pay off. Other chiplets can be made using more reliable, established, and cheaper techniques. Smaller pieces of silicon are also inherently less prone to manufacturing defects.
Our of all places on the Internet I want at least /. to admit that there has never been Moore's law - it was a mere observation": from Wikipedia, "Moore's law is the observation that the number of transistors in a dense integrated circuit doubles about every two years".
Whoever decided to call it a "law" was a moron and now we have this idiocy repeated every news story. And since it's not a law, we could simple move on and realize that physics simply doesn't allow it to exist.
Not saying it can't work but this sort of thing seems to crop up every few years. At least at chip level it seems to do better than the ever recurring schemes for code reuse.
Bicycle reinvented. These used to be called co-processors.
Did anyone read the headline as being about Chiclets? The chewing gum, not the keyboard.
It seems that the semiconductor industry goes through these cycles periodically. Whenever they run up against limits to single chip integration, they go back to this strategy of wiring together separate chips together. Ultimately, this proves to be inefficient and once technology improves, they return to putting everything on a single chip.
I don't read your sig. Why are you reading mine?
Hitting up against Moore's law is probably the best thing for the chip industry. It's going to force them to innovate.
The chipmakers do not follow Moore's Law. Moore's Law follows the chipmakers.
The do not do it "to keep up" to that law. There is no "Moore's Judge" that will spite them if they do not do it.
Don't fight for your country, if your country does not fight for you.
They just use much smaller sockets now. :)
Yeah! It means the Amiga is making a comeback!
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Looks like they've reinvented the IBM 3081 mainframe from 40 years ago:
The elimination of a layer of packaging was achieved through the development of the Thermal Conduction Module (TCM), a flat ceramic module containing about 30,000 logic circuits on up to 118 chips.
I'm pretty sure I saw something similar, almost three decades ago.
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Back in the dark ages we used to put floating point math on a special chip. Intel had the x87 co-processor, and most computers didn't have them since computers didn't need high-speed floating point math, and when you did, you just the operation in software. This started to go away with the 486, which (mostly) had an integrated FPU on chip, while a few cheaper models disabled it. The Pentium was the first chip where every model had an FPU.
So the future seems to be de-integrating circuits? Possibly. But the whole point of putting everything together on one chip was cost saving. Now it seems like the future is more flexibility, and specialization.
What made the co-processor era crummy was you could rely on it being their. IIRC the linux kernel had some funky Floating point emulation stuff in it to perform these operations if on the integer unit instead.
Also, as I recall one of the problems of this era was non-generic chips. Intel had it's own FPU, the 287 and 387. But there was also a competing, and incompatible FPU you could also have who's name I forget.
i believe she has this already figured out. https://bit.ly/2DuzzPg see memory alpha -- ;-) some group of nanites are going to form a union if we aren't careful.
Wikipedia:MCM
It's like technology companies are starting to behave like Hollywood. Come out with a rehash of what they did a few years ago instead of any new revolutionary ideas.
Chiplets! Imagine a Beowulf cluster of those. On a chip!
Chiplets are good, but what's wrong with wafer scale integration? You could even combine them, chiplets as daughter boards in a 2+1 dimensional arrangement.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
You wouldn't need it for all tasks, just semi-stable ones. TCP/IP doesn't change much, so putting a stack on ASIC makes a lot of sense.
If you shoved the Linux filesystems and VFS2 onto a series of ASICs that could be placed on the controller card, you'd have far better performance and all OS' would have access.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Large dies are good. You can do far more. I'd love to see wafer scale SoC at 15nm, more RAM than most machines have hard drive and more cores than most servers, in something the size of a kindle.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Making larger chips from smaller "chiplets" will not improve the speed nor efficiency of the final combined chip. This is purely a money-saving trick around the age-old problem of having lower yields every subsequent process technology. If anything, the added circuitry necessary to facilitate interconnects between these chiplets only add to power usage and transmission delays.
Chiplets also do nothing for speeding up chip development as monolithic chips are already built from various templates stamped over and over on a large work sheet. These chiplets simply contain a collection of templates, so no gains there.
The summary clearly was aimed towards investors, lots of buzzwords, not much ham.
I wouldn't mind seeing both ASIC chiplets, dedicated for a specific task, like AES array shifting, RSA exponentiation and multiplication, and other tasks a computer commonly does. From there, it would be nice to have FPGAs for most anything else. This can easily allow a hypervisor to run x86 code as well as ARM. Done right, this could also improve security between VMs.
Of course, if someone wants to grind cryptocurrency, next to dedicated ASIC boards, FPGAs are not bad.
Large dies also mean a much lower yield rate. No point in having huge dies if most of your chips fail testing.
You could probably have a dozen or more Amigas on one Chiplet :D
Cost free eBook I read (by iBook/Kobo/Amazon/ObookO/Gutenberg etc.): "The Green Odyssey" by Philip Jose Farmer.
Chip makers are currently doing 7 nm lithography. Copper atoms are 0.2 nm wide. We may not have reached the limits for lithography, but we have to be getting real close.
[Insert pithy quote here]
sure sounds like it to me
GENERATION 26: The first time you see this, copy it into your sig on any forum and add 1 to the generation.
Every couple of years somebody says that "Moore's Law is ending" and then it doesn't.
I propose we call this Borehd's Law.
It's the cloud all over again. Isn't it?
To communicate 100 light years away instantaneously all it takes is a long stiff rod where very small movement back and forth can communicate. Of course this is just a non practical idea ...
I'm not sure if this is sarcasm, but it's not only impractical, it's also not how reality works. Any interactions at one side of the rod would travel the length of the rod at a speed less than light. The exact speed would depend on what the rod was made out of.
To communicate 100 light years away instantaneously all it takes is a long stiff rod where very small movement back and forth can communicate.
Physics doesn't work that way. Force and motion propagate through a material at a finite speed. Perhaps the most well known example of this is the propagation of sound waves. So far, nobody has found a material for which the speed of sound is greater than the speed of light through a vacuum.
They already did the same thing basically to create quad-core processors -> two 2 core processors on one MCM.
We already have CPUs with some of the cores or cache disabled due to defects. No need to ditch the whole thing.
Escher was the first MC and Giger invented the HR department.
That's nonsense. Try using a C-64 now, you'll find it has trouble even keeping up with fast typing.
Part of the reason why computers are slow is the rather stupid scheduling policies that are commonly used in Windows.
A proper scheduler will prioritize handling *input* above all else (ie, recording keys and mouse movements) as this make a computer feel responsive. On Amiga's this was a separate process, running at a priority higher than everything else, just to make sure nothing got lost. It got even better with an improved scheduler (Executive) which automatically prioritized i/o bound processes over CPU bound processes. The computer would feel unloaded even with 90% of its *SINGLE* CPU used for background stuff.
There's absolutely zero reason why a computer should feel sluggish in these days, with multiple CPU cores and all, apart from stupidity in design of the OS and scheduler. Combined with other stupidity (Windows stealing focus when they're created, despite actively working on something else) it can make for a frustrating experience.
Even Linux has long suffered from a problem (from like 2000 to 2015 orso) where heavy background i/o (like copying a huge directory) would disrupt applications with minimal i/o (like a music player, or even a console that needs to do some i/o). Again, totally unnecessary and just a result of poor design.
So why do companies already do this for high-end cards?
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
The failure rate is not bad and can be improved on. Intel reckoned an 80 core CPU using wafers, you can disable 3/4s and still have the power of a high-end server. Odds are, you'd not drop below 64 cores.
Other methods apply. Since we're talking daughter cards, you can have some replace disabled logic on the chip.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)