In a relatively small country, like Finland for instance, the amount of cell towers and communication relays is vastly reduced by the small size of the country
As noted in several other posts, the population density of finland is even lowerthan that of the US. This is the only important figure!
I think GSM phones never really took of in the US because there were many successful alternatives, as Pagers and Analog cellphones. Neither did really have success in europe.
...and it occurred to him--in a single, blinding moment--that a picture could be sent electronically through the airwaves in the same way, broken down into easily transmitted lines and then reassembled into a complete picture at the other end.
So what ? Other people did this even before he was born. Sorry, Farnsworth is definitly NOT the inventor of television, but is just a piece in a bigger scheme.
Schematic entry is for people who do not know VHDL. There is hardly any other reason to use schematic entry when doing CPLD or FPGA programming, because schematic entry does hardly give you more control over the PAR process.
Cleverly done VHDL can also give you close control over the actual logic. Just look at this CPU: 8 Bit CPU in CPLD. Even though it is done in VHDL it is optimized to fit just into the smallest CPLDs available.
Btw. I found above link on http://www.fpgacpu.org which is another good starting point for FPGA based cpus.
Intel could show us all how to make a better compiler.
They did. EGCS which was later migrated to GCC 2.95 is already based on lots of modificactions done by intel and given back to the community. Just look at some 2.95 vs. pre 2.95 Benchmark to see how much they have already done.
It is just that intels full time compiler experts seem to be vastly ahead of the rest. They also beat MSVC by length, not to speak of intel FORTRAN.
Re:The neverending life of a microcontroller
on
History of Video Games
·
· Score: 2, Informative
The processor in the original PONG machines were comparable to what is used in the Nintendo Gameboy, 20 years later
You are probabably referring the the Z80. The Z80 was developed years after the original PONG machine, and could therefore hardly been used in PONG. In fact the original PONG machine did not use any CPU, but was all hardwired. AFAIR most of the circuit is analog.
In my assembly class, people like to complain that the 68k chip we're programming is "outdated".
Maybe the fail to notice that the x86 instruction set architecture is several years older than the 68k, which is for sure the best processor of its time. Even the 68060 from 1993 is still a marvel from an architecture point of view.
Isnt this great ? I agree with you !;) (Ok, sorry I was too quick while reading).
About the speed issue: The higher power requirements are generally dynamic power - hence it scales with clockspeed. Therefore you would have to use a slower clock to achive the same logic/power density as with binary logic. Since the power/area ratio is limited you would have to go with a lower clockspeed for the same manufacturing process.
An addition: I presume that implementing the ternary logic gate in CMOS logic will eat almost as many transistors as an equivalent gate for two binary bits. The only advantage i can see for ternary logic is that of having ~30% less interconnections. Thats not a big one...
We are already dealing with circuits that have a voltage swing of 250mV. If I understand this site (which you have pointed out already as less than credible), then we could say 0 = 0v, 1 = 250mV and 2 = 500mV.
Exactly, thats four times the power requirement. (See above) Not to speak about the problems of building proper comparators for this voltage range.
The signal-to-noise ratio is similar for both binary and these type of trinary systems, if they are using similar hardware. The three states of a the trinary system given here are 0 (-x V), 1 (0 V), 2(+x V).
You name it. Binary logic requires 0V and +vcc, ternary -vcc, 0v and +vcc. Thats twice the voltage range. Hence the power usage (almost, due to different switching scheme) quadruples for the same SNR and speed.
In addition ternary logic will be much more sensitive to process variations. The logic will be A LOT more unrealiable than binary logic, not to speak of initial production yield.
So if someones site doesn't look fancy and professional then their ideas are no good?
No - he has too much graphics. Using HTML in a proper way (eg. as _markup_ and not _layout_ langue) would have been fine. Even better would have been some TeXed PDF/PS paper.
The information about the whitehouse.gov attack was wrong. (Well - its still up:)) In fact the attack is going to start tommorrow, july 20th.
Here is the snippet from bugtraq:
Thanks to Eric from Symantec for tossing us a note about the worm being Date
based and not Time based.
We made an error in our last analysis and said the worm would start
attacking whitehouse.gov based on a certain time. In reality its based on a
date (the 20th UTC) which is tomorrow.
If the worm infects your system between the 1st and the 19th it will attempt
to deface the infected servers web page or try to propogate itself to other
systems. On the 20th all infected threads will attempt to attack
www.whitehouse.gov. This seems to continue until the worm is removed from
the infected system.
Any new infection that happens between the 20th and 28th will most likely be
someone "hand infecting" your system as all other worms should be attacking
whitehouse.gov. If for some reason you are infected between the 20th and the
28th then the worm will begin attacking whitehouse.gov without trying to
infect other systems. This attack will continue indefinitly.
The following are rough numbers, but we felt that it was important to
illustrate the affects this worm can _possibly_ have.
The worm has a timeline like this:
day of the month:
1-19: infect other hosts using the worm
20-27: attack whitehouse.gov forever
28-end of month: eternal sleep
Presumably, this could restart at any point in a new month again.
Also, some stats for the attack:
Each infection has 100 threads
Each thread is going to send about 100k, a byte at a time, which means you
have a (40 for ip + 1 for each byte) which means you have 4.1 megs of data
per thread
100 threads * 4.1megs = 410 Megabytes
This will be repeated again every 4.5 hours or so
Remember, each host can be infected multiple times, meaning that a single
host can send 410MB * # of infections.
We have had reports between 15 thousand and 196 thousand unique hosts
infected with the "Code Red" worm. However, there has been cross infection
and we have heard reports of at least 300+ thousand infections/instances
(machines with multiple infections etc..) of this worm.
If there are 300 thousand infections then that means you have (300,000 * 410
megabytes) that is going to be attempted to be flooded against
whitehouse.gov every 4 and a half hours. If this is true and the worm "works
as advertised" then the fact that whitehouse.gov goes offline is only the
begining of what _can_ possibly happen...
Nonvolatile memory (passive) is even worse, because NV memory is almost always capacitive... you're basically charging and discharging microscopic batteries, which is inherently slow.
Thats total nonesense. In fact the memory that most resembles your "battery" scheme is dynamic memory aka. DRAM or SDRAM if you like. It consists out of one transistor and one capacitor per cell.
Flash/Eprom memory work using fowler-nordheim tunneling to store tiny charges in isolated gate oxides. Writing is even slower than with a capacitor. There are other nonvolatile memory techniques which work in a totally different way. (FRAM: storing data by moving atoms, MRAM: magnetic memory, phase change memory etc..)
The second reason memory is slow is size. The smallest simple memory circuit you can make with silicon takes two transistors (a basic flip-flop circuit)...
This is static memory, yes. The smallest version requires at least FOUR transistors because you have to adress the cell by some means. But as mentioned abovce - the smallest memory cell requires just a single transistor.
and switching speed, which increases geometrically with transistor count, due to radio interference considerations (aka crosstalk).
No, switching speed is mainly dependand on line and gate capacity. (see low k dielectrica). Crosstalk is a totally different issue...
as well as the fact that most nanotech is mechanical
Fictional stories are not a reliable source for scientific information.
1 bit represents two possible characters.
2 bits represent four possible characters.
3 bits represent nine possible characters.
4 bits represent sixteen possible characters
...if the 64 bits is broken into 8 bit words it can only represent 512 unique characters.
Looks like a crank. Or just a Troll ? Nevertheless this is total nonesense - dont bother.
I read until i came to this in the first paragraph, then my attention dropped.
"Can you tell me specifically what the dev system was like for Vectrex?" Well, I'm not a programmer, so I never actually used a Vectrex dev system myself.
wtf ? I thought it was about developing games on a vectrex ? Back in these days there was hardly a lot to do for so called 'game-designers'.
Slashdot Mirror
Not true - GIF does also allow lossless 24Bit color compression.
grams per cubic feet ? WTF ? Imperial and SI units mixed up ? WHY ?
As noted in several other posts, the population density of finland is even lowerthan that of the US. This is the only important figure!
I think GSM phones never really took of in the US because there were many successful alternatives, as Pagers and Analog cellphones. Neither did really have success in europe.
Nah.. I believe you the other stuff, but not this one. There is more to it than just setting up some deposition/ablation order..
So what ? Other people did this even before he was born. Sorry, Farnsworth is definitly NOT the inventor of television, but is just a piece in a bigger scheme.
Schematic entry is for people who do not know VHDL. There is hardly any other reason to use schematic entry when doing CPLD or FPGA programming, because schematic entry does hardly give you more control over the PAR process.
Cleverly done VHDL can also give you close control over the actual logic. Just look at this CPU: 8 Bit CPU in CPLD. Even though it is done in VHDL it is optimized to fit just into the smallest CPLDs available.
Btw. I found above link on http://www.fpgacpu.org which is another good starting point for FPGA based cpus.
1) Who invented the radio? (Marconi) -> Hertz, Maxwell
and the basics behind radar -> Christian Huelsmeyer(?), 1904 working prototype
electron microscope -> ernst ruska, nobel price 1986.
microwave oven -> The guys who invented the klystron ?
www.spamhaus.org has a list of spammers and the ISPs supporting them. They also have some quite interesting articles on this topic.
They did. EGCS which was later migrated to GCC 2.95 is already based on lots of modificactions done by intel and given back to the community. Just look at some 2.95 vs. pre 2.95 Benchmark to see how much they have already done.
It is just that intels full time compiler experts seem to be vastly ahead of the rest. They also beat MSVC by length, not to speak of intel FORTRAN.
The processor in the original PONG machines were comparable to what is used in the Nintendo Gameboy, 20 years later
You are probabably referring the the Z80. The Z80 was developed years after the original PONG machine, and could therefore hardly been used in PONG. In fact the original PONG machine did not use any CPU, but was all hardwired. AFAIR most of the circuit is analog.
In my assembly class, people like to complain that the 68k chip we're programming is "outdated".
Maybe the fail to notice that the x86 instruction set architecture is several years older than the 68k, which is for sure the best processor of its time. Even the 68060 from 1993 is still a marvel from an architecture point of view.
Billions if 8 bit microcontrollers are still sold today. Mostly by Motorola. Even 4Bit microcontrollers do still have a huge market market share.
Isnt this great ? I agree with you ! ;) (Ok, sorry I was too quick while reading).
About the speed issue: The higher power requirements are generally dynamic power - hence it scales with clockspeed. Therefore you would have to use a slower clock to achive the same logic/power density as with binary logic. Since the power/area ratio is limited you would have to go with a lower clockspeed for the same manufacturing process.
An addition: I presume that implementing the ternary logic gate in CMOS logic will eat almost as many transistors as an equivalent gate for two binary bits. The only advantage i can see for ternary logic is that of having ~30% less interconnections. Thats not a big one ...
Exactly, thats four times the power requirement. (See above) Not to speak about the problems of building proper comparators for this voltage range.
The signal-to-noise ratio is similar for both binary and these type of trinary systems, if they are using similar hardware. The three states of a the trinary system given here are 0 (-x V), 1 (0 V), 2(+x V).
You name it. Binary logic requires 0V and +vcc, ternary -vcc, 0v and +vcc. Thats twice the voltage range. Hence the power usage (almost, due to different switching scheme) quadruples for the same SNR and speed.
In addition ternary logic will be much more sensitive to process variations. The logic will be A LOT more unrealiable than binary logic, not to speak of initial production yield.
So if someones site doesn't look fancy and professional then their ideas are no good?
No - he has too much graphics. Using HTML in a proper way (eg. as _markup_ and not _layout_ langue) would have been fine. Even better would have been some TeXed PDF/PS paper.
Easy answer: Signal to Noise ratio renders ternary logic useless. Either it comes at a slower speed than binary logic or at higher power consumption.
In addition - the site design doesnt make it look very credible..
I can design a chip that runs at 200GHz, does some useful processing ..
I doubt this.
Bad idea. Last time i checked TTSSH was still SSH1 only, which is prone to man-in-the-middle attacks.
There are lots of script-kiddie tools which can do this, even over a switched LAN etc. Better dont use SSH1.
here is the FreeBSD security advisory, just in case you ARE still running telnetd on your freebsd box.
Compare this to the FreeBSD Telnetd exploit which was used to deface several websites lately.(stileproject etc..)
Can you imagine there is any sane admin with a frequented webserver who runs telnetd on it, instead of using SSH ? Appearantly there are a lot.
Not only a bad administered IIS is prone to attacks. No OS helps over bad administration.
Here is a full analysis of the worm. (including source!)
More info here
The information about the whitehouse.gov attack was wrong. (Well - its still up :)) In fact the attack is going to start tommorrow, july 20th.
Here is the snippet from bugtraq:
Thanks to Eric from Symantec for tossing us a note about the worm being Date
based and not Time based.
We made an error in our last analysis and said the worm would start
attacking whitehouse.gov based on a certain time. In reality its based on a
date (the 20th UTC) which is tomorrow.
If the worm infects your system between the 1st and the 19th it will attempt
to deface the infected servers web page or try to propogate itself to other
systems. On the 20th all infected threads will attempt to attack
www.whitehouse.gov. This seems to continue until the worm is removed from
the infected system.
Any new infection that happens between the 20th and 28th will most likely be
someone "hand infecting" your system as all other worms should be attacking
whitehouse.gov. If for some reason you are infected between the 20th and the
28th then the worm will begin attacking whitehouse.gov without trying to
infect other systems. This attack will continue indefinitly.
The following are rough numbers, but we felt that it was important to
illustrate the affects this worm can _possibly_ have.
The worm has a timeline like this:
day of the month:
1-19: infect other hosts using the worm
20-27: attack whitehouse.gov forever
28-end of month: eternal sleep
Presumably, this could restart at any point in a new month again.
Also, some stats for the attack:
Each infection has 100 threads
Each thread is going to send about 100k, a byte at a time, which means you
have a (40 for ip + 1 for each byte) which means you have 4.1 megs of data
per thread
100 threads * 4.1megs = 410 Megabytes
This will be repeated again every 4.5 hours or so
Remember, each host can be infected multiple times, meaning that a single
host can send 410MB * # of infections.
We have had reports between 15 thousand and 196 thousand unique hosts
infected with the "Code Red" worm. However, there has been cross infection
and we have heard reports of at least 300+ thousand infections/instances
(machines with multiple infections etc..) of this worm.
If there are 300 thousand infections then that means you have (300,000 * 410
megabytes) that is going to be attempted to be flooded against
whitehouse.gov every 4 and a half hours. If this is true and the worm "works
as advertised" then the fact that whitehouse.gov goes offline is only the
begining of what _can_ possibly happen...
Thats total nonesense. In fact the memory that most resembles your "battery" scheme is dynamic memory aka. DRAM or SDRAM if you like. It consists out of one transistor and one capacitor per cell.
Flash/Eprom memory work using fowler-nordheim tunneling to store tiny charges in isolated gate oxides. Writing is even slower than with a capacitor. There are other nonvolatile memory techniques which work in a totally different way. (FRAM: storing data by moving atoms, MRAM: magnetic memory, phase change memory etc..)
The second reason memory is slow is size. The smallest simple memory circuit you can make with silicon takes two transistors (a basic flip-flop circuit)...
This is static memory, yes. The smallest version requires at least FOUR transistors because you have to adress the cell by some means. But as mentioned abovce - the smallest memory cell requires just a single transistor.
and switching speed, which increases geometrically with transistor count, due to radio interference considerations (aka crosstalk).
No, switching speed is mainly dependand on line and gate capacity. (see low k dielectrica). Crosstalk is a totally different issue...
as well as the fact that most nanotech is mechanical
Fictional stories are not a reliable source for scientific information.
1 bit represents two possible characters. 2 bits represent four possible characters. 3 bits represent nine possible characters. 4 bits represent sixteen possible characters
...if the 64 bits is broken into 8 bit words it can only represent 512 unique characters.
Looks like a crank. Or just a Troll ? Nevertheless this is total nonesense - dont bother.
I read until i came to this in the first paragraph, then my attention dropped.
"Can you tell me specifically what the dev system was like for Vectrex?"
Well, I'm not a programmer, so I never actually used a Vectrex dev system myself.
wtf ? I thought it was about developing games on a vectrex ? Back in these days there was hardly a lot to do for so called 'game-designers'.