My flat mate has nearly made one
on
MP3 for Gameboy
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· Score: 2
My flat mate Matt has allready got the game boy to play Amiga MOD files using only 3% CPU time in this demo. He is now working on a MP3 player along with other demos. When he makes it ill slap him about and release te code.
I made a MIPS compatable CPU and they told me off for it and threatened a lot of legal action. After pointing out I didnt break any of their IPs they started complaining that I was calling it a MIPS reather than a MIPS microprocessor. Apparently this dilutes their TM. They didnt want to conseed on the fact that MIPS stands for "Microprocessor without interlocking pipelines".
Im not sure if they do but I do know that cats and many other animals can comprehend 2d images. They just look like moving pictures reather than representations of 3d scenes.
Mechanic panda: Dein bamboo air condition machine ist nit operational? Girl Panda 1: Ja es ist soo hot. Girl Panda 2: Dein mastash ist so grose [Break into wukacha guitar music]
When you get transistors the size of 1nm the time it takes for a clock signal to travel from one side of a 10mm chip to the other gets to millions of gate delays.
Current high speed processors have about 10 gate delays between clocks (and dropping).
The only way to keep devices increasing in speed along with the technology is to move to non clocked systems at least for long distance communication. This can be done by GALS (Globally Asynchronous Locally Synchronous).
Also at that size transistors become rather unpredictable. Comes take a ps to switch sometimes three times more. You will no longer be able to say this pipeline stage will be completed by x ps because sometimes it might not be. So margins become so large that most operations take only 50% of the time allocated.
My research is into Delay Insensitive circuit conversion. Basically you know when the pipeline stage is completed. This improves speed and copes with fluctuations in voltage, heat or lazy transistors.
I tried it out on a MIPS R3000 clone and got 30% speed improvement. I'm hoping for 50%.
There are three things you can change: voltage speculation and turn of power features like branch target buffer. Best of all it can be done hardware controled.
On the non-technical front, Imagine how hard it would be to market a chip that performs differently at different temperatures and that doesn't have a frequency to list on the box?
Tell me about it. I keep getting involved with people saying stuff like "How does it tell the time?" or "Thats stupid because you dont know when the result is back in the register bank!" and trying to avoid insulting them because you want to convince the menagerial scum that maybe there might possibely be another way is very difficult.
The speculation used in modern processors can be controled. For example the fetch unit fetching instructions after it fetched a conditional branch. These instructions are thrown away if the branch is mispredicted.
By controling the speculation you can decrease power without hitting your performance as much as lowering the clock rate would. One of the members of my group is working on this with positive results.
There are two clocks here. One for your calendar at a resolution of 1 sec and the other to drive you processor. The second one should be turned off while the processor is not in use (i.e. while you are thinking of the next key to press). This doesnt happen in all processors and is costly. The calendar clock is there anyway to wake the processor up every sec to check if you have to do something. Even worse is when the processor sits there ticking and looking at the clock waiting for a specific time.
Common misconseption. The processor speed can change while you play the game and all that will change is your frame rate and not your play speed. Thats why asynchronous processors are possible.
If you want low power than asynchronous is the way to go. Amulet processors use much lower power than synchronous processors. They are asynchronous so they will slow down when the voltage drops or you go somewhere hot. When they are not working they don't use any power. There is no messing about with software controled clock control, you just stick it into a branch on spot and it freezes. This is great for things like pagers or handhelds where you dont even need to power the clock nets while you are not doing anything. A large processors clock power consumption can be as high as 80%.
You might have seen it already but this is me powering an Amulet2 off a mouse wheel. They are very robust.
My flatmate has been working on this system which shows any image you want. All you need to do is write a script which picks an image and then run a program to transmit it over the network to the display every few seconds. Things like weather, news or mail. I wanted to link it with my camera robot and have a few buttons on the side to control it.
The clock is not gated and uses 80% of the CPU power. Taking a superscalar chip to use about half of its executed results it produces and stages left empty. Also the use of NOPs in wait loops, Super pipelines systems having a monster mispredicted branch penalty, Speculatively executing both logical and arithmetic operations and muxing the result. These are all standard practises that we will have to get rid of before we can make very fast chips without huge heat sinking systems.
The Amulet group has been working for year to make a low power yet high speed asynchronous ARM processors. The Amulet 3 runs at 120 MHz and consumes very little power. Most of all its asynchronous so when you dont have mych processing to do it just sits there consuming "no" power.
They take a hell of a beating and still run. I connected one to a hamster wheel and you can see it here running despite the power fluctuating madly.
The only reason it only goes at 120MHz is because the memory isnt fast enough.
Its a little strange that only three ARM production lisences were given out. One to intel one to motorola and one to Amulet group.
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My flat mate Matt has allready got the game boy to play Amiga MOD files using only 3% CPU time in this demo.
He is now working on a MP3 player along with other demos.
When he makes it ill slap him about and release te code.
"Microprocessor without Interlocking Pipeline Stages" if you like
I made a MIPS compatable CPU and they told me off for it and threatened a lot of legal action.
After pointing out I didnt break any of their IPs they started complaining that I was calling it a MIPS reather than a MIPS microprocessor. Apparently this dilutes their TM.
They didnt want to conseed on the fact that MIPS stands for "Microprocessor without interlocking pipelines".
Sorry the link is wrong it should be this one.
If you want something cheap and nasty then have a look at my little streaming toy. It streams JPEG images and runs on a p133 with a £30 ($50) TV card.
Im not sure if they do but I do know that cats and many other animals can comprehend 2d images. They just look like moving pictures reather than representations of 3d scenes.
Mechanic panda: Dein bamboo air condition machine ist nit operational?
Girl Panda 1: Ja es ist soo hot.
Girl Panda 2: Dein mastash ist so grose
[Break into wukacha guitar music]
When you get transistors the size of 1nm the time it takes for a clock signal to travel from one side of a 10mm chip to the other gets to millions of gate delays.
Current high speed processors have about 10 gate delays between clocks (and dropping).
The only way to keep devices increasing in speed along with the technology is to move to non clocked systems at least for long distance communication. This can be
done by GALS (Globally Asynchronous Locally Synchronous).
Also at that size transistors become rather unpredictable. Comes take a ps to switch sometimes three times more. You will no longer be able to say this pipeline stage
will be completed by x ps because sometimes it might not be. So margins become so large that most operations take only 50% of the time allocated.
My research is into Delay Insensitive circuit conversion. Basically you know when the pipeline stage is completed. This improves speed and copes with fluctuations in
voltage, heat or lazy transistors.
I tried it out on a MIPS R3000 clone and got 30% speed improvement. I'm hoping for 50%.
There are three things you can change: voltage speculation and turn of power features like branch target buffer. Best of all it can be done hardware controled.
On the non-technical front, Imagine how hard it would be to market a chip that performs differently at different temperatures and that doesn't have a frequency to list on the box?
Tell me about it. I keep getting involved with people saying stuff like "How does it tell the time?" or "Thats stupid because you dont know when the result is back in the register bank!" and trying to avoid insulting them because you want to convince the menagerial scum that maybe there might possibely be another way is very difficult.
Rotary processors by Simon Moore is the sort of thing. My flatmate is looking at it now but more for performance reasons than power.
Well actualy I am working on a method of converting standard synchronous designs into asynchronous ones.
My method requires no skills and is a simple push button conversion and on a sample design (MIPS R3000 clone) gave 30% higher speed.
It simply takes an EDIF of your synchronous design and creates an asynchronous EDIF.
The speculation used in modern processors can be controled. For example the fetch unit fetching instructions after it fetched a conditional branch. These instructions are thrown away if the branch is mispredicted.
By controling the speculation you can decrease power without hitting your performance as much as lowering the clock rate would. One of the members of my group is working on this with positive results.
Generaly low power = no heat being disapated
There are two clocks here. One for your calendar at a resolution of 1 sec and the other to drive you processor.
The second one should be turned off while the processor is not in use (i.e. while you are thinking of the next key to press).
This doesnt happen in all processors and is costly.
The calendar clock is there anyway to wake the processor up every sec to check if you have to do something.
Even worse is when the processor sits there ticking and looking at the clock waiting for a specific time.
Or a mouse
Common misconseption. The processor speed can change while you play the game and all that will change is your frame rate and not your play speed.
Thats why asynchronous processors are possible.
If you want low power than asynchronous is the way to go. Amulet processors use much lower power than synchronous processors. They are asynchronous so they will slow down when the voltage drops or you go somewhere hot. When they are not working they don't use any power. There is no messing about with software controled clock control, you just stick it into a branch on spot and it freezes. This is great for things like pagers or handhelds where you dont even need to power the clock nets while you are not doing anything. A large processors clock power consumption can be as high as 80%.
You might have seen it already but this is me powering an Amulet2 off a mouse wheel. They are very robust.
They could get some volunteers from the local brothel. They seem quite capable working while laying on their backs already.
My flatmate has been working on this system which shows any image you want. All you need to do is write a script which picks an image and then run a program to transmit it over the network to the display every few seconds. Things like weather, news or mail.
I wanted to link it with my camera robot and have a few buttons on the side to control it.
The clock is not gated and uses 80% of the CPU power. Taking a superscalar chip to use about half of its executed results it produces and stages left empty.
Also the use of NOPs in wait loops, Super pipelines systems having a monster mispredicted branch penalty, Speculatively executing both logical and arithmetic operations and muxing the result.
These are all standard practises that we will have to get rid of before we can make very fast chips without huge heat sinking systems.
You could make a better designed processor which works harder at not computing pointlessly.
A high speed x86 cpu wastes 90% of its power on operations who's result is thrown away.
Clock gating and whipping engineers is just two stratergies.
Yeah you're correct. I meant to say MIPS.
Which is more than a non superscalar part at 120MHz could do.
The Amulet group has been working for year to make a low power yet high speed asynchronous ARM processors.
The Amulet 3 runs at 120 MHz and consumes very little power. Most of all its asynchronous so when you dont have mych processing to do it just sits there consuming "no" power.
They take a hell of a beating and still run. I connected one to a hamster wheel and you can see it here running despite the power fluctuating madly.
The only reason it only goes at 120MHz is because the memory isnt fast enough.
Its a little strange that only three ARM production lisences were given out. One to intel one to motorola and one to Amulet group.
My group has been working on a syhthesizable secure G3 card CPU and it will probably be the slowest ARM ever made.
The CPU will be fully delay insensitive and asynchronous to stop power and clock glitch attacks.
We are currently looking at 4 Mhz on 0.18 process.
Im in the UK. Having a fridge weigh three times my weight is strange.