I realize you're joking (I even found your joke funny), but unfortunately, implementing it would require work at the kernel level. Why? Well, when your program writes to, say, 0x00000000, that "virtual address" actually gets mapped to a different physical address. When your hard drive is thrashing and stuff is being paged in and out of RAM constantly, the physical address for a given virtual address could be changing multiple times per second.
Now, a kernel patch for the linux VM system that allowed user programs to manipulate the lights (presumably this could be done by having the kernel just reserve 4k from each physical region monitored by each LED and rapidly hit that little bit of memory upon request) would be pretty cool:).
Because of virtual memory, that wouldn't actually work without access to the page table, which would be highly invasive (and operating system dependent). With virtual memory, a given virtual address doesn't always correspond to the same physical address.
That's not a good analogy. A better analogy would be having the pit crew pave the grass inside the track and then having the race car drive a shorter course. This is cheating, because after 500 of these laps, you haven't done 500 real laps.
I think that some things, though, would be better in a database - for example, music could be categorized better in a db. I think that in general, things that fit in more than one place are best kept in databases, but the rest fit better in heirarchies. Papers I write, for example, usually only belong in one place.
That's what really bugs me about that (New Mexico?) governor's comments about our "third-world" power system. Losing power at most a few times per year is NOT third world... whoever this guy was, he clearly doesn't know what third-world means.
I guess we also run third-world computers, since they go down a few times per year too;).
You know, open source software has holes too. What do you suppose the last few apache releases have been for? Remember the openssl worm? The raman worm?
The fact is, whether regular users run windows, OS X, or another *nix, they WILL NOT keep them patched, and as such, it doesn't matter how fast the OSS community finds and fixes bugs as long as people have already installed vulnerable versions.
Diamond also conducts heat VERY well...
on
The Diamond Age
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· Score: 1
Diamond conducts heat about 5x better than copper. Maybe one day crazy overclockers can have diamond waterblocks or heatsinks cooling their diamond-wafer processors:).
The Death of Dynamic Range
on
Is Louder Better?
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· Score: 5, Informative
There have been patches out for the confirm-on-close bug for a while, but they were difficult to apply - especially under windows if you don't have a real "patch" tool available. Here are the various files for 1.4 with the patch applied.
It happens when your referer (gotta love HTTP standards spelling) is slashdot. If you copy/paste it to the address bar, you'll see the actual site (assuming your browser didn't cache the nasty redirect).
That is how we lost all network connectivity for about 8 hours a few weeks ago. Someone connected a slammer-infected laptop the the network, and pretty soon the slammer traffic brought the network to a standstill.
Why bother with a worm? Did you see the slashdot story a few weeks back on someone faking DNS responses so that everything connected to their machine, which could intercept and modify data? After all, how many people REALLY click "Don't connect" when presented with an invalid SSL cert?
For our P4 with 2GHz and bus of 400MHz... Thank god. For our 512MB of RAM... Thank god. For our GeForce [no clue -2mx?] with 128 MB of Memory DDR... Thank god. And for our case aluminum with sweet mods and infinite blinkenlights... Amen
You can set cache line size to any arbitrary length when you design a processor. Now, because of the longer pipeline and higher clocks of the P4, I believe that larger cache lines make more sense, but you don't inherently need longer cache lines when you have a longer pipeline.
The Athlon is comparatively simple, and the 400MHz FSB is overkill.
This isn't because of simplicity - it has to do with the size of cache lines in the L2 cache. The P4 fetches larger blocks with each miss, meaning a longer wait when a miss occurs. The Athlon, making smaller fetches, requires less bandwidth for a given miss. Obviously, if you designed worst-case code that was aimed at generating pure misses, both processors would be abbysmal and heavily affected by FSB, but normal code is not like that.
No, that is not correct. What you are talking about is more like standard multi-threading / task switching. When one thread blocks, switch to another.
The HT P4 does in fact run two threads simultaneously. It works because processors have MANY functional units, and at a given time, each thread can only possibly use a few of them. Hyperthreading lets a separate thread use the FUs that are not already used, giving you two threads running simultaneously, even if not at the same speed as two real processors would provide.
But you are incorrect. Playing music uses well under 5% of the CPU time on my Athlon 700... playing high-quality DivX videos maybe 10%, and the rest (mozilla, instant messaging apps, main apps, etc) use nearly no CPU time at all. MOST tasks just sit idle.
Slashdot Mirror
Personally, I find perl harder than vbscript, but to each his own ;)
... so use ASP. It's VERY fast to write, and people have already written objects that will do almost everything you need.
I realize you're joking (I even found your joke funny), but unfortunately, implementing it would require work at the kernel level. Why? Well, when your program writes to, say, 0x00000000, that "virtual address" actually gets mapped to a different physical address. When your hard drive is thrashing and stuff is being paged in and out of RAM constantly, the physical address for a given virtual address could be changing multiple times per second.
:).
Now, a kernel patch for the linux VM system that allowed user programs to manipulate the lights (presumably this could be done by having the kernel just reserve 4k from each physical region monitored by each LED and rapidly hit that little bit of memory upon request) would be pretty cool
Because of virtual memory, that wouldn't actually work without access to the page table, which would be highly invasive (and operating system dependent). With virtual memory, a given virtual address doesn't always correspond to the same physical address.
So the Flash Click to View extension I use makes my browser compliant?
That's not a good analogy. A better analogy would be having the pit crew pave the grass inside the track and then having the race car drive a shorter course. This is cheating, because after 500 of these laps, you haven't done 500 real laps.
I think that some things, though, would be better in a database - for example, music could be categorized better in a db. I think that in general, things that fit in more than one place are best kept in databases, but the rest fit better in heirarchies. Papers I write, for example, usually only belong in one place.
Check out the graph I made to help me pick the right CPU to buy. I have a script which parses a website for data and uses gnuplot to create the image.
That's what really bugs me about that (New Mexico?) governor's comments about our "third-world" power system. Losing power at most a few times per year is NOT third world... whoever this guy was, he clearly doesn't know what third-world means.
;).
I guess we also run third-world computers, since they go down a few times per year too
You know, open source software has holes too. What do you suppose the last few apache releases have been for? Remember the openssl worm? The raman worm?
The fact is, whether regular users run windows, OS X, or another *nix, they WILL NOT keep them patched, and as such, it doesn't matter how fast the OSS community finds and fixes bugs as long as people have already installed vulnerable versions.
Diamond conducts heat about 5x better than copper. Maybe one day crazy overclockers can have diamond waterblocks or heatsinks cooling their diamond-wafer processors :).
Another great read here.
Pastry, another one of their research projects
You have to remember that a lot of people can be easily pressured into buying something in order to please the person who is calling.
There have been patches out for the confirm-on-close bug for a while, but they were difficult to apply - especially under windows if you don't have a real "patch" tool available. Here are the various files for 1.4 with the patch applied.
That isn't all they do! P2P, Micrsoft-style.
It happens when your referer (gotta love HTTP standards spelling) is slashdot. If you copy/paste it to the address bar, you'll see the actual site (assuming your browser didn't cache the nasty redirect).
That is how we lost all network connectivity for about 8 hours a few weeks ago. Someone connected a slammer-infected laptop the the network, and pretty soon the slammer traffic brought the network to a standstill.
Why bother with a worm? Did you see the slashdot story a few weeks back on someone faking DNS responses so that everything connected to their machine, which could intercept and modify data? After all, how many people REALLY click "Don't connect" when presented with an invalid SSL cert?
For our P4 with 2GHz and bus of 400MHz...
Thank god.
For our 512MB of RAM...
Thank god.
For our GeForce [no clue -2mx?] with 128 MB of Memory DDR...
Thank god.
And for our case aluminum with sweet mods and infinite blinkenlights...
Amen
...thanks to its larger pipeline.
You can set cache line size to any arbitrary length when you design a processor. Now, because of the longer pipeline and higher clocks of the P4, I believe that larger cache lines make more sense, but you don't inherently need longer cache lines when you have a longer pipeline.
The Athlon is comparatively simple, and the 400MHz FSB is overkill.
This isn't because of simplicity - it has to do with the size of cache lines in the L2 cache. The P4 fetches larger blocks with each miss, meaning a longer wait when a miss occurs. The Athlon, making smaller fetches, requires less bandwidth for a given miss. Obviously, if you designed worst-case code that was aimed at generating pure misses, both processors would be abbysmal and heavily affected by FSB, but normal code is not like that.
No, that is not correct. What you are talking about is more like standard multi-threading / task switching. When one thread blocks, switch to another.
The HT P4 does in fact run two threads simultaneously. It works because processors have MANY functional units, and at a given time, each thread can only possibly use a few of them. Hyperthreading lets a separate thread use the FUs that are not already used, giving you two threads running simultaneously, even if not at the same speed as two real processors would provide.
Can the hacked xboxes be used to create the requried savegames?
But you are incorrect. Playing music uses well under 5% of the CPU time on my Athlon 700... playing high-quality DivX videos maybe 10%, and the rest (mozilla, instant messaging apps, main apps, etc) use nearly no CPU time at all. MOST tasks just sit idle.