Well, its probably different here - some fraturnities on campus are full of idiots, others aren't. My fraturnity is for engineers, scientists, and archies exclusively. And most of us are pretty bright. Case in point, one of the newest brothers came in with sophmore standing (now junior after 1 semester). Another learned calculus in 5th grade. It goes on and on.
The house's GPA is roughly a 3.0 and 100% are on scholarship. Those who can't make it at school drop out. I joined the fraturnity to have a social life, since the atmosphere otherwise is dismall and depressing. I'm glad I did, I'm a better person.
1. Better way of saying it: MIPS is taught in almost every computer architecture course, is well understood, and already has a following abd design standards for embedded to enterprise level, and the port was done previously for similar chips. The ease to build a MIPS cpu and existing software base is likely more important.
2. Dragon is not a high-performance chip. However US chips are expensive at even low-end in China's currency. This chip, while not speedy, is cheap and extremely easy to design off of.
3. Not all processes can be distrubted well. It depends entirely on the task and on the architecture. A large multiprocessor system needs a good bus. A shared-bus will saturate but is cheap, a point-to-point is expensive but better. These are embedded CPUs, so a good multiprocessor system isn't likely. A distributed system is possible, but not resonable for most tasks and the software is very complex.
Their market will pick it because it will be cheap, pushed by the government, and the West doesn't have a stronghold. Many embedded chips are extremely cheap already and most companies wont make the switch due to power players and more confidence in availablity (can complain to a company, can't to China).
umm, what are you smoking? I just opened to a random page and its right infront of me. Page 69 talks about registration. Here's an example of code on that page:
I wont put down the java serlet that is shown on p. 69-70. But the book uses his JSP example throughout.
I plan on reading the entire book this summer, since I did pay for it. It shows you an example of how aspects can be used, and how to program with them. I simply wanted more information on AOP, rather then an introduction and code. For my tastes in books, I found it disappointing. Obviously the reviewer here loved it, and probably bought it for learning how to program using AOP rather then the details of AOP. That's exactly what its meant for! I bought it simply because it had AOP in the name - my mistake.
That's why I posted some of the resourced I found, so someone else wouldn't make the same mistakes. Buy the book if you want to do a project in AspectJ, know AOP, and want a light example.
I bought it back in january, after first learning about AOP. At the time, it was the only book I could find directly on AOP, with a second coming in feb. Otherwise, the only other text source I could find was Generitive Programming.
So I bought it, and I was excited when I began reading. Then I found out it was just a bunch of JSP and other then the first 25 pages, very little content. Now I admit I put it down a good 25 or so pages later and skimmed through the rest, but I was extremely disapointed in it. Instead I've been grabbing all of the ECOOP workshop documentation.
In the end, it was worth the money. No, not for the book, god no! But by getting me excited and reading the ACM Communication articles and then talking to my adviser about it. It turns out the editor for the AOP material in the ACM communications is a professor at my school, and even better is happy to let me help her out next semester (I'm extremely swamped now). So now I'm considering doing the thesis option on my masters. I'll spend the summer reading REAL material.
My opinion: AOP is awesome but the book is a waste of money. Here are a few good readings:
When looking for graduate schools, I was amazed by how much I saw of this. I looked at the undergraduate degrees in order to determine what the school expected as an average applicant. My program is definately harder then most of those I saw, well.. especially since I'm doubling, but the ways the schools try to hide poor grades is disgusting. I've actually heard admission officers try to use it as a reason to come!
So quite honestly, it does concern me since my school is definately not inflating grades. I've worked my ass off and stuggled for a B. The majority of people on campus have 50-100% scholorships, making those of us who thought we were smart in highschool just die trying to keep up. I have quite a few friends who came in with sophmore standing, two who actually learned calculus either before or during junior high.
But all of this really does concern me. I laugh when I see graduate students put their GPA on their resume, since most graduate programs require a B or A for credit. And now that I'm taking 4 graduate classes, they really aren't hard.
The good thing is I do have proof of of my school's system. I have the campus grade report, showing the average grades broken down into various subgroups. It also shows the last 3 terns, The average grade is actually just shy of a 3.0. That's pretty respectable, and note that this is an engineering school.
I sometimes wonder if I should attach the grade report to my resume. If everyone is getting inflated grades, perhaps I should prove mine isn't.
I've been looking at many of the ivy-leage schools for graduate school, and so I've been glancing at their undergraduate degrees for a basis of what they expect. Guess what, they don't teach a lot to undergraduates. Actually, its pretty average. I was pretty surprised at first, even though I go to a great school its not a 'name-brand', but some are just pathetic.
Most college rankings seem to rely on reputation, peer-review, famous faculty, research, and the education recieved by graduate students. Instead undergraduate is by and large who you are and how much your worth, not brains. And to top it off, and this really got me, a large number of the 'best-of-the-best' schools use a partial or full pass/fail system to hide GPAs. This means that if you pass (usually 50-65% on course webpages), you get a pass - equal to a 3.0 when converted to a GPA by the school. Quite a nice trick, especially for those that use a partial system to hide tougher courses where GPAs would fall.
And the graduate programs aren't all that great at times. Many take 1 year to complete, not two. I actually laughed when I looked at UC Berkeley's for Computer Engineering: 10-11 crh (out of 24) can be applied to any 100-level or above course. Okay, okay, its not ivy-leage, but the school has a good rep.
So ivy-leage schools having great reputations is false, and I can tell you numerous stories related to me by PhD graduates from them. The thing is, for some people reputation is just as or more important than the education - like the MBA programs. Stanford and many others don't actually release an MBA student's grades to potential employers, but the key aspect to their program lies in the connections built in, advice from famous CEOs, and the education. The mere fact that Stanford is on your resume determines your salary.
So repeat after me: reputation does not equal education. And the article shows this, the name attached to his degree didn't make much of a difference. You just have to decide what mixture you want, obscurity vs fame, hardcore vs. hand-holding.
Well, Itanium has backwards compatability to ease porting, but nothing worthy in support or 64-bit software for running a mid-end server yet. Say IA-64 software begins to appear and we come to the point where a good server might run a good chunk of IA-64 software and some x86 too (no good ports, perhaps). What would stop Intel from designing a riser card like the SunPC (right?) with a Pentium chip on it? For those that need fast x86 as well as fast IA-64, this could work.
There was some show on the history channel today, taped before Bush was elected, that talked about exploring mars. It said that a method to do it would be to send a lander with 2 boosters that would go to Mars without passengers and instead mix with the Martian atmosphere to create fuel for the returning trip. Then a similar flight would occur with people on board. The idea was that thus we could save from having a huge expensive mission that had to go both ways and have two relatively cheap flights. It could be done for by 2015 if Nasa was given the go-ahead.
They then went on to talking about instead teraphorming Mars making it suitable for man-kind. That might be the answer, though they readily admitted that our technology and patience are lacking for such a feat.
It ended there and if I missed anything earlier they may have talked about. It just seemed ironic since I turned on the news 5 minutes after and heard of Russia's purposal.
Sorry, but your neglecting to much when you say drives are the bottleneck. I would have agreed with you a few years ago and I chanted it happily when my old SCSI Pentium system could outperform most early P2s. This was because the CPU is generally starved and so on non-intensive tasks getting faster sub-system made major differences. But that was in a day were RAM was still to small, system busses were clogged, the CPU was stuck doing useless junk (I/O operations), and better algorithms were in dire need.
Today with DMA, faster busses, more ram then can be usefully filled, much improved optimization algorithms (caches, fragmentations, memory management, etc), and higher throughput, your drive isn't sooo bad. I put my old 10k IBM SCSI drive in my new system to give it a wirl, and while it has half the seek time of my WD IDE, its smaller throughput made it perform slower. The CPU utilization was 1-2% verses 8-10%, but on an 1800+ I honestly don't care.
Hard drives are the slowest components, so when the worst case happens (a miss penalty) and a load must occur, the system is busy waiting. This is where larger caches and better algorithms come into play, so the penalty is small due to the unlikely hood of accessing the drive. What about application loads? Well, if you optimize the filesystem then the high throughput and disk cache work well, with this being a one-time hit since your RAM thus stores needed data. And with your RAM so large you can have many processes running so even while your waiting for the drive your not twiddling your thumb.
Hard drives are difficult to improve speed wise through physical changes because they are moving parts. The only way to truely improve hdds speed wise is to dump them and replace them with a non-moving system, such as one similar to RAM. Oh, and the 8mb WD over the 2mb is hardly significant in speed up, as you can see on storage review. It helps, but nothing amazingly.
So your wrong, they are getting better. And its because we're making small improvements speed-wise, large size-wise, and the rest simply algorithmic and less system demand. Stick in a new 15k SCSI and you wont see the amazing speed-up that made SCSI a must for any power-user 5-8 years ago. The problem with hdds is there so big most of us don't need the space - we fill it up with whatever we can, which is usually games, music (mp3s and now videos), and movies. All entertainment and thus sacrificable.
Its not Intel's "sloppy designs" which have caused water cooling to come back into style. Actually a big reason most people do it, such as myself, is because we get sick of the noise, which is not entirely the processor's fault. Its beautiful to have a PC that's like any other applience, you don't notice it unless you need to use it.
On the engineering front, every modern good performing processor needs cooling. The number of transisters per cubic cm is enormous and increasing, so we're getting bigger chips using more energy and thus producing more heat. This is where a new technology must come and replace it, just like CMOS did with bipolar. Circuit engineers only pay attention to heat during the design phase if its a criteria (which isn't so much on processors) and is mostly left to those in the fabrication stage to optimize and fix. Only in the last few years has any decent energy saving technology started to become popular and important to designers, but in essence until heat is a limitting factor designs will focus on higher performance through novel techniques and providing developers with better tools (instruction sets).
I've always heard that, but no real facts since people first talked about it. And Apple allows you to program in Java or Object-C to their API, which gives you the flexability and cleaness with the native performance. I heard people then say, why didn't Microsoft do this, it would have rocked? And so I keep wondering, was this what MS tried to do?
If it was, then MS would have helped clean up their API and make programming Windows nicer. It would have also made Java less controlled and more like C++, with competing standards, thousands of libraries, and to many fixes that drive you to another language where they fixed it for you but kept the syntax. Right?
Could someone say exactly how Java was to be extended and how this differs from Apple (other then a larger company/force behind it)?
Hypertransport is mostly for interchip communications. Such as, between the CPU and chipset. It isn't going to be used like a bus and AMD is backing Intel's new bus architecture, 3GIO. 3GIO will support previous PCI cards (for a while) and should replace both PCI and AGP (which is derived from PCI).
3GIO was recently named some new strange PCI name, but I forget it. Using both new standards will vastly improve performance. 3GIO will get it from the I/O cards and HyperTransport will zip it to the CPU.
Well, the LLNL site used to be full of information and it seems their NIF site has been severly slimmed down. So I'll provide my understanding from reading various material back when the project was getting underway and when it came up during discussions.
The 192 beams are shined on a capsol which contains a fusion fuel. It is created into a plasma and a fusion reaction occurs. The effect is that they are able to research many areas because these reactions simulate those of a star. This allows a better understanding of how the universe works (such as formation of elements and supernovas). There used to be an entire list of areas NIF would benefit and how, but that was on their older web page. The design of NIF required new technologies and will have a significant effect on many area of research. But honestly, you'll need to talk to someone who works at LLNL.
Why NIF is being funded and built is for the nuclear reactions for weapon research, which is the same reason why its predecessors were built. I'd guess that that will likely be its main role for the first few years. I know NOVA took years to be dissembled as well as NOVET (a smaller version before NOVA was finished - like what the French have done). They ran for years doing various experiments.
You should also remember that NIF won't be alone. When NOVA was built other countries such as Japan and the British sent scientists to observe and infact replicate exactly the laser system. The French had a very under-budgetted department and in fact had LLNL build it, which is why their system has (had?) the LLNL colors painted on it, while every other replica used different ones. NIF is headed by the U.S. but is contributed by many nations, so smaller NIF-et and full scale versions will be built. So lots of non-weapon science will be done.
Anyway, that's all I can recall at the moment. Years back I actually looked into it and wrote a summery of how NIF operated, but that's god know's where. If your really interested, try finding someone involved or better yet go hit up usenet for someone who can explain things far better then I. Hope that answered your questions a bit.
The title makes it sound like LLNL will be shut down. I know numerous people who work there, most of which on a massive project called NIF. Tron was shot in SHEVA, which was replaced by NOVA (deriving my nick), which is being replaced by NIF. NIF is the largest fusion laser, based on ICF principles, and is under full swing of construction. It will be brought up later this year. In fact, France has a smaller 8-laser version that just came up this last week and LLNL employees flown there in order to observe any difficulties. This project is a multi-billion dollar one which I severely doubt the government will allow to be scrapped due to budget cuts like this.
So, the most I can see if LLNL being streamlined. I doubt Congress will even give 10% of what they're requesting out of LLNL's budget. LLNL does valuable research in weapon, energy, materials, etc. The government labs are run under the DOE, but do most of their expensive work for the DOD, such as NIF and ASCII being mostly for nuclear research. When the lab scare with China occured it was suggested that the DOD take over the labs, but instead they finally got their act together. Since this is most of the budget, I could only guess they are really trying to transfer the lab to this new department or the Bush administration going to screw everything up.
And the Navy is trying pretty hard to get new engineers too. Every year or two I get an email from a recruiter tellimg me of the benefits of taking up their scholorship offer and learning to become a Navy nuclear engineer after college. Its funny, I must be on some list they got from my school based on major, grades, etc. It didn't interest me for two major reasons. One is I want to do work on processor architectures, and man.. sub marines are small, tight, and noisy.
Oh, and my father works on a multi-billion fusion project (NIF). He's an electrical engineer. I'm sure there are few people who are straight 'nuclear engineers' but there are numerous people who are engineers with enough physics and chemistry to do the job. How many schools do you see offer PhD's in NE, and how many in EE, Physics,...? There are still lots of engineers, just the governments hire these people and so the markets smaller and less known.
Okay, I have to ask you, because I see this a lot on slashdot. Why should art, music, and programming be free? Now the first two are definately art forms, but the latter being claimed art is a pure fallace. Even saying art should be free doesn't seem right, especially in a capalistic society. If you say the government should pay the people creating it, then you set their salaries based on a system (such as popularity with a fixed cost per use).
Yes, I agree that the music industry is severly flawed, but what do you consitute art? Writing, and if so to what degree, sci-fi, technical, magazines? How about my school books?
And why lump programming with it, why not add chemistry, so we can get access to drugs cheaper? I mean, our DNA and that of animals should be free? Why should they be allowed to create geneticaly engineered foods, since they just made some slight changes to a plant.. make it free.
The FSF and so many people on slashdot keep saying programming should be free, and then neglect to say how people should be compensated in our capalistic society, unless they take a hit on their salary for some moral reason, a reason no one explains. Someone goes to school for 4-8 yrs to become an expert, and works hard - why should they be obligated to take a lower salary then the free market allows so you can have it free? When someone parties through school with a political science major, and earns the same or more because you forced a lower salary on on job class.
This is becoming to much of a rant and getting offtopic.. so I'll stop now. cheers!
Actually, the IA-64 instruction set is based off of PA-RISC, as it is the next generation of that architecture. Various projects designing processors with high levels of ILP were conducted at HP, blooming into the partnership between HP and Intel (who had been floating around an idea of a 64-bit x86 architecture, but recieved poor supportive responces) that created IA-64. HP-UX developers have stated that only minor changes must occur to port an application, and have created what equates to a shell process that converts a PA-RISC instruction directly into its IA-64 counterpart.
So, PA-RISC is native via design. The x86 instructions were tacked on, origionally supposed to be an entire processor but proved to be to costly. You have to remember that x86 is hardly needed, as its mostly important for developers porting and testing applications, and for Microsoft to run 'legacy' applications. McKinly has a newer design that should boost the x86 performance substantially. If extra is needed, I'm sure something similar to Sun's x86 PCI card will be devised.
As to heat and the rest, taking out the x86 would help of course. From what I've heard, the control logic on current IA-64 chips is actually smaller then that of the Pentium 4, which was the point of the architecture - simplify. Simplifying meant spending more time on higher level logic rather OOO techniques, etc that could be done via software. The chip is so large due to *lots* of cache.
Bad code is bad code, so no argument against that. But since I haven't seen this yet, I'm curious for an example. Most programs I see follow three paths.
- poor programming, creating messy, poor code that's slow and junk.
- good code that's very modular, gets to the point, following a strict OOD, well thought out that's slow due to making it as modular/extensible as possible - not designed with performance as priority, but cleanness and extensability.
- a big mess of good or bad code trying to solve a problem, and not catching the quick(er) and easy solution. It works, just the programmer didn't see the optimal solution (common for the best and worst).
So are you talking about plain bad coding, or a design for simplicity for the programmer that may be slow, but takes far less time/code to solve the problem (eg. priority issue)?
Sorry this is so late,/. must have gone on their backup server, cuz my account stopped working and I couldn't post... oh well.
Your missing a huge number of issues. For one, these high end chips aren't usually put together by hobbiest and used in enterprise situations, like a PC is for a desktop. Here the branding is half of the importance - support contracts. The other half is the technology of the company - the O.S. and tools, the hardware solutions, and finally relative performance. HP made a killing for years at government labs through support contracts on UNIX workstations, and while the systems became ancient they stayed around due to the support until they had to be killed off.
HP, IBM, Compaq, etc. bring solutions to companies, which is what matters. The chip itself isn't to important, so the R&D gets to be a hassle making few players. The chip must simply have relative performance to the competition. The factors involved are then the scalability of the system, which involves the chipset. The chipset sets the system bus, memory type, multi-processing ability, etc. This is the 'solution,' which is what the companies are offering. Intel offers the core technology, but the system manufacturers bring in their own 'secret sauce' (as Paul DeMone called it) to the table. Above that, they bring the support, Operating System, and platform.
Therefore, while sure, you could build a workstation Itanium (but definately not for $2k), the big money are the clusters and the like. But the workstations will be built, and for a high end, high quality machine who would you trust, a brand like Dell with support contracts, or your neighbor? Its not commodoty yet, so few will turn to the guy down the street until prices drop significantly.
There are definately players left. The $1B mark R&D mark I assume is from how much Intel spent on the architecture, but that's on building an entire platform + obtaining corperate support. Sparc already exists and upgrading it is like doing the same to x86, it simply requires talent. Sun has mentioned both SMT and multi-cores in the future, and has spent work on their compiler in recent months (notice the big SPEC jump?). Don't count them out, their getting hit at the low end by PCs and the high by IBM. Its not Intel killing them just yet.
Lastly, some people on here seem to still believe Itanium is huge due to its core. In actuallity, the core is 25 million trasistors and rest is all cache. For the exact numbers, read the RWT forum, since I forget them offhand.
IA-64 wont rule the world due to expense, compilers, software platform, and where the market positions it. And lets not forget performance, different jobs need different skills and Itanium shines at FPU unneeded for desktops, fails at integer which they love. Vice-versa for many scientific apps. Intel wont distroy everyone else, but they'll certainly make a dent. Its already been felt.
Okay, it just slipped me and didn't notice your earlier post.
With the GUI, though, its simply a version of the Shell layer in Brown & Denning's model. That layer doesn't make any stipulation on how its implemented (cli, gui, etc) but simply what its function is. Since studies have shown that ease of use and productivity goes up with GUIs, one could say yes, if Apple's Aqua interface is considered an advancement over past ones, people may buy it for that purprose.
Lol, I know I'm just being an ass right now. Don't bother responding, I understand your point entirely.:-)
No, with the express purpose, since that is a job of an Operating System. An operating system defined as:
Software that controls the execution of programs and that provides services such as resource allocation, scheduling, input/output control, and data management.
Memory is a resource, and so running an O.S. is for the express purpose of managing that and other resources. Read Willam Stallings' Operating Systems, 4th e. for a good background.
Apple had a far easier time writting a fast emulator, due to the similar designs of the processors. One of the main problems behind running x86 instructions quickly on IA-64 is due to in-order vs. out-of-order architectures. This makes running or converting the instructions extremely slow, since the compiler for an x86 chip doesn't bother with high level instruction scheduling, since traditionally the hardware could do it better. EPIC believes the software can, and thus massive research & development in compilers was needed. The current generation are still simple, leaving out many of the high level optimizations, and is a significant reason why the Itanium under performs.
Intel had 3 options, either put a full x86 chip onto Itanium, convert the instructions in hardware, or write an emulator. The first was determined to be to costly in die area, and the latter is platform specific. Support for x86 should only be needed by developers who are transitioning their code base over, so Intel made a good decision that would likely allow x86 support to eventually be dropped. Sun's solution was to use riser card with a celeron onboard. I'd have to ask why would you need fast x86 support on such a chip, unless you were planning on scaling it down to desktops sometime soon. The architecture/compilers are to immature as of yet to make that possible.
I've never seen an MIS curriculum, so wont comment on it, but the CS vs. CIS is pretty simple. So there's gonna be tons of these quick summeries.
CIS usually is a lot of intro level courses in CS and business. Such as in CS, you would take introductionary CS classes, a basic theory one (perhaps only Discrete Structures or maybe one more too), a few general programming classes (System's programing = GUI, etc). Nothing to hard, most programming classes so you know how to code and basics of a computer, but not how to solve problems (algorithms), software design, or see more complex/in depth material.
Instead you get a similar intro into business. Its not a CS degree or business degree. Perhaps its sort of like an associate's in both majors. So its usually considered a joke by CS people since its lighter and not very technical.
A CS degree is not programming, but how to think andn solve problems. Its how to design software, analyze situations, write industrial level code. Its not learning a trade or special skill. The CIS is more like that. But you don't learn business, so an MBA or something would be important.
The difference is what you want to leap into. If your interested in CS and business, and confused on which.. go for the CIS. You can jump either ship later to go more full fledged, or go into masters for more of what you like (CS, MBA, etc). If you know you like both and want to invest the time, do a CS and MBA to get the strongest of both worlds.
An 8-bit processor just refers to the length of its instruction, and thus how much memory it can address. It has nothing to do with the size, and could be just as many transisters as a modern chip. The common data elements are the same on both chips, just needed more repitions or bus lines to move from 8 to 32 bits (eg, decoder, adder). Most of these functions are well worked out and only a small portion of the chip so the majority of the transisters go towards more advanced components or controls (adv. controls handling being pipelining, SMT, etc). Also don't forget what a carry-look ahead teaches you for adders - more hardware is faster then less, if you can do more in parallel. So don't get confused on the x-bit area, its merely data crunching and representation of numbers. Having an 8-bit cpu would be horrible for multimedia and science apps which need persision.
As to massively parrallel chips idea, its good in theory but horrible in practice. Most code can't be broken up into bite size chunks to be handled independantly. You rely on previous data, and have to be sure its completed. You can't access the same segment of memory or because you may be reading/writing the wrong information. And to solve this it takes more code, not less. So you may have a slower implementation and one that's harder to design and maintain.
The ATM machine problem shows this, where you have a husband&wife both taking money out at the same time (eg. emptying it). If both can access the data attribute, they both check to see it has cash and are allowed to withdraw. The bank goes into the red. You say, make the line repetitious so one dollar at a time, but you still need a check.
If (x>0)
x--;
The if goes through, but the husband withdraws at the same time. The bank still loses in the worst case $1. Dealing with parallelized code is a pain with shared resources and since its bigger, more is cranked out. Hopefully you get a speedup by having more code, but running in parallel on many chips, yet often less code is faster. Maintance is hell, so often the work to do this on important aspects, not every little thing.
And you'd ask us all to write in assembly, ugh. Think about writing 8 or so lines for a simple switch statement, keeping track of jumps/labels, dealing with a small # of registers, dealing with memory. A simple program is horrible to write in assembly, since simple if-else code takes branches, jumps, labels, etc - longer code. Put this on something more then a few lines in C, and its hard to debug since its all addi's and beq's for ever little command.. stacks to return from a function. Its messy! Try dealing with your parallel goodness in assembly.. insane. And compilers know all the tricks, so often a modern compiler is better then a skilled assembly writer, since they can do far more tricks easier. You need to know which instructions are slow and not to use, optimize registers load/stores to reduce stalls, etc. Sure a perfect assembly writer may know it all, but its insane on chips with huge numbers of instructions, registers, and a big project. The myth that good assembly is faster then a compiler is just that, a myth. Ideally is true, in practice time is more important and a compiler often wins.
We do parallize code like crazy, but in smart ways. Up at the cpu level is okay and done a lot, but not much more efficent. Go down a level. We use pipelining to parallize the cpu stages, so its not stuck computing one instruction through the whole process, but each stage can work on one. 1 in, 1 out every cycle (different instruction) or just the same in 5 (multiplier waiting for the decoder). Look at SMT which fills in the bubbles (stalls) when a stage must wait by simulating another CPU so other data can fill it. Think ILP and EPIC with prediction to replace branch prediction, by using more hardware to do the task in less time. Instead of picking the result for an if statement when waiting for memory to respond and being wrong, you do both simultaniously and throw out the incorrect data. Sure its brute force rather then trying to be 'smart' but its faster. That 10% of the time your wrong is gone, so your better off.
I could go on, but I spent so much freaking time writing this for no reason. Don't need nor will likely get mod points, doubt you would care enough to learn. If you would like to know more, ask though. I'll leave you with this:
What happened to the good ol' days when programmers--real programmers--wrote very clever, small and fast programs? When it had to be written correctly or it didn't work?
Programmers have to write big programs, smart and clever in radically different and innovative ways. Design is no longer about size, but modularity, cleanness, reducing debugging and maintance time, and adding features. Larger code is acceptable if its better code - its easier to fix, and only slightly slower. Today's real programmers deal with designing massive, complex projects - not optimizing to hell for some platform or language. We leave the platform designers to optimize their end and the compiler to optimize to the hardware. Most real programmers have more important things to spend their time on.
Re:Probably hard to boot from
on
Firewire and Linux?
·
· Score: 2, Insightful
If the controller card's bios allows it to boot, then there's tricks you can manage. Back when I began my shift over to SCSI, in '96, I had a 1gb IDE and a 2gb SCSI-2 drive. My bios didn't support boot from scsi and I ran NT/95. Since I wanted to keep the two seperated and run multiple OSes, I realized I could simply turn off the IDE controller in the bios. I thus booted from SCSI, loaded NT, and had full access to my IDE drive since (like Linux?) it ignores/by-passes the bios. If I wanted '95, turn it on. No problem.
If he has IDE and Firewire components, and runs a modern OS, then he could do the same thing. Turn off the IDE controllers (perhaps just the one with the harddrive, not CDROM/DVD so he can boot from them). The firewire card's bios thus boots the drive, the OS detects the IDE components, and he's cool.
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Well, its probably different here - some fraturnities on campus are full of idiots, others aren't. My fraturnity is for engineers, scientists, and archies exclusively. And most of us are pretty bright. Case in point, one of the newest brothers came in with sophmore standing (now junior after 1 semester). Another learned calculus in 5th grade. It goes on and on.
The house's GPA is roughly a 3.0 and 100% are on scholarship. Those who can't make it at school drop out. I joined the fraturnity to have a social life, since the atmosphere otherwise is dismall and depressing. I'm glad I did, I'm a better person.
BTW:
Internal Chair,
Armour Chapter of Triangle
1. Better way of saying it:
MIPS is taught in almost every computer architecture course, is well understood, and already has a following abd design standards for embedded to enterprise level, and the port was done previously for similar chips. The ease to build a MIPS cpu and existing software base is likely more important.
2. Dragon is not a high-performance chip. However US chips are expensive at even low-end in China's currency. This chip, while not speedy, is cheap and extremely easy to design off of.
3. Not all processes can be distrubted well. It depends entirely on the task and on the architecture. A large multiprocessor system needs a good bus. A shared-bus will saturate but is cheap, a point-to-point is expensive but better. These are embedded CPUs, so a good multiprocessor system isn't likely. A distributed system is possible, but not resonable for most tasks and the software is very complex.
Their market will pick it because it will be cheap, pushed by the government, and the West doesn't have a stronghold. Many embedded chips are extremely cheap already and most companies wont make the switch due to power players and more confidence in availablity (can complain to a company, can't to China).
umm, what are you smoking? I just opened to a random page and its right infront of me. Page 69 talks about registration. Here's an example of code on that page:
Listing 5.8 register.jsp
------------
<html>
<body>
<%@ include file='header.jsp'%>
h1>Please, register yourself!<h1>
<form method=post action="register">
User: <input type=text name"user"><bd>
Password:<input type=password name="pass"><br>
<input type=submit value=" register ">
</form>
<%# inlude file="footer.jsp">
</body>
</html>
I wont put down the java serlet that is shown on p. 69-70. But the book uses his JSP example throughout.
I plan on reading the entire book this summer, since I did pay for it. It shows you an example of how aspects can be used, and how to program with them. I simply wanted more information on AOP, rather then an introduction and code. For my tastes in books, I found it disappointing. Obviously the reviewer here loved it, and probably bought it for learning how to program using AOP rather then the details of AOP. That's exactly what its meant for! I bought it simply because it had AOP in the name - my mistake.
That's why I posted some of the resourced I found, so someone else wouldn't make the same mistakes. Buy the book if you want to do a project in AspectJ, know AOP, and want a light example.
I bought it back in january, after first learning about AOP. At the time, it was the only book I could find directly on AOP, with a second coming in feb. Otherwise, the only other text source I could find was Generitive Programming.
So I bought it, and I was excited when I began reading. Then I found out it was just a bunch of JSP and other then the first 25 pages, very little content. Now I admit I put it down a good 25 or so pages later and skimmed through the rest, but I was extremely disapointed in it. Instead I've been grabbing all of the ECOOP workshop documentation.
In the end, it was worth the money. No, not for the book, god no! But by getting me excited and reading the ACM Communication articles and then talking to my adviser about it. It turns out the editor for the AOP material in the ACM communications is a professor at my school, and even better is happy to let me help her out next semester (I'm extremely swamped now). So now I'm considering doing the thesis option on my masters. I'll spend the summer reading REAL material.
My opinion: AOP is awesome but the book is a waste of money. Here are a few good readings:
Alternatives to AOP
Generitive Programming chapter
AOP publication
AOD 2002 workshop
ECOOP97
When looking for graduate schools, I was amazed by how much I saw of this. I looked at the undergraduate degrees in order to determine what the school expected as an average applicant. My program is definately harder then most of those I saw, well.. especially since I'm doubling, but the ways the schools try to hide poor grades is disgusting. I've actually heard admission officers try to use it as a reason to come!
So quite honestly, it does concern me since my school is definately not inflating grades. I've worked my ass off and stuggled for a B. The majority of people on campus have 50-100% scholorships, making those of us who thought we were smart in highschool just die trying to keep up. I have quite a few friends who came in with sophmore standing, two who actually learned calculus either before or during junior high.
But all of this really does concern me. I laugh when I see graduate students put their GPA on their resume, since most graduate programs require a B or A for credit. And now that I'm taking 4 graduate classes, they really aren't hard.
The good thing is I do have proof of of my school's system. I have the campus grade report, showing the average grades broken down into various subgroups. It also shows the last 3 terns, The average grade is actually just shy of a 3.0. That's pretty respectable, and note that this is an engineering school.
I sometimes wonder if I should attach the grade report to my resume. If everyone is getting inflated grades, perhaps I should prove mine isn't.
I've been looking at many of the ivy-leage schools for graduate school, and so I've been glancing at their undergraduate degrees for a basis of what they expect. Guess what, they don't teach a lot to undergraduates. Actually, its pretty average. I was pretty surprised at first, even though I go to a great school its not a 'name-brand', but some are just pathetic.
Most college rankings seem to rely on reputation, peer-review, famous faculty, research, and the education recieved by graduate students. Instead undergraduate is by and large who you are and how much your worth, not brains. And to top it off, and this really got me, a large number of the 'best-of-the-best' schools use a partial or full pass/fail system to hide GPAs. This means that if you pass (usually 50-65% on course webpages), you get a pass - equal to a 3.0 when converted to a GPA by the school. Quite a nice trick, especially for those that use a partial system to hide tougher courses where GPAs would fall.
And the graduate programs aren't all that great at times. Many take 1 year to complete, not two. I actually laughed when I looked at UC Berkeley's for Computer Engineering: 10-11 crh (out of 24) can be applied to any 100-level or above course. Okay, okay, its not ivy-leage, but the school has a good rep.
So ivy-leage schools having great reputations is false, and I can tell you numerous stories related to me by PhD graduates from them. The thing is, for some people reputation is just as or more important than the education - like the MBA programs. Stanford and many others don't actually release an MBA student's grades to potential employers, but the key aspect to their program lies in the connections built in, advice from famous CEOs, and the education. The mere fact that Stanford is on your resume determines your salary.
So repeat after me: reputation does not equal education. And the article shows this, the name attached to his degree didn't make much of a difference. You just have to decide what mixture you want, obscurity vs fame, hardcore vs. hand-holding.
Well, Itanium has backwards compatability to ease porting, but nothing worthy in support or 64-bit software for running a mid-end server yet. Say IA-64 software begins to appear and we come to the point where a good server might run a good chunk of IA-64 software and some x86 too (no good ports, perhaps). What would stop Intel from designing a riser card like the SunPC (right?) with a Pentium chip on it? For those that need fast x86 as well as fast IA-64, this could work.
There was some show on the history channel today, taped before Bush was elected, that talked about exploring mars. It said that a method to do it would be to send a lander with 2 boosters that would go to Mars without passengers and instead mix with the Martian atmosphere to create fuel for the returning trip. Then a similar flight would occur with people on board. The idea was that thus we could save from having a huge expensive mission that had to go both ways and have two relatively cheap flights. It could be done for by 2015 if Nasa was given the go-ahead.
They then went on to talking about instead teraphorming Mars making it suitable for man-kind. That might be the answer, though they readily admitted that our technology and patience are lacking for such a feat.
It ended there and if I missed anything earlier they may have talked about. It just seemed ironic since I turned on the news 5 minutes after and heard of Russia's purposal.
Sorry, but your neglecting to much when you say drives are the bottleneck. I would have agreed with you a few years ago and I chanted it happily when my old SCSI Pentium system could outperform most early P2s. This was because the CPU is generally starved and so on non-intensive tasks getting faster sub-system made major differences. But that was in a day were RAM was still to small, system busses were clogged, the CPU was stuck doing useless junk (I/O operations), and better algorithms were in dire need.
Today with DMA, faster busses, more ram then can be usefully filled, much improved optimization algorithms (caches, fragmentations, memory management, etc), and higher throughput, your drive isn't sooo bad. I put my old 10k IBM SCSI drive in my new system to give it a wirl, and while it has half the seek time of my WD IDE, its smaller throughput made it perform slower. The CPU utilization was 1-2% verses 8-10%, but on an 1800+ I honestly don't care.
Hard drives are the slowest components, so when the worst case happens (a miss penalty) and a load must occur, the system is busy waiting. This is where larger caches and better algorithms come into play, so the penalty is small due to the unlikely hood of accessing the drive. What about application loads? Well, if you optimize the filesystem then the high throughput and disk cache work well, with this being a one-time hit since your RAM thus stores needed data. And with your RAM so large you can have many processes running so even while your waiting for the drive your not twiddling your thumb.
Hard drives are difficult to improve speed wise through physical changes because they are moving parts. The only way to truely improve hdds speed wise is to dump them and replace them with a non-moving system, such as one similar to RAM. Oh, and the 8mb WD over the 2mb is hardly significant in speed up, as you can see on storage review. It helps, but nothing amazingly.
So your wrong, they are getting better. And its because we're making small improvements speed-wise, large size-wise, and the rest simply algorithmic and less system demand. Stick in a new 15k SCSI and you wont see the amazing speed-up that made SCSI a must for any power-user 5-8 years ago. The problem with hdds is there so big most of us don't need the space - we fill it up with whatever we can, which is usually games, music (mp3s and now videos), and movies. All entertainment and thus sacrificable.
Its not Intel's "sloppy designs" which have caused water cooling to come back into style. Actually a big reason most people do it, such as myself, is because we get sick of the noise, which is not entirely the processor's fault. Its beautiful to have a PC that's like any other applience, you don't notice it unless you need to use it.
On the engineering front, every modern good performing processor needs cooling. The number of transisters per cubic cm is enormous and increasing, so we're getting bigger chips using more energy and thus producing more heat. This is where a new technology must come and replace it, just like CMOS did with bipolar. Circuit engineers only pay attention to heat during the design phase if its a criteria (which isn't so much on processors) and is mostly left to those in the fabrication stage to optimize and fix. Only in the last few years has any decent energy saving technology started to become popular and important to designers, but in essence until heat is a limitting factor designs will focus on higher performance through novel techniques and providing developers with better tools (instruction sets).
I've always heard that, but no real facts since people first talked about it. And Apple allows you to program in Java or Object-C to their API, which gives you the flexability and cleaness with the native performance. I heard people then say, why didn't Microsoft do this, it would have rocked? And so I keep wondering, was this what MS tried to do?
If it was, then MS would have helped clean up their API and make programming Windows nicer. It would have also made Java less controlled and more like C++, with competing standards, thousands of libraries, and to many fixes that drive you to another language where they fixed it for you but kept the syntax. Right?
Could someone say exactly how Java was to be extended and how this differs from Apple (other then a larger company/force behind it)?
Hypertransport is mostly for interchip communications. Such as, between the CPU and chipset. It isn't going to be used like a bus and AMD is backing Intel's new bus architecture, 3GIO. 3GIO will support previous PCI cards (for a while) and should replace both PCI and AGP (which is derived from PCI).
3GIO was recently named some new strange PCI name, but I forget it. Using both new standards will vastly improve performance. 3GIO will get it from the I/O cards and HyperTransport will zip it to the CPU.
Well, the LLNL site used to be full of information and it seems their NIF site has been severly slimmed down. So I'll provide my understanding from reading various material back when the project was getting underway and when it came up during discussions.
The 192 beams are shined on a capsol which contains a fusion fuel. It is created into a plasma and a fusion reaction occurs. The effect is that they are able to research many areas because these reactions simulate those of a star. This allows a better understanding of how the universe works (such as formation of elements and supernovas). There used to be an entire list of areas NIF would benefit and how, but that was on their older web page. The design of NIF required new technologies and will have a significant effect on many area of research. But honestly, you'll need to talk to someone who works at LLNL.
Why NIF is being funded and built is for the nuclear reactions for weapon research, which is the same reason why its predecessors were built. I'd guess that that will likely be its main role for the first few years. I know NOVA took years to be dissembled as well as NOVET (a smaller version before NOVA was finished - like what the French have done). They ran for years doing various experiments.
You should also remember that NIF won't be alone. When NOVA was built other countries such as Japan and the British sent scientists to observe and infact replicate exactly the laser system. The French had a very under-budgetted department and in fact had LLNL build it, which is why their system has (had?) the LLNL colors painted on it, while every other replica used different ones. NIF is headed by the U.S. but is contributed by many nations, so smaller NIF-et and full scale versions will be built. So lots of non-weapon science will be done.
Anyway, that's all I can recall at the moment. Years back I actually looked into it and wrote a summery of how NIF operated, but that's god know's where. If your really interested, try finding someone involved or better yet go hit up usenet for someone who can explain things far better then I. Hope that answered your questions a bit.
The title makes it sound like LLNL will be shut down. I know numerous people who work there, most of which on a massive project called NIF. Tron was shot in SHEVA, which was replaced by NOVA (deriving my nick), which is being replaced by NIF. NIF is the largest fusion laser, based on ICF principles, and is under full swing of construction. It will be brought up later this year. In fact, France has a smaller 8-laser version that just came up this last week and LLNL employees flown there in order to observe any difficulties. This project is a multi-billion dollar one which I severely doubt the government will allow to be scrapped due to budget cuts like this.
So, the most I can see if LLNL being streamlined. I doubt Congress will even give 10% of what they're requesting out of LLNL's budget. LLNL does valuable research in weapon, energy, materials, etc. The government labs are run under the DOE, but do most of their expensive work for the DOD, such as NIF and ASCII being mostly for nuclear research. When the lab scare with China occured it was suggested that the DOD take over the labs, but instead they finally got their act together. Since this is most of the budget, I could only guess they are really trying to transfer the lab to this new department or the Bush administration going to screw everything up.
And the Navy is trying pretty hard to get new engineers too. Every year or two I get an email from a recruiter tellimg me of the benefits of taking up their scholorship offer and learning to become a Navy nuclear engineer after college. Its funny, I must be on some list they got from my school based on major, grades, etc. It didn't interest me for two major reasons. One is I want to do work on processor architectures, and man.. sub marines are small, tight, and noisy.
...? There are still lots of engineers, just the governments hire these people and so the markets smaller and less known.
Oh, and my father works on a multi-billion fusion project (NIF). He's an electrical engineer. I'm sure there are few people who are straight 'nuclear engineers' but there are numerous people who are engineers with enough physics and chemistry to do the job. How many schools do you see offer PhD's in NE, and how many in EE, Physics,
Okay, I have to ask you, because I see this a lot on slashdot. Why should art, music, and programming be free? Now the first two are definately art forms, but the latter being claimed art is a pure fallace. Even saying art should be free doesn't seem right, especially in a capalistic society. If you say the government should pay the people creating it, then you set their salaries based on a system (such as popularity with a fixed cost per use).
Yes, I agree that the music industry is severly flawed, but what do you consitute art? Writing, and if so to what degree, sci-fi, technical, magazines? How about my school books?
And why lump programming with it, why not add chemistry, so we can get access to drugs cheaper? I mean, our DNA and that of animals should be free? Why should they be allowed to create geneticaly engineered foods, since they just made some slight changes to a plant.. make it free.
The FSF and so many people on slashdot keep saying programming should be free, and then neglect to say how people should be compensated in our capalistic society, unless they take a hit on their salary for some moral reason, a reason no one explains. Someone goes to school for 4-8 yrs to become an expert, and works hard - why should they be obligated to take a lower salary then the free market allows so you can have it free? When someone parties through school with a political science major, and earns the same or more because you forced a lower salary on on job class.
This is becoming to much of a rant and getting offtopic.. so I'll stop now. cheers!
Actually, the IA-64 instruction set is based off of PA-RISC, as it is the next generation of that architecture. Various projects designing processors with high levels of ILP were conducted at HP, blooming into the partnership between HP and Intel (who had been floating around an idea of a 64-bit x86 architecture, but recieved poor supportive responces) that created IA-64. HP-UX developers have stated that only minor changes must occur to port an application, and have created what equates to a shell process that converts a PA-RISC instruction directly into its IA-64 counterpart.
So, PA-RISC is native via design. The x86 instructions were tacked on, origionally supposed to be an entire processor but proved to be to costly. You have to remember that x86 is hardly needed, as its mostly important for developers porting and testing applications, and for Microsoft to run 'legacy' applications. McKinly has a newer design that should boost the x86 performance substantially. If extra is needed, I'm sure something similar to Sun's x86 PCI card will be devised.
As to heat and the rest, taking out the x86 would help of course. From what I've heard, the control logic on current IA-64 chips is actually smaller then that of the Pentium 4, which was the point of the architecture - simplify. Simplifying meant spending more time on higher level logic rather OOO techniques, etc that could be done via software. The chip is so large due to *lots* of cache.
Anyways, a few good links are:
here and here.
Bad code is bad code, so no argument against that. But since I haven't seen this yet, I'm curious for an example. Most programs I see follow three paths.
- poor programming, creating messy, poor code that's slow and junk.
- good code that's very modular, gets to the point, following a strict OOD, well thought out that's slow due to making it as modular/extensible as possible - not designed with performance as priority, but cleanness and extensability.
- a big mess of good or bad code trying to solve a problem, and not catching the quick(er) and easy solution. It works, just the programmer didn't see the optimal solution (common for the best and worst).
So are you talking about plain bad coding, or a design for simplicity for the programmer that may be slow, but takes far less time/code to solve the problem (eg. priority issue)?
Sorry this is so late, /. must have gone on their backup server, cuz my account stopped working and I couldn't post... oh well.
Your missing a huge number of issues. For one, these high end chips aren't usually put together by hobbiest and used in enterprise situations, like a PC is for a desktop. Here the branding is half of the importance - support contracts. The other half is the technology of the company - the O.S. and tools, the hardware solutions, and finally relative performance. HP made a killing for years at government labs through support contracts on UNIX workstations, and while the systems became ancient they stayed around due to the support until they had to be killed off.
HP, IBM, Compaq, etc. bring solutions to companies, which is what matters. The chip itself isn't to important, so the R&D gets to be a hassle making few players. The chip must simply have relative performance to the competition. The factors involved are then the scalability of the system, which involves the chipset. The chipset sets the system bus, memory type, multi-processing ability, etc. This is the 'solution,' which is what the companies are offering. Intel offers the core technology, but the system manufacturers bring in their own 'secret sauce' (as Paul DeMone called it) to the table. Above that, they bring the support, Operating System, and platform.
Therefore, while sure, you could build a workstation Itanium (but definately not for $2k), the big money are the clusters and the like. But the workstations will be built, and for a high end, high quality machine who would you trust, a brand like Dell with support contracts, or your neighbor? Its not commodoty yet, so few will turn to the guy down the street until prices drop significantly.
There are definately players left. The $1B mark R&D mark I assume is from how much Intel spent on the architecture, but that's on building an entire platform + obtaining corperate support. Sparc already exists and upgrading it is like doing the same to x86, it simply requires talent. Sun has mentioned both SMT and multi-cores in the future, and has spent work on their compiler in recent months (notice the big SPEC jump?). Don't count them out, their getting hit at the low end by PCs and the high by IBM. Its not Intel killing them just yet.
Lastly, some people on here seem to still believe Itanium is huge due to its core. In actuallity, the core is 25 million trasistors and rest is all cache. For the exact numbers, read the RWT forum, since I forget them offhand.
IA-64 wont rule the world due to expense, compilers, software platform, and where the market positions it. And lets not forget performance, different jobs need different skills and Itanium shines at FPU unneeded for desktops, fails at integer which they love. Vice-versa for many scientific apps. Intel wont distroy everyone else, but they'll certainly make a dent. Its already been felt.
Okay, it just slipped me and didn't notice your earlier post.
:-)
With the GUI, though, its simply a version of the Shell layer in Brown & Denning's model. That layer doesn't make any stipulation on how its implemented (cli, gui, etc) but simply what its function is. Since studies have shown that ease of use and productivity goes up with GUIs, one could say yes, if Apple's Aqua interface is considered an advancement over past ones, people may buy it for that purprose.
Lol, I know I'm just being an ass right now. Don't bother responding, I understand your point entirely.
Memory is a resource, and so running an O.S. is for the express purpose of managing that and other resources. Read Willam Stallings' Operating Systems, 4th e. for a good background.
Apple had a far easier time writting a fast emulator, due to the similar designs of the processors. One of the main problems behind running x86 instructions quickly on IA-64 is due to in-order vs. out-of-order architectures. This makes running or converting the instructions extremely slow, since the compiler for an x86 chip doesn't bother with high level instruction scheduling, since traditionally the hardware could do it better. EPIC believes the software can, and thus massive research & development in compilers was needed. The current generation are still simple, leaving out many of the high level optimizations, and is a significant reason why the Itanium under performs.
Intel had 3 options, either put a full x86 chip onto Itanium, convert the instructions in hardware, or write an emulator. The first was determined to be to costly in die area, and the latter is platform specific. Support for x86 should only be needed by developers who are transitioning their code base over, so Intel made a good decision that would likely allow x86 support to eventually be dropped. Sun's solution was to use riser card with a celeron onboard. I'd have to ask why would you need fast x86 support on such a chip, unless you were planning on scaling it down to desktops sometime soon. The architecture/compilers are to immature as of yet to make that possible.
I've never seen an MIS curriculum, so wont comment on it, but the CS vs. CIS is pretty simple. So there's gonna be tons of these quick summeries.
CIS usually is a lot of intro level courses in CS and business. Such as in CS, you would take introductionary CS classes, a basic theory one (perhaps only Discrete Structures or maybe one more too), a few general programming classes (System's programing = GUI, etc). Nothing to hard, most programming classes so you know how to code and basics of a computer, but not how to solve problems (algorithms), software design, or see more complex/in depth material.
Instead you get a similar intro into business. Its not a CS degree or business degree. Perhaps its sort of like an associate's in both majors. So its usually considered a joke by CS people since its lighter and not very technical.
A CS degree is not programming, but how to think andn solve problems. Its how to design software, analyze situations, write industrial level code. Its not learning a trade or special skill. The CIS is more like that. But you don't learn business, so an MBA or something would be important.
The difference is what you want to leap into. If your interested in CS and business, and confused on which.. go for the CIS. You can jump either ship later to go more full fledged, or go into masters for more of what you like (CS, MBA, etc). If you know you like both and want to invest the time, do a CS and MBA to get the strongest of both worlds.
An 8-bit processor just refers to the length of its instruction, and thus how much memory it can address. It has nothing to do with the size, and could be just as many transisters as a modern chip. The common data elements are the same on both chips, just needed more repitions or bus lines to move from 8 to 32 bits (eg, decoder, adder). Most of these functions are well worked out and only a small portion of the chip so the majority of the transisters go towards more advanced components or controls (adv. controls handling being pipelining, SMT, etc). Also don't forget what a carry-look ahead teaches you for adders - more hardware is faster then less, if you can do more in parallel. So don't get confused on the x-bit area, its merely data crunching and representation of numbers. Having an 8-bit cpu would be horrible for multimedia and science apps which need persision.
As to massively parrallel chips idea, its good in theory but horrible in practice. Most code can't be broken up into bite size chunks to be handled independantly. You rely on previous data, and have to be sure its completed. You can't access the same segment of memory or because you may be reading/writing the wrong information. And to solve this it takes more code, not less. So you may have a slower implementation and one that's harder to design and maintain.
The ATM machine problem shows this, where you have a husband&wife both taking money out at the same time (eg. emptying it). If both can access the data attribute, they both check to see it has cash and are allowed to withdraw. The bank goes into the red. You say, make the line repetitious so one dollar at a time, but you still need a check.
If (x>0)
x--;
The if goes through, but the husband withdraws at the same time. The bank still loses in the worst case $1. Dealing with parallelized code is a pain with shared resources and since its bigger, more is cranked out. Hopefully you get a speedup by having more code, but running in parallel on many chips, yet often less code is faster. Maintance is hell, so often the work to do this on important aspects, not every little thing.
And you'd ask us all to write in assembly, ugh. Think about writing 8 or so lines for a simple switch statement, keeping track of jumps/labels, dealing with a small # of registers, dealing with memory. A simple program is horrible to write in assembly, since simple if-else code takes branches, jumps, labels, etc - longer code. Put this on something more then a few lines in C, and its hard to debug since its all addi's and beq's for ever little command.. stacks to return from a function. Its messy! Try dealing with your parallel goodness in assembly.. insane. And compilers know all the tricks, so often a modern compiler is better then a skilled assembly writer, since they can do far more tricks easier. You need to know which instructions are slow and not to use, optimize registers load/stores to reduce stalls, etc. Sure a perfect assembly writer may know it all, but its insane on chips with huge numbers of instructions, registers, and a big project. The myth that good assembly is faster then a compiler is just that, a myth. Ideally is true, in practice time is more important and a compiler often wins.
We do parallize code like crazy, but in smart ways. Up at the cpu level is okay and done a lot, but not much more efficent. Go down a level. We use pipelining to parallize the cpu stages, so its not stuck computing one instruction through the whole process, but each stage can work on one. 1 in, 1 out every cycle (different instruction) or just the same in 5 (multiplier waiting for the decoder). Look at SMT which fills in the bubbles (stalls) when a stage must wait by simulating another CPU so other data can fill it. Think ILP and EPIC with prediction to replace branch prediction, by using more hardware to do the task in less time. Instead of picking the result for an if statement when waiting for memory to respond and being wrong, you do both simultaniously and throw out the incorrect data. Sure its brute force rather then trying to be 'smart' but its faster. That 10% of the time your wrong is gone, so your better off.
I could go on, but I spent so much freaking time writing this for no reason. Don't need nor will likely get mod points, doubt you would care enough to learn. If you would like to know more, ask though. I'll leave you with this:
What happened to the good ol' days when programmers--real programmers--wrote very clever, small and fast programs? When it had to be written correctly or it didn't work?
Programmers have to write big programs, smart and clever in radically different and innovative ways. Design is no longer about size, but modularity, cleanness, reducing debugging and maintance time, and adding features. Larger code is acceptable if its better code - its easier to fix, and only slightly slower. Today's real programmers deal with designing massive, complex projects - not optimizing to hell for some platform or language. We leave the platform designers to optimize their end and the compiler to optimize to the hardware. Most real programmers have more important things to spend their time on.
If the controller card's bios allows it to boot, then there's tricks you can manage. Back when I began my shift over to SCSI, in '96, I had a 1gb IDE and a 2gb SCSI-2 drive. My bios didn't support boot from scsi and I ran NT/95. Since I wanted to keep the two seperated and run multiple OSes, I realized I could simply turn off the IDE controller in the bios. I thus booted from SCSI, loaded NT, and had full access to my IDE drive since (like Linux?) it ignores/by-passes the bios. If I wanted '95, turn it on. No problem.
If he has IDE and Firewire components, and runs a modern OS, then he could do the same thing. Turn off the IDE controllers (perhaps just the one with the harddrive, not CDROM/DVD so he can boot from them). The firewire card's bios thus boots the drive, the OS detects the IDE components, and he's cool.