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Xeons are EMT64 capable. ref: http://www.intel.com/cd/ids/developer/asmo-na/eng/ dc/64bit/index.htm

> Are they trying to kill Intel sales?

How about EM64T ? http://www.intel.com/technology/64bitextensions/

Maybe Intel isn't aiming for 64-bit desktop computing yet, but there are plenty servers running EM64T (P4 Xeon) already.

And I'm not even going to talk about Itanium 2... /me ducks

there may well still be a lot of legacy Pentium IVs around running just fine. Maybe we'll be able to get these guys to consider alternatives at that point?

Most Pentiums IVs can support 64 bit processes.

from Intel's website Scalability and performance with Intel® EM64T Intel® Extended Memory 64 Technology (Intel® EM64T) can improve performance by allowing the system to address more than 4 GB of both virtual and physical memory. Intel EM64T also provides support for 64 bit computing to help handle the applications of tomorrow.
The link can be found here

2.88MB 3.5" floppy drives used perpendicular recording.

Although they were done by Toshiba also, there's no way this 2005 patent is the canonical patent for perpendicular recording, as there is obvious prior art.

http://www.intel.com/design/archives/periphrl/docs /7281.htm

Ok. You can pick your switch blades, too.

They have it, it 's called the "Pentium Extreme Edition".

Intel® processor numbers allow you to quickly differentiate among processors within a product family and make more informed decisions.

And it continues: Guidelines

The processor number is not a measurement of performance, nor is it the only factor to consider when selecting a processor. The digits themselves have no inherent meaning, particularly when looking across processor families. For instance, 840 is not "better" than 640 simply because 8 is greater than 6.

Furthermore, linear increments between processor numbers may not indicate linear feature advancements. For example, the differences in processor features between an Intel® Pentium® M processor 760 and an Intel® Pentium® M processor 765 will not be the same as between an Intel® Pentium® M processor 765 and an Intel® Pentium® M processor 770, even though both pairs of processors are separated by an increment of five digits.

This is all in normal-size print with big blue headings. ( http://www.intel.com/products/processor_number/inf o.htm ) Doesn't look like they're trying to hide anything. Looks more like you're a lame troll.

I used to work for Intel at the Intel Architecture Labs.

Intel developed Tamper resistant software technologies in the 90's

http://www.intel.com/pressroom/archive/releases/in 110999.htm

Dave Aucsmith (a security architect at Microsoft) used to work at Intel in the
Intel Architecture Labs.

This is one of Dave's papers:

D. Aucsmith. Tamper-resistant software: An implementation.
In Information Hiding: First International
Workshop: Proceedings, volume 1174 of Lecture Notes
in Computer Science, pages 317-333. Springer-Verlag,
1996.

From what i remember of my hardware courses last semester, the newest x86 cpus are basically a cisc interpreter attached to a risc chip.

More like a translator that converts x86 instructions to a RISC-like internal representation, which might or might not be a reasonable instruction set for machine code. See The Microarchitecture of the Pentium® 4 Processor (the Pentium {Pro,II,III} and the Pentium M are similar in concept).

All apple would have to do is have intel make the chips: A. without the interpreter at all.. thus making it a different platform with added benefit of greater efficiency and cost savings to boot..

So are you asserting here that getting Intel to do the engineering necessary to remove the translation code, and developing a compiler for that instruction set, and porting to the new instruction set, would save money over using an instruction set for which compilers already exist and for which low-level machine support already existed in OS X?

or B. work with intel to make a different microcode interpreter.

...so that they still have to port the C/C++/Objective C compiler (and any JIT for Java), and the machine support in the OS, but not get any performance benefit?

(BTW, I think the conversion of instructions is largely done by hardware, not microcode.)

How about just get a Pentium M motherboard? Newegg has one, it's a little pricey as $250, but that's not super unreasonable. Power usage for the slowest Pentium M that Newegg carries is 21W nominal. The biggest problem you are going to have is the HDD's. It seems no one makes 5400RPM desktop HDD's anymore. So spinup power requirements are 16-30W per drive! A RAID 5 array with 3 more expensive drives is obviously superior to the 4 smaller, cheaper drives I normally advocate.

Huh? No reason you can't use Intel's compiler for AMD64 it if you like the code it generates (AMD64 supports SSE/SSE2).

Intel themselves even point out that their compiler supports AMD.

http://www.intel.com/cd/software/products/asmo-na/ eng/compilers/clin/220007.htm

Incidently gcc 4.0 does automatic loop vectorization using SSE/SSE2, so I wouldn't dismiss it too quickly either.

Despite what the freakin' article says, Lindenhurst (Intel E7250 chipset) is not the latest Xeon DP chipset (the often-cited GamePC benchmarks also use this chipset). Intel's latest Xeon chipset, the E8500 (Twin Castle), features dual independent FSBs running at 667MHz each. It's available now (e.g. Dell PowerEdge 6850 and PowerEdge 6800). The dual buses will be increased to 800MHz each in January (E8501 chipset). These new Paxville Xeons were released ahead of schedule (rushed in response to dual-core Opteron), so I think that's why the dual 800MHz bus chipset is trailing Paxville (which is capable of 800MHz FSB) by two months.

So I think the freakin' article is wrong when it says:

HEXUS have an article coming that evaluates the latest Intel Xeon DP platform, codenamed Lindenhurst... Lindenhurst (at its most basic definition) is the combination of the new Paxville Xeon processor in DP (dual processor) form (there's a multi processor version hosted by Truland), along with Intel E7520 core logic.

Despite what the freakin' article says, Lindenhurst (Intel E7250 chipset) is not the latest Xeon DP chipset (the often-cited GamePC benchmarks also use this chipset). Intel's latest Xeon chipset, the E8500 (Twin Castle), features dual independent FSBs running at 667MHz each. It's available now (e.g. Dell PowerEdge 6850 and PowerEdge 6800). The dual buses will be increased to 800MHz each in January (E8501 chipset). These new Paxville Xeons were released ahead of schedule (rushed in response to dual-core Opteron), so I think that's why the dual 800MHz bus chipset is trailing Paxville (which is capable of 800MHz FSB) by two months.

So I think the freakin' article is wrong when it says:

HEXUS have an article coming that evaluates the latest Intel Xeon DP platform, codenamed Lindenhurst... Lindenhurst (at its most basic definition) is the combination of the new Paxville Xeon processor in DP (dual processor) form (there's a multi processor version hosted by Truland), along with Intel E7520 core logic.

Intel's XScale (the followup to StrongARM) series is one of Intel's good products in my opinion.

Not that other ARM licencees are doing badly in comparison, and ARM themeselves have been shifting the focus up into performance as well, especially with the ARM11 and some multi-core stuff they're doing (IIRC they had a 1500MIPS multi-core sample at 300MHz).

The Cortex-M3 family is another interesting product, being a Thumb code only core. Presumably this is to attack the market that not even ARM7 extends down to.

The Hexus article is just a summary of their results along with several inaccuracies.

If you're I/O bound by your threads in any way, you can hit problems (all threads touch the MCH, then there's a 266MiB/sec bus link to the I/O processors to cross, then the data hits disks or network hardware). If you're memory subsystem bound in any way, especially on a majority of compute threads, performance is likely gone.

Here is a link to the intel datasheets for the chipsets which shows 3 x8 PCIe interfaces for the 7520 and 1 for the 7320. http://www.intel.com/products/chipsets/E7520_E7320 /

All that being said, the CPU itself is a dog.

Intel released their machine-code-level spec a couple months ago. I'm not sure AMD has released theirs yet. But yeah, they just do a couple minimal changes. I haven't seen a good technical review of it yet. I understand the document generally, but I don't know if all the I's are dotted and the T's are crossed.

Here's a link for Intel's Virtualization Technology .

Yep, the Mountbatten building houses most of the electronic / microchip facilities for southampton. According to my brother (a student there), the fire's taken out the Clean Room, used for chip fab. Seeing how the cost for building clean rooms start in the millions, that's gotta hurt.

Are you sure? I think most modern motherboards with 4 DIMM slots support dual channel operation with 3 DIMMS if the third DIMM is equal in size and speed to the total of th first 2 DIMMS.

For example, I recently built a cheap-ass system with an Intel D915GUX (915G chipset) motherboard. I chose to install 512MB in dual channel (2x256). According to the manual, I can upgrade to 1GB by putting both 256MB DIMMS into one channel's DIMM slots, then putting a new 512MB DIMM into one of the other channel's DIMM slots.

Are you sure? I think most modern motherboards with 4 DIMM slots support dual channel operation with 3 DIMMS if the third DIMM is equal in size and speed to the total of th first 2 DIMMS.

For example, I recently built a cheap-ass system with an Intel D915GUX (915G chipset) motherboard. I chose to install 512MB in dual channel (2x256). According to the manual, I can upgrade to 1GB by putting both 256MB DIMMS into one channel's DIMM slots, then putting a new 512MB DIMM into one of the other channel's DIMM slots.

Well, there is this...

A PII 450? I think you mean a PIII. Anyhow, I've got a few laying around for a much more reasonable price.

Oh noes A Celeron! It might have *gasp* half the cache! Centrino is just a buzzword for a Pentium-M Processor with a certain kind of intel wireless chipset. Big fucking deal. And guess what else? Celeron-M processors are exactly identical to Pentium Ms other than the cache and clock speeds. Same pipeline, same architecture, same power-saving features. Same great performance per-clock compared to the P4. Celeron Ms are more than fast enough for people just wanting to do office stuff. They're a perfectly fine value processor - not a high-performance one - and certainly not something to be avoided like the plague.

Perhaps you should look at these two links before you post another ill-informed post bashing an intel processor.
http://www.intel.com/products/processor/celeron_m/
http://www.intel.com/products/processor/pentiumm/i ndex.htm

Oh noes A Celeron! It might have *gasp* half the cache! Centrino is just a buzzword for a Pentium-M Processor with a certain kind of intel wireless chipset. Big fucking deal. And guess what else? Celeron-M processors are exactly identical to Pentium Ms other than the cache and clock speeds. Same pipeline, same architecture, same power-saving features. Same great performance per-clock compared to the P4. Celeron Ms are more than fast enough for people just wanting to do office stuff. They're a perfectly fine value processor - not a high-performance one - and certainly not something to be avoided like the plague.

Perhaps you should look at these two links before you post another ill-informed post bashing an intel processor.
http://www.intel.com/products/processor/celeron_m/
http://www.intel.com/products/processor/pentiumm/i ndex.htm

Xeon-based blade servers produce to much heat density (about 15 Kilowatts per rack) and conventional data center cooling systems cannot remove 15 Kilowatts per rack, only about 4 to 6 Kilowatts per rack.

Unfortunately, testing and verification does not insure 100% "correctness". Some problems are only likely to be found via code inspection (or in some cases, more efficiently by requirements, architecture, and design reviews - but ultimately, flaws upstream are reflected in the code).

NASA works pretty hard at test and verification of its software, but still missions, such as this or this (pg 26) [PDF warning], have failed due to software problems (bugs and/or design flaws) or process errors. Recall also the little division problem on Pentium chips which was caused by a lookup table having a few entries downloaded incorrectly - and Intel surely did a lot of testing, yet missed this flaw.

I don't know anything about how breathalyzers work. However, it would not surprise me to see that various calibration information (perhaps "known sample", factory calibration of internal sensors, and/or calibration to "zero"), environmental factors (temperature, humidity, and/or barometric pressure), and tested sample information (volume and/or temperature) are factored into the final "BAC" number displayed. There may also be lookup tables (which may have been downloaded incorrectly) involved as well. It is likely impossible to test all combinations of factors (since, if nothing else, doing so would probably result in the product not shipping for many, many years - by which time it would be obsolete).

For these reasons, I don't think that it is possible to say that a breathalyzer is "tested and verified". Since the freedom of thousands of individuals every year depends on the correct operation of breathalyzers, it seems like good public policy to open up the source code, circuit designs, and specs for viewing by all. Note this would not require relinquishing copyrights or patents on these materials.

That word you use, I don't think it means what you think it means.

http://www.intel.com/products/centrino/

Intel knew what they were up against and somehow didn't cut it? Intel has been the masters of their domain for a long time and I'm rather astounded that they couldn't come up with something to 1-up the competition this go-around. They have so much in the way of resources to throw at this too.... why?

The miss penalty times I googled for review site where they'd benchmarked it. If you look, you can probably get more accurate numbers from Intel. For the disk latency, the manufacturer of a disk will generally report some sort of access latency number, but overall, a "fast" 7200 RPM disk has a latency of about 8 ms.

So far as how malloc() works, well, it is open source. But some discussion on malloc design can be found at http://gee.cs.oswego.edu/dl/html/malloc.html. More simple information can be found linked at http://www.cs.utk.edu/~plank/plank/classes/cs360/l ecture_notes.html (again, just a quick google).

Mostly, it comes down to that my area is systems and architecture. My job is to know all those little details about how things interact. This was just a quickie. No guarantees it is right--I'm using other people's numbers, and just my recollection of how malloc() behaves. If this were more serious than /. then I'd dig through Intel's processor manuals for more exact numbers, figure out which (if any) of those latencies can happen in parallel, measure things myself to verify, etc. I'd also write a small program to do a lot of mallocs and frees and see what addresses are returned to verify the locality properties.

If I were really really serious, I'd come up with a benchmark program that allocates and frees memory, of various sizes with various working sets and object lifetimes, and measure the execution time for both Java and C. I'd use something like VTune (http://www.intel.com/cd/software/products/asmo-na /eng/vtune/index.htm) or SimICS (http://www.virtutech.com/) (with a timing model, say GEMS (http://www.cs.wisc.edu/gems/tutorial.html)) to analyze exactly where the differences are coming from.

And then I'd write it up and submit the results to SIGMETRICS, PLDI, OOPSLA, or some other conference, because I just spent a metric butload of time tracing down shortcomings in the GC implementation of various JVMs as compared to programmer managed memory allocation. If somebody is willing to pay me, I still might, but as it is, back of the envelope is all you'll get.

Has the decision just to do with consumer's interest or is it more related to sale of their viiv based products? Consumers won't buy PC based digital home theatres, if they won't be able to rip of their movies from the disks (HD-DVD or Blu-ray) and put it on their PC's hard disk.
Just my 2 cents

Totally. I've had nothing but trouble from Intel's 'PROSet' utility. I've been having a fight at work just being able to get onto the network on wireless at the moment... Though its given me some excuses not to do much work, maybe this might help someone else too.

Basically its a fault with the power management function on Pentium laptops with the 2200BG card.

[Yet I have no trouble on my own Gentoo laptop with a dodgy PCMCIA Broadcom card... I wish I didn't have to use Microsoft here... *sigh*]

http://jkontherun.blogs.com/jkontherun/2005/08/int el_proset_22.html
References a Power Save Polling problem with the access point.

There's plenty of details on this really hidden page:
http://support.intel.com/support/wireless/wlan/sb/ cs-006205.htm

Hope that helps someone else with one of these crappy Intel PROSet cards. Time to reboot again I guess... I just hope I can post this message before the card kills itself again. :)

Dug

That's exactly what the Virtual I/O Server is. You can get it with any p5 system that has APV (Advanced Power Virtualization). However, it's a skinnied down version of AIX instead of Linux.

The VIOS acts as a broker of disk and communication resources. You can have one ethernet adapter assigned to a VIOS and create upto 20 virtual LAN's and basically an unlimited number of SEA's (Shared Ethernet Adapters) for client partitions.

As for disk, you can have one SCSI controller and create vSCSI adapters on the client partitions so the clients can utilize the same SCSI controller as other partitions. You can break it down to the device level (each pysical disk) or to the lv level (a section of a volume group).

For those of you who think this is just an IBM thing, I hear Intel is planning to support virtualization shortly as well for Windows systems. AMD is also on the bandwagon. Not to mention that HP has vPAR's and nPAR's and Sun is working at it a different way with containers.

Bottom line is virtualization is getting huge fast. It's been proven to decrease cost and increase system utilization and availability.

I mean, there exist many fast IMAP clients. Certainly Pine is fast, some (e.g. myself) find it very convenient, and it should be easy to recompile for OS X. It is not free software though.

More seriously, today's software market is such that selling a small app for money is not likely to be profitable. Too many people will write email clients, editors, OS kernels ... and give them away at no cost ("free as in beer"). Most of that software is actually Free Software (TM), but that's beside the point here. This is not dissimilar from the period in the 80s and early 90s when anytime someone would start selling a nice utility Microsoft would bundle similar functionality into DOS or Windows (anyone remember SideKick?). Today that means taht if your piece of software does something not too complicated, and many people would like to have this functionality, then someone will develop a free alternative. When it comes to web-browsing or e-mail reading, you have to content with massive efforts like the , which is even worse.

This is not to say there's room for commercial software today -- but it's in a different market. Since the cost of distributing software is now about zero, and the cost of writing it is effectively small (in the sense that many projects find many people are willing to donate their effots), to charge for software it must embody something more -- some kind of expensive research or expertise that is difficult to duplicate in a community project.

For example, GCC is a great cross-platform compiler, but if you need a good optimizing compiler you will pay for the real thing: 's ICC, or Sun's compilers. In a different field, there is little competition for AutoCAD.

Enterprise class means it's designed to be deployed across an entire enterprise/organization with centralized management, out of the box.

You're awfully generous to the vendors out there. Let's take a look:

Seagate sells "enterprise class" Cheetah hard drives. How one would deploy a hard drive across an entire organization with centralized management does not immediately jump to mind.

Intel makes "enterprise class" chipsets.

Logitech's V500 Cordless Notebook Mouse is apparently a true enterprise-class wireless solution.

I just chose three companies at random and plonked in "site:companyname.com enterprise-class" into Google.

1) Copy one

This is ok - you're allowed to do that.

2) Remove protection

This won't work - the copy is encrypted.

I had a look at the CPRM documents, and it seems to depend on two things, firstly that the protected material is always encrypted. The second is more subtle - that software that plays it needs to license the keys, and the company that makes it will need to sign an agreement not to provide unencrypted content to get the license.

Of course someone could pay up the cash or get hold of the keys and create a libuncprm. But then I think the compromised keys could be revoked, and that someone could get sued. If you copied the encrypted data, it won't decrypt because the media id is hashed into the decryption key, so changing media will break the decryption process. Also, at least in the US the DMCA would criminalise parts of the cracking process.

And they've learnt from CSS too - the keys may be secret, but the encryption algorithms are open sourced and peer reviewed, so the encryption won't have flaws like CSS did.

http://www.intel.com/standards/case/case_cp.htm

Be afraid, be very afraid.

What's wrong with Intel or gcc?

I also can't imagine that any of the clicks the advertisers get are legit. It's probably mostly accidental clicks as people are navigating around.

Of course, the best thing would be to encourage people to make their sites a little more user-friendly with more than a few words of text on each page. But barring that, some form of ad blocker that finds and kills these things would be a good idea. Maybe someone can write one for Firefox and Internet Explorer?

Actually, this has more to do with Intel pushing a . They expect leakage to be reduced by over 100 times.

Basically, the article is simply parroting what the Intel marketing department has been told by their engineers: that leakage current will be reduced by allmost 1000 times. The Intel marketing department is simply palming it off as some newfangled "ultra low power" process, when it's been on the roadmap the whole time.

That is, if the reality about high-K comes anywhere near Intel's claims. I recall quite clearly Intel skipping out on SOI, and claiming quite calmly to the world that strained silicon would solve all their problems in the move to 90nm. That didn't happen. Ultra-aggressive dynamic power-saving modes and the Pentium M are the only things that saved Intel's 90nm process.

Will be impressive if they actually get results in the same ballpark as their estimates, though.

This is the typical Intel announcement:

- Zero details
- How much performance penalty?
- What technology is utilized?
- Are we smoking crack?

Nobody knows (even us)! We just like to put out press releases. Read about our next generation architecture. What is it? We haven't a fucking clue!

But we like to issue unannouncements! We're Intel!

So, according to the article, we will see this commercially around 2008-2010.

Justin Rattner tells us that in 2015, we should expect to see real-time super-resolution from cell cameras. That is, the ability to pick up several frames, and figure out more about the image, in real time, just based on the offsetting from holding a camera with a minute unconscious shake. (The problem is parallelizable, and 2015's x10-x100 core systems should take care of it.)

We already have the software to construct models & textures, after some rendering, from video footage.

If we could do real-time super-resolution in 2015, then it makes sense to me that, with some processing time, cell phone cameras in 2015 will render 3D-model textures and models. If the 4G network is around by then, (and it should be,) we could very well see instead that the data is sent to more powerful processing arrays elsewhere, (ie, on your home computers, or on Google's computers) and rendered into models in real-time. 4G is around 20Mb, perhaps 3G at 3Mb is enough to transmit low-grade video capture in real-time; Enough to make our 3D models in real time as well.

Presently, the OCR cameras require some rendering time. That requirement will clearly be gone by 2015; The cameras will automatically OCR text that is identified on-screen. (Perhaps the alarm will be a constant chirping buzz, whenever you use it?)

As a side note: Perhaps Google maps of the future will learn about what street names go to what streets, simply by recognizing and reading the sign posts.

What do you want to bet Google's going to get video footage of every city, and crank it into full-on 3D models? You better believe it. I'm betting on 2015, tops. (Who knows; I wouldn't be shocked if they weren't cranking on their Seattle footage now.)

We should also expect, I think, that the public will assemble it's own models from public footage. Volunteers will capture footage with their cell phones (or, if they are showing off, sophisticated digital video recordsers,) and feed it to a public free culture grid, which will churn out 3D models and textures for distribution and retrieval.

Is there a flaw in my reasoning? Are these outlandish thoughts for 2015? No! You can't have your Flying Car! Down boy! Retrain your imagination! Yes, people have predicted the future before; read about NISTEP's 1970's predictions for 1990-2000.

You're SO full of shit.

20050108591 - "A method includes adjusting the clock speed of a central processing unit (CPU) as a function of the output of a performance monitor forming part of an operating system controlling the CPU. The method can be implemented on battery powered devices and on non-battery powered devices."

So, your brilliant idea is to slow down a CPU to save power? Hmmm, I wonder who else might do that.

Your other patent app doesn't even show up in the system. You're either a fraud or you're insane. Either way, shut the fuck up.

By the way, I'm going to make sure that I use Google AND click on the ads as much as possible. Freak.

1) Nylon is not a good conductor, so it will keep the charge, and only the surface you touch will interact, but not on a fatal manner.
2) by keeping on moving. It's fairly easy to build up elec. charge this way. Like rubbing a cat. 10 or 20k is easy to achieve for a human with the right clothes. And he was wearing them...
3) That is what I would like to know as well. You will not feel discharging of yourself when voltage lower than 3000 Volts, however. But with 40k, I probably don't want to be the doorknop :)

here you learn more about ESD (those yellow stickers in the router room) Intel is very aware of this, as is any other semiconductor manufacturer. Don't we all want to look like this in the office :-)

Intel specifically does CPUs? Since when?

http://www.intel.com/jobs/Israel/

80 million was a low estimate 160 million was the high estimate. the point is it does NOT cost $600 for intel to produce and sell a CPU. Was that 5 bn for this year alone? or was it for the 4 years they've been selling P 4 CPUS? if it was for this year alone your number of $62-31 per chip remains valid, if it was the 'total development cost of the current p4 chips' then that development cost is being spread across multiple years sales, and the product has a life cycle of 18-24 months.. then the cost falls to somewhere in the $40-10 per chip range.

i appreciate being corrected but, no-one really did a very good job of pointing out that the total cost per chip is averaging out well below the average selling point of pentium 4 chips. intel is minting money, because people are willing to pay $600 for a 'good' perfomance chip.

here, read the profit and growth expectations from the horses own mouth http://www.intel.com/pressroom/archive/releases/20 050908corp.htm
Double digit growth, and they gross 60% profit. 60% that means for every dollar they take in only 40 cents is going to operating costs, including marketing etc. nothing wrong with that, just pointing it out. some people on the internet are making profit selling prescot 2.4 ghz chips at $112 a chip, that means intel is selling them at or below that price. Even if you consider that a large volume of the chips intel sells are the 'slow' chips they are not taking a 'loss' on any chip they sell, not with the profit margin they're showing.

So are people paying $1,000 for a Pentium 4 d Extreme being ripped off? of course ;) there is no way in hell it cost intel more than $100 to make that chip, including R&D costs. and yes I know they have to 'hand pick' chips that will run that fast because they were on the best silicon and were etched flawlessly. They price them at $1,000 a chip in part so that they can realistically supply as many 'Extreme' chips as people who are willing to pay $1,000 for them.

Also they could be trying to avoid undercutting AMD because they probably could easily, if they decided to stop minting money and just ruthlessly price everyone else out of the business. Simultaniously AMD is bitching about Intel having the power to Set prices artificially high etc. when if intel decided to say got for a 10% profit margin they would say drop the average price of a chip to $120, while still maintaining some sort of tier structure to make sure they could supply enough high speed chips.. and AMD would be borrowing money to sell chips at the price intel could, because unlike intel they only have 8-16 million chips a year going out the door...while the R&D costs remain largely the same.

intel mints money with every chip they sell, no matter if those chips cost $40, $76, or $96 a chip to produce...

Yeah, I don't think the marketing info on that page is going to help much.

Trying looking through the Intel Annual Reports, copies of which must be filed with the SEC and so probably contain more "reliable" figures.

In fact, the Quarterly SEC filings with more up-to-date figures can be found here.

Alot of people are correctly pointing out the sloppy 'news' reporting by slashdot these days by pointing out the costs or R & D, marketing, etc... that should also be factored into the per-chip cost.

Well here's some Intel Financial Data. Please use it responsibly. Surely somebody with some smarts can use this to determine a 'real' per-chip cost.

Some numbers from their financial report...

For 2004, Intel had a net income of US$7.5 billion on revenue of US$34.2 billion.

Overall tax rate expected for 2005: 31%
(With 2004 earnings as a guide, taxes will be US$10.6 billion)

Their expected R&D budget for 2005 is: US$5.2 billion

Capital spending for 2005: US$4.9-5.3 billion

Overall, Intel pays 31% of their revenue in taxes. 30% in Capital spending and R&D, which leaves 39%, or US$13.4 billion, to pay salaries, benefits, cost of fabrication (not including the facility itself), cover the cost of their bad chips/wafers, and sending some cash to their stockholders.

> WiMax is a FIXED, POINT TO POINT multiple access protocol
> for backhaul, NOT end users.

You are mistaken. It's intended for both backhaul and end-user access.

> Why the vendors don't just explain it in plain english is beyond me.

Intel's main WiMax page explains it right at the top:

"WiMAX is a standards-based wireless technology that provides high-throughput broadband connections over long distances. WiMAX can be used for a number of applications, including "last mile" broadband connections, hotspots and cellular backhaul, and high-speed enterprise connectivity for business."

Here's a link I found on google, entitled "WiMAX News, Events and Training"

http://www.intel.com/netcomms/events/wimax.htm