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To be honest, if it's just a BIOS clone, I won't be interested anyway - wake me up when someone recreates OpenFirmware for the PC.

Intel is actually trying to get rid of BIOS (that is controlled by PHOENIX), pushing its own "Extensible Firmware Interface" (http://www.intel.com/technology/efi/), which seems to be something like OpenFirmware reinvented.

The license on the download page looks like a standard 2 clause BSD license.

actually, Intel cooperates quite a bit, by maitaining their own network cards or providing 2 or 3 developers for the linux acpi subsystem:

diego@estel ~/kernel # grep -i @intel.com MAINTAINERS | wc -l
11

Real SMP has two CPU's, two instances that can really work at the same time: do calculations at the same time. The scheduling is different.

I'm not an expert, but you can read about it in the following articles:

• Hyperthreading Technology (Intel)
• Operating Systems that Include Optimizations for Hyper-Threading Technology (Intel)
• Windows 2000 and the hyperthreading nightmare (The Inquirer)

Real SMP has two CPU's, two instances that can really work at the same time: do calculations at the same time. The scheduling is different.

I'm not an expert, but you can read about it in the following articles:

• Hyperthreading Technology (Intel)
• Operating Systems that Include Optimizations for Hyper-Threading Technology (Intel)
• Windows 2000 and the hyperthreading nightmare (The Inquirer)

what happened with itanium is intel made a number of huge gambles on technology.

in order for itanium to be successful, every single one of them had to pan out.

what happened is virtually none of them panned out.

intel blew their load on a high risk gamble, and lost. they still can't quite come to grips with the fact and are still sinking billions of dollars into a doomed architecture -- despite the fact that just about every original itanium partner has already given up on it (err.. "jumped ship", hence the itanic joke)

intel has been beating on itanium for nearly a decade and it still hasn't lived up to a single design goal.

and before the itanium defenders go "no, itanium was only ever intended for rackmount servers", that is 100% contrary to intel's own marketing literature which states that "workstation" is one of the target markets of the itanium.

Something I will note is that Intel have responded to competition from the Opteron and significantly revised the design of the Xeon several times now - upping the memory bus from 400MHz to 533MHz to 800MHz with the current models. Further, the amount of cache varies dramatically too; from 256KB L2+512KB L3 to 512KB L2+4MB L3 to 2MB L2 + 0MB L3 - this table gives you the rundown. Saying 'Opteron beats Xeon by x%' isn't really very informative unless you specify which model of Xeon you're talking about.

Finally, unless I'm wearing my computer systems architecture hat (I still have a soft spot for it, as it was my official degree title :), I don't care about performance/clock cycle, only about performance/£. Systems based around AMD's chips generally thrash Intel's on the former, whilst not always being so convincing on the latter (usually due to higher chipset/motherboard prices, IME).

Intel has been including hardware RNGs in their chipsets for a while now. Apparently, this is a truly quantum random number generator, although that could be so much marketing material. A quick Google doesn't turn up any obvious pages disputing this, although I didn't look too hard. Wikipedia has more info.

Personally though, I think we need to create even more synonyms for simulator/emulator/virtualizer so we can all be just a little more confused.

Personally though, I think we need to create even more synonyms for simulator/emulator/virtualizer so we can all be just a little more confused.

"This is achieved by duplicating the architectural state on each processor, while sharing one set of processor execution resources."

From this page: http://www.intel.com/technology/itj/2002/volume06i ssue01/art01_hyper/p03_htt_architecture.htm

"Hyper-Threading Technology makes a single physical processor appear as multiple logical processors [11, 12]. To do this, there is one copy of the architecture state for each logical processor, and the logical processors share a single set of physical execution resources."

And:

"Logical processors share nearly all other resources on the physical processor, such as caches, execution units, branch predictors, control logic, and buses."

The HT processors take advantage of the idle time in one thread by allowing the other thread (logical processor) to use the core. There is only one core and hince NOT true SMT. You can only have true SMT by having multiple cores.

I don't think the optimization you speak of will work.

It actually works already. Get yourself Intel's or Sun's (for Solaris) compiler and see for yourself.

What happens if the code in the loop changes the value of i?

A fairly trivial problem given today's state of the art and science of compiler design. I trust, gcc will have this optimization soon too -- if it does not already.

Also compiler errs on the safe side, but there is a standard called OpenMP, which specifies compiler pragmas, with which you can assure the compiler, that certain things can be parallelized, even when it is not obvious to it.

The technical advances of the computer industry in terms of transistor size, memory density and cost are unique to say the least. To expect any other technology to advance as rapidly, expecially battery technology, for any reason is wishfull thinking at best.

When Gordon Moore made his famous observation in 1965 (http://www.intel.com/research/silicon/mooreslaw.h tm/) almost nobody believed it would hold true for more than a few years. The fact that it has held true for some 40 years is simply a miracle.

According to the docs at http://www.intel.com/support/motherboards/server/s e7520bd2/sb/CS-013543.htm, this board supports up to 24GB with the right kind of RAM, assuming you can find 4GB RAM. With 2GB sticks, you could get 12GB.

The PCI Express Mini Card specifically targets addressing system manufacturers' needs for build-to-order (BTO) and configure-to-order (CTO) applications rather than providing a general end-user-replaceable module. This form factor has characteristics more typical of an "embedded" application including the platform integration of the media interfaces such as communications connectors or wireless antennas.

The Cisco MPI350 cannot be sold as an aftermarket adapter because ... Regulatory certification is based on the MPI350 being coupled with a particular antenna. Although modular regulatory approvals are available, they only apply to the original equipment manufacturer (OEM), who is responsible for embedding similar antennas in different devices. Modular regulatory approval does not eliminate the restriction on aftermarket sales since the end user might embed the adapter in devices with unapproved antennas.

Intel platforms supporting VT [Vanderpool hardware virtualization support] will ship in 2005 for desktop and Intel Itanium Processor based servers, so running Windows underneath a virtual machine manager will become even more popular than it is now, so it's a tossup. Agreed though, OS security is harder to control if you allow some outside piece of code to be called every time you try to talk to hardware. (eg. hundreds/thousands of times per second)

Intel platforms supporting VT [Vanderpool hardware virtualization support] will ship in 2005 for desktop and Intel Itanium Processor based servers, so running Windows underneath a virtual machine manager will become even more popular than it is now, so it's a tossup. Agreed though, OS security is harder to control if you allow some outside piece of code to be called every time you try to talk to hardware. (eg. hundreds/thousands of times per second)

The CHIP is 16mmx16mm, the waveguide built into the chip is "folded" to fit 1.5x1.55x48000 micrometers.

Bet it you look at a road map of any city, you will find that the sum of the length of all the lines on the page is greater then the any of lengths of the edges of the map, too.

But I have a more fundamental question, one which I have not been able to determine in spite of having read the cited articles (Yes, we A.C.s CAN read the fine articles on occasion):

WHAT IS THE WAVELENGTH OF THE OUTPUT???????????

IANASLS (I am not a silicon laser scientist), but if I was would I be able to calculate the wavelength from all the values tossed about in the articles? Continuous red lasers are no big deal, a continuous violet laser would be reasonably impressive (at least to me, but I like purple), a continous deep UV or better laser on a chip this size would make for lousy light shows at the planetarium but could bring the cost down on communications central offices by several orders of magnitude, even more so if the output can be tuned. Or something like that.

It took reading the Intel glossary to the Intel press release to find the following:

Wavelength conversion - The process of taking light of one wavelength (color) and changing it to another wavelength (color). In communications, more data can be transmitted by sending multiple wavelengths of light down the same optical fiber. Wavelength conversion allows the switching of data from one wavelength to another. The Raman effect in silicon can produce such a wavelength conversion.

Which still doesn't tell me the wavelength of the laser (or the range of wavelengths), but only that the effect Intel is exploiting COULD probably produce multiple wavelengths across some undefined range.

P.S. To all the news sites that took Intel's press release and just moved sentences around to make it look like some thought or maybe even research went into the writing instead of merely repeating the Intel press release, most universities (at least my alma mater) consider that a crime more heinous then 2nd degree murder. If you wanted to be a writer, WRITE!

Hybrid optical-electronic chips are ussed mainly in highspeed net hardware. $$$ is the reason you haven't seen them in your desktop. I am fascinated by it more than quantum because it seems far off.

optoelectronics defined by Intel article.

More info. Just google Optoelectronics.

(1) fetching and prefetching (multiple P4 stages) because the extra processors on Cell can directly address their local 256KB of memory.
(2) decoding x86 instructions into microops - since the extra processors are running code directly rather than running kludgy x86 code on a non-x86 microcore
(3) branch prediction (since the load penalty is a lot lower due to local 256KB of memory and shallower pipeline, these stages are unnecessary)
(4) scheduling the microops isn't necessary as Cell will require that to be done in software during compilation (ala VLIW)
(5) retirement (since Cell isn't doing out-of-order execution, no reordering and retranslation from the microop to the x86 world is necessary)

So given that potentially half of the 20 P4 stages (later P4s have 31) are unnecessary, that saves a lot of logic and allows the same clock speed with less stages. There has (apparently) been a lot of architecture work here to think through what adds the extra hardware and how to avoid that... the result is the ability to use higher clock speeds without having the same types of penalties the IA-32 processors encounter.

I use a four year old Intel Create and Share USB webcam with GnomeMeeting. Decent enough picture with average light.

Why not go used? Looks like there's plenty on Ebay.

In the normal world, "x86-based systems" are "open" in the sense that anybody can build them

Umm, anyone can buy them from Intel or AMD and resell them.

"Them" here, of course, referring to Intel's x86-based systems, such as their blade servers, rather than to their chips, as "x86-based systems" refers not to x86 chips, but to systems based on those chips (as per the use of the words "based" and "systems").

Yes, one could do that, but one could also design and build one's own systems based on x86 chips, and a number of companies do that.

With PPC anyone can build them and sell them.

Yes, anyone could license PowerPC or Power Architecture or whatever IBM's calling the instruction set architecture these days, but I suspect most people building general-purpose computer systems based on PowerPC processors aren't building their own chips, so it's not clear that the fact that they could, in theory, do that is particularly relevant to the discussion that the original poster started.

Gee that's great, but we weren't talking about OS X systems, we were talking about PPC and x86.

Perhaps you were, but the original poster was talking about "Apple hardware", which isn't "PPC", it's systems one or two of the components of which are PowerPC processors and the other components of which are other chips, some custom from Apple and some from various vendors, and about "x86-based systems", which are't "x86", they're systems one or more of the components of which are x86 processors and the other components of which are other chips, custom or from various vendors.

Ohhh... so it's kind of like Linux?

No, cause Linux has driver support

This sounds similar to Intel's Thermally Advantaged Chassis (TAC) guideline, which is recommended for Prescott processors. The current version of the guideline (version 1.1) includes a 92mm rear exhaust fan and an 80mm (3.1") "side-panel air duct."

From Intel's site:

A thermally advantaged chassis can be recognized by a hollow tube attached to the side panel called a chassis air guide which has flared ends. This tube will funnel cool air towards the processor passively, without fans.

If anyone cares the P200 (non-mmx) had a max power dissipation of 15.5watts, the P166 14.5watts, and the P150 was 11.6watts. See page 31. Other legacy spec sheets.

If anyone cares the P200 (non-mmx) had a max power dissipation of 15.5watts, the P166 14.5watts, and the P150 was 11.6watts. See page 31. Other legacy spec sheets.

Or is this just another advertisement pretending to be a story, with the submitter trying to play ignorant about alternative Altivec and MMX libraries ?

Right here, documented by Microsoft itself.

hardware must also be nexus-aware, and processors must include the Secure Software Component (SSC), also known as the Trusted Platform Module (TPM)

As a matter of fact I was originally looking at a different refference page, but in finding this new page I first see they intend to require the Trust system to be in the CPU itself. And yes, Intel is already shipping Prescott CPU's with embedded Trust circuitry. I don't know if AMD or anyone else is already shipping Trust-CPUs, but they all have Trusted CPU projects.

Note that Longhorn will likely partially run on a non-Trusted CPU, but it will not fully work. And whether it is enforced by OEM windows licencing or simply by market realities, PC manufacturers are not going to be able to ship machines that are not CertifiedWindowsCompatible.

Microsoft simply declared that Trusted-compliance will be required for Certified Windows Compatibility and *poof*, hardware makers have no choice but to make their next generation of hardware Trusted Compliant.

And if some PC maker *did* make a non-TrustedCompliant machine, what's going to happen? Simple, various portions of Longhorn will bitch and scream error messages and fail to work and Microsoft's answer will be that it's the harware maker's fault, that the hardware is incompatible. That you should either ask the hardware maker to "fix" the "problem", or that you need to buy a new compatible machine.

And with every new PC being shipped Trusted Compliant, it would only take about 3-5 years for ISPs to be able to make Trusted Compliance a mandatory part of internet Terms Of Service. And it will be heralded as ISP's Blocking Viruses at the Router.

Damn, I was going to provide a BSA.ORG link to the president's Cyber Security Advisor's speech but the link is dead. He gave a speech at a Washington DC Global Tech Summit. He called on ISPs to plan on making Trusted compliance a mandatory part of their Terms Of Service, part of the plan to Secure The National Information Infrastucture against viruses and against Terrorist Attack. And the audience applauded.

If there is no public backlash against Trusted Computing then somewhere around 2009-2011 it may be impossible to get onto the internet at all unless you submit.

-

Here's the fixed links:

http://www.nersc.gov/

http://www.intel.com/technology/infiniband/

What you probably meant is every new Geometry needs a new Fab, and even that is not true.

The geometry problem is a Litography problem. As the channel length decreases you need a smaller wavelength in order to resolve it on the stepper.

So we have deep UV Litho, and phase masked Litho, and even xray Litho. Every time someone predicts Moores law is going to fail someone comes up with a new way of patterning at that geometry.

Intel has a nice paper here.

Anyway, as the guy from HP in an earlier post pointed out, this is a research project, and not a working Engineering Model. Even if HP get this working the Overheads of converting all current chips to this are going to be enormous. Silicon is here for quite a few decades yet.

BlindShep

Intel has a good overview on what leakage is all about. Leakage has nothing to do with jumping wire channels, although the electric fields generated between one wire and another in small process geometries cause signal integrity problems such as noise and delay.

"...this thing is not a transistor... hence, end of moore's law."


If you look at the orignial paper, Moore is talking about "components," not specifically "transistors." There's no semantic reason why this couldn't continue to apply to the new technology.

No, Itanium silicon did not exist in early March/April of 1999. Incomplete reference: http://www.intel.com/technology/itj/q41999/pdf/por ting.pdf but you should be able to figure it out.

Intel added the x86-64 instructions to the Xeon line and called it EM64T.

Read up!

http://www.intel.com/technology/64bitextensions/

Dont forget Processors 0 and 1 (8086 and 80186). This number scheme lead to the use of people refering to machines by (P)rocessor revision. ie, i386 was a P3, a i486 was a P4, and a i586 was a P5. Then Intel started naming things Pentium and suddenly we had P-MMX, P-Pro, P-Classic, PII, PIII, and PIV. Can you suddenly imagine the alphabet soup when the AMD, NexGen, Cyrix, and IBM chips with their labeling system using k's, M's and Nx's.

Am I liable to pay a fine too?

The usual IANAL, but a lot hinges on this: Intel apparently didn't indemnify its customers against patent infringement that might apply to its processors, so its customers are liable as well, since they also used the patented technology. The one exception so far is Dell, which apparently has a different agreement than the others who have been sued so far. See Intel Settles Intergraph Patent Litigation. Here's a quote:

Dell has a unique indemnity agreement with Intel that Dell claims obligates Intel to indemnify the company from patent infringement claims in the litigation which relate to combining Intel microprocessors and other components in Dell systems. Intel disagrees with Dell's interpretation of the agreement, but has decided to remove the current dispute from the courts and resolve the disagreement privately.

Intel's web page for that board is here and the detailed specifications are here.

On page 14 of that PDF you'll note that the two 32/66 slots share the same bus, rather than being independent.

Added to that:

It's only got 10/100 ethernet onboard. I imagine if you don't already have gigabit you'll want it soon and while a 32/33 GB card will probably give you as much speed as you'll get anyway with low end consumer equipment, it's still going to be bogging down the bus that everything else is on.

Those are old 5v PCI slots. Newer cards may not work in them.

The motherboard probably won't handle the newer, high-density PC133 SDRAM and may even *require* ECC RAM. Big $$$$.

The first board you posted was much better (and, I'd imagine, much more expensive). If you want to look for second hand equipment, try to find something that's either an intel P4 or P4 Xeon motherboard, or a P3/P3 Xeon board using a Serverworks chipset.

The board I used in the filserver I built for work was this one. It's got three 64/66+ slots, although they do all share a bus (but a 64/66 bus has quadruple the bandwidth of a 32/33 one), onboard GB and 10/100 ethernet. There's also a variant with onboard SCSI. I imagine it would be quite sufficient for any tasks you'll need it for :).

Also, if you're looking for a 4 channel card, I use one of these in my home server. However, I don't use the hardware RAID features it has - I prefer Linux's software RAID. It is a 32/66 card, but unfortunately it requires a binary kernel driver from Promise (at least on 2.4 systems). I've not had any problems with it at all.

If you haven't already purchased the drives, I'd strongly recommend going SATA. The easier cabling is worth it in itself, IMHO. Certainly when I add another 4 (x200GB) drives to my system in the very near future they'll be SATA.

Intel's web page for that board is here and the detailed specifications are here.

On page 14 of that PDF you'll note that the two 32/66 slots share the same bus, rather than being independent.

Added to that:

It's only got 10/100 ethernet onboard. I imagine if you don't already have gigabit you'll want it soon and while a 32/33 GB card will probably give you as much speed as you'll get anyway with low end consumer equipment, it's still going to be bogging down the bus that everything else is on.

Those are old 5v PCI slots. Newer cards may not work in them.

The motherboard probably won't handle the newer, high-density PC133 SDRAM and may even *require* ECC RAM. Big $$$$.

The first board you posted was much better (and, I'd imagine, much more expensive). If you want to look for second hand equipment, try to find something that's either an intel P4 or P4 Xeon motherboard, or a P3/P3 Xeon board using a Serverworks chipset.

The board I used in the filserver I built for work was this one. It's got three 64/66+ slots, although they do all share a bus (but a 64/66 bus has quadruple the bandwidth of a 32/33 one), onboard GB and 10/100 ethernet. There's also a variant with onboard SCSI. I imagine it would be quite sufficient for any tasks you'll need it for :).

Also, if you're looking for a 4 channel card, I use one of these in my home server. However, I don't use the hardware RAID features it has - I prefer Linux's software RAID. It is a 32/66 card, but unfortunately it requires a binary kernel driver from Promise (at least on 2.4 systems). I've not had any problems with it at all.

If you haven't already purchased the drives, I'd strongly recommend going SATA. The easier cabling is worth it in itself, IMHO. Certainly when I add another 4 (x200GB) drives to my system in the very near future they'll be SATA.

Intel's web page for that board is here and the detailed specifications are here.

On page 14 of that PDF you'll note that the two 32/66 slots share the same bus, rather than being independent.

Added to that:

It's only got 10/100 ethernet onboard. I imagine if you don't already have gigabit you'll want it soon and while a 32/33 GB card will probably give you as much speed as you'll get anyway with low end consumer equipment, it's still going to be bogging down the bus that everything else is on.

Those are old 5v PCI slots. Newer cards may not work in them.

The motherboard probably won't handle the newer, high-density PC133 SDRAM and may even *require* ECC RAM. Big $$$$.

The first board you posted was much better (and, I'd imagine, much more expensive). If you want to look for second hand equipment, try to find something that's either an intel P4 or P4 Xeon motherboard, or a P3/P3 Xeon board using a Serverworks chipset.

The board I used in the filserver I built for work was this one. It's got three 64/66+ slots, although they do all share a bus (but a 64/66 bus has quadruple the bandwidth of a 32/33 one), onboard GB and 10/100 ethernet. There's also a variant with onboard SCSI. I imagine it would be quite sufficient for any tasks you'll need it for :).

Also, if you're looking for a 4 channel card, I use one of these in my home server. However, I don't use the hardware RAID features it has - I prefer Linux's software RAID. It is a 32/66 card, but unfortunately it requires a binary kernel driver from Promise (at least on 2.4 systems). I've not had any problems with it at all.

If you haven't already purchased the drives, I'd strongly recommend going SATA. The easier cabling is worth it in itself, IMHO. Certainly when I add another 4 (x200GB) drives to my system in the very near future they'll be SATA.

Maybe we no longer have to be indentured servants to The Man

You are I are both busy people though, so if you know how a Sun v40z is better, prey tell!

Go look at page 7 and 9 of this PDF about the v40z and v20z architecture. The diagram is basically the same as for HP's Opteron servers, or any Opteron server worth talking about. Compare to page 25 and 26 of this Intel board layout. Note that Intel's 800MHz FSB moves about 6.4GB/sec. (And remember that a 400Mhz 128-bit path moves as much data as a 64-bit 800Mhz path, hence the need to compare in terms of GB/sec, not Mhz) Ignore the "Service Processor" and all the lines from it on the Sun diagrams.

Intel's Front Side Bus architecture has a single 800MHz (6.4GB/sec) point where all access to I/O and RAM goes through that single 800MHz point. This effectively serializes your CPUs (they can only all be doing something simultaneously when one of them is working out of cache; otherwise they have to wait for the 800Mhz FSB to be available) That FSB ties to a controller that has some I/O hanging off of it (PCI/E), RAM and an I/O controller. Then, the slowest I/O is off of an I/O controller off of that one.

Then compare to the architecture of a v20z. Each CPU has its own bank of RAM with a 5.3GB/sec bus to it. Then there's a 6.4GB/sec connection between the two CPUs. So, typically, your CPUs can work on totally independent tasks without needing to share the FSB just to get to their RAM. When one CPU needs access to RAM on the other, it does tie up the RAM access for both CPUs, but with a proper process scheduler and most tasks that's avoidable, besides, all that's done is reduce you to the temporary equivalent of a 5.3GB/sec FSB. Then, on the V20z, I/O is on a 6.4GB/sec path to an I/O controller, and from there it all looks pretty similar to the Intel I/O arrangement, with slower I/O off of that, etc.

Add a couple of CPUs and things look even worse for Intel and better for Opteron. Intel just sticks all the CPUs on the same FSB. Opterons each get their own bank of RAM, and I/O access is now split between two of the CPUs (the other two have direct access to each other and one of the CPUs with I/O on it.) Absolute worst case for a 4-way opteron (when your process scheduler fails or your particular task makes life hard on the process schedule) is that the I/O for 3 CPUs is tied up when something is accessed. This is still better than on an Intel board where the best case is I/O for all CPUs being tied up any time one CPU accesses I/O or RAM.

(In other words, give me NUMA over a FSB any day of the week)

Besides, Opteron systems are getting pretty commodity (at least, compared to Xeons). Shouldn't be any driver support issues; they're actually using some pretty similar chipsets for everything (LSI RAID, Broadcom or Intel NIC, etc.) as what Dell has. Price quotes we've been getting back from Sun are reasonably comptetive with Dell Xeon quotes for similarly configured servers (though, given the NUMA architecture and strong 64-bit CPUs, it'd be fairer to compare to IBM PowerPC based servers) Last I checked, IBM's Opteron offerings were a little lacking in the "enterprise" features we wanted (redundant power, specifically), but HP had very similar offerings to Sun's (same basic mobo layout, different specific offerings.) and there's a lot of "Whitebox" vendors with similar offerings, as well. To be fair, though, I work for an educational institution and Sun's got some pretty aggressive discounts available for us, especially on certain packages.

Do be careful when looking into Opteron servers from the smaller vendors. Once you get into 2 or more CPUs, some motherboard manufacturers cut corners by sticking all the RAM onto one bank tied to one CPU, which eliminates all the cool NUMA advantages. Dell doesn't offer any AMD CPUs primarily because they have a deal with Intel that gets them bett

In addition to the other replies defending Intel's choice of DDR2, note that the JEDEC DDR1 spec's top speed is DDR400 while DDR2 is now up to DDR2 533 (and will go higher). Single/dual channel DDR2 533 matches/sychs up perfectly with the 533MHz bus of the new Pentium-M CPUs.

Also, the chipsets that use Intel's integrated GMA 900 graphics "shares" (steals) memory with the CPU. Therefore, the CPU and the GPU can use all the extra memory bandwidth they can get. Dual-channel DDR2 533 gives 266MHz more memory speed than dual-channel DDR400.

You don't know what you're talking about. Monitor mode is necessary for software such as kismet, and lacking it is a huge point of disappointment with the driver. Most other drivers support that function, as it is used by a lot of software used for monitoring networks.

I see. What I don't see is how this amounts to "suck, for all intents and purposes." Pretty much all I care about is to have a working connection at the office, at my customers' wireless network, and at home. I think that's what most people needs, so I would say that the drivers work perfectly well for most intents and purposes.

Intel itself contributes very little code to this project. It was only created by intel, and intel provides *no* documentation or specs for the card to the people who develop that driver. That is why Intel is releasing their own driver for the card in 30 day's time.

Well. Not that I don't believe you, but something doesn't quite add up there. Some reference would be appreciated.

See, I just come from Intel's site, where they link to the sourceforge projects as the "development site", and state that "Intel has assigned a public maintainer who will work with the Linux community," and "support for this driver will be provided through the open source project." See for yourself. So it looks to me that your "official" driver, if there ever is such a thing, will be nothing more than a snapshot from the sf.net project, probably taken after development freezes and a couple betas are out.

Anyway, the reason I'm wasting my time continuing this conversation is to somewhat counter your unfair and unwarranted putdown of this software. That's because to me it works perfectly well, I'm very grateful that the developers, and Intel itself, went out of their way at all to make it work, and I don't want them to feel like their work is not appreciated, that all their users are pipsqueak ingrates as yourself.

Please know what the fuck you're talking about before entering 'pretentious cock' mode that seems so prevalent on slashdot. You smug fucker.

My, my, aren't we a little touchy today, no? Bad day at school, kid?

Those drivers are from the community, not Intel. Read the beginning of both pages: no documentation.

We're om /. here so why do you use wattage? Of course you mean power consumption.

Because CPU manufacturers specify the power consumption and thermal load of their CPUs as "wattage." Take a look at this Intel document and you will see that the term I used was a correct and accepted one.

To any half clued techie, Wattage sounds just as silly as Ampereage, Faradage, Ohmage and Voltage. (current, capacitance, resistance and potential)

Well, perhaps if I was "half clued techie" I would think it sounded silly. But since I've got some real engineering experience, I recognize that the term is correct.

The new chipset is the Intel PRO/Wireless 2915ABG and has linux drivers:
http://support.intel.com/support/wireless/wlan/pro 2915abg/index.htm

From http://ipw2200.sourceforge.net/ :
This project was created by Intel to enable support for the Intel PRO/Wireless 2200BG and 2915ABG Network Connection miniPCI adapters. This project (IPW2200) is intended to be a community effort as much as is possible given some working constraints (mainly, no HW documentation is available).

From http://support.intel.com/support/notebook/sb/CS-00 6408.htm :
Intel® PRO/Wireless 2915ABG Network Connection
A Linux driver is currently under development. A pre-production version of the device driver is available as detailed below.

The new chipset is the Intel PRO/Wireless 2915ABG and has linux drivers:
http://support.intel.com/support/wireless/wlan/pro 2915abg/index.htm

From http://ipw2200.sourceforge.net/ :
This project was created by Intel to enable support for the Intel PRO/Wireless 2200BG and 2915ABG Network Connection miniPCI adapters. This project (IPW2200) is intended to be a community effort as much as is possible given some working constraints (mainly, no HW documentation is available).

From http://support.intel.com/support/notebook/sb/CS-00 6408.htm :
Intel® PRO/Wireless 2915ABG Network Connection
A Linux driver is currently under development. A pre-production version of the device driver is available as detailed below.

obviously completely ignorant of the fact that the storage industry has consistently bested Moore's Law for at least a decade

Can you please tell me how you think that Moore's Law is supposed to relate to the capacity of persistent, non-volatile data media? Or could you please just stop suggesting that it applies?

Don't know about the security. There is no keyboard on the thing so a (hardware) keylogger on the host PC would be disastrous.

Apparently, there is. From Graphics Hardware and Drivers for Windows "Longhorn":

For Longhorn, graphics requirements for desktop experiences are defined in relation to differentiated experiences:

• Aero Glass experience: Delivers the full-fidelity Longhorn user experience on the desktop, including support for 3D graphics and animation.
• Aero experience: Delivers the minimum hardware acceleration and desktop composition for the Longhorn user experience.
• Classic experience: Equivalent to Windows 2000 capabilities, using software rendering.

Intel's newest integrated graphics (GMA 900) apparently meets the requirements for "Aero." Pixel Shader 2.0 is needed, but not Vertex Shader 2.0. I think Intel had Longhorn in mind when they designed GMA 900.

GMA 900 is the integrated graphics that comes with Intel's PCI Express chipsets. It will also be included with their Sonoma notebook platform (next version of Centrino), which will be released next week.