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It's not that trivial. You cannot change the hardware description on the fly, you need a cable to do that. Additionally, a private key is stored in the FPGA and the contents of the external Flash chip containing the hardware description has the data encrypted with the public key. Xilinx has a document with more info about tamper resistant designs.

...this should get you started:

http://en.wikipedia.org/wiki/C_to_HDL

Find a suitable converter, then grab a free (or evaluation) version of an FPGA design tool, for example one of these (I only suggest these over the many other, probably equally as good alternatives, as I've used them myself):

http://www.xilinx.com/products/design-tools/ise-design-suite/index.htm

And with a bit of work you should be able to produce output that will essentially be your code implemented in programmable logic, and the tools will tell you the number of gates/cells required.

What I would say, is that you'll have a much easier ride if your algorithm is in C rather than C++.

Despite saying that you have no experience with this sort of thing, defining logic in something like VHDL is basically programming. Sure, you'll need to develop a fair understanding of the hardware, but with the libraries of pre-built components available from the numerous companies who produce programmable hardware like FPGAs and CPLDs, you may find you could do a lot more than you think yourself.

You need a C to VHDL translator. Here's a tutorial for one.

Only the parts of the algorithm that have to go really fast need to be fully translated into hardware. Control, startup, debugging, and rarely used functions can be done in some minimal CPU on or off the chip. So, for sizing purposes, extract the core part of the code that uses most of the time and work only on that.

>in the past i've had to deal with license servers, multi-thousand dollar licenses,
I've never had a problem with the Webpack edition not activating.

>being locked into windows
Apparently most serious folks run the tools on Linux these days. Works fine on RH.

>having to reverse engineer internal formats because the tools wouldn't work for me
Hasn't happened to me, knock on wood. Hopefully they've worked out more corner cases since your time.

>having day-long synthesis/test cycles because their routing was so abysmal, etc
I think this is a given once you get above x% utilization. Newer FPGAs have more interconnect, though.

By keeping it Spartan (heh) they at least avoid the stupidity in the Zynq tools. What good is a "critical warning" that you're supposed to ignore, Xilinx?

If you need an FPGA then check out the Spartan-6 LX9 MicroBoard. It is sold today for $89. You can synthesize MicroBlaze there, and you will have enough fabric left over to implement quite a few hardware blocks. It may be cheaper than stacking R-Pi or BBB and the add-on board. The kit comes with everything that you need to code for this thing (Xilinx ISE and EDK.)

That chip actually consists of 4 dice (Xilinx calls them Super Logic Regions) bound over a special silicon interconnect layer. Source: http://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf The reason they do this rather than use a larger die is exactly to get a higher yield (defect density is constant, defect probability increases with surface). Therefore I highly doubt they're only getting one good chip per wafer. Cost is based on supply and demand, and these chips are very, very specialized. They're used in applications where costs are huge anyway, such as high-performance IC prototyping - things like CPUs, ASICs for multi-hundred Gb/s switches/routers et cetera.

I tried ISE 14.6 (the latest for today) and got some JRE error. I haven't tried Vivado on Win8. Both work fine on Win7. Perhaps JRE bug can be fixed by shamanic dances with a tamburine, shaking a bunch of JRE releases over the fire; but why should I do that, given that the tools are fragile enough even without my help? How badly do I need a broken netlist, or yet another crash of Impact, may it burn in Silicon Hell?

There are discussions - on Xilinx forums and in many other places - about that. The note from a moderator: "Currently, there is no road-map for Windows 8 support.." Well, they do support RHEL; maybe there is a hint in that? (I used ISE on CentOS; it worked fine.)

The problem is that PHP and web programmers are quite common. Even so, places like Facebook are looking for PHP developers and SQL engineers. Trying to find decent C programmers, especially those capable of working on embedded systems or the Linux kernel or device drivers are much harder to find. As for college, good luck getting started in the industry without a degree unless you've managed to make a name for yourself without it on some well known project.

For example:

(Facebook) https://www.facebook.com/careers/search?q=&location=menlo-park
(Google) https://www.google.com/about/jobs/search/
(Apple) http://www.apple.com/jobs/us/corporate.html
(Tesla) http://tbe.taleo.net/CH07/ats/careers/jobSearch.jsp?org=TESLA&cws=1
(Cavium) http://www.cavium.com/careers.html
(Amazon Lab 126) http://www.lab126.com/careers.htm
(Yahoo) http://us.careers.yahoo.com/
(Xilinx) https://xapps9.xilinx.com/OA_HTML/RF.jsp?function_id=12325&resp_id=23350&resp_appl_id=800&security_group_id=0&lang_code=US&params=mCsTre-AToe2wnIXflPtqsZZTnVM9.N1OyhNnBv5KuqbLKT.chxR3de6DRGMEkZb&oas=suuh5UdozJuyoXGEIHQclw..
(Altera) http://ch.tbe.taleo.net/CH03/ats/careers/jobSearch.jsp?org=ALTERA&cws=1
(Intel) http://jobs.intel.com/
(Qualcomm) https://jobs.qualcomm.com/public/jobSearch.xhtml#messages

I am certainly not lying nor a shill. These are just off the top of my head. Many of these sites have pages of openings as well as openings for new college graduates.

Old school flash is the best though.
http://www.xilinx.com/products/boards/ml410/datasheets/M29F040B.pdf

Has anybody else seen/considered the Xilinx Zync? It's a mix of ARM kernels and FPGA, which could be interesting in supercomputing solutions.

For anyone willing to tweak around with it there are development boards around like the ZedBoard that is priced at US$395. Not the cheapest device around, but for anyone willing to learn more about this interesting chip it is at least not an impossible sum. Xilinx also have the Zynq®-7000 AP SoC ZC702 Evaluation Kit which is priced at US$895, which is quite a bit more expensive and not as interesting for hobbyists.

Done right you may be able to do a lot of interesting stuff with a FPGA a lot faster than an ordinary processor can and then let the processor take care of stuff where performance isn't a critical part.

Those chips are right now starting to find their way into vehicle ECUs, but it's still in an early phase so there aren't many mass produced cars yet with it.

As I see it - supercomputers will have to look at every avenue to get maximum performance for the lowest possible power consumption - and avoid solutions with high power consumption in standby situations.

Has anybody else seen/considered the Xilinx Zync? It's a mix of ARM kernels and FPGA, which could be interesting in supercomputing solutions.

For anyone willing to tweak around with it there are development boards around like the ZedBoard that is priced at US$395. Not the cheapest device around, but for anyone willing to learn more about this interesting chip it is at least not an impossible sum. Xilinx also have the Zynq®-7000 AP SoC ZC702 Evaluation Kit which is priced at US$895, which is quite a bit more expensive and not as interesting for hobbyists.

Done right you may be able to do a lot of interesting stuff with a FPGA a lot faster than an ordinary processor can and then let the processor take care of stuff where performance isn't a critical part.

Those chips are right now starting to find their way into vehicle ECUs, but it's still in an early phase so there aren't many mass produced cars yet with it.

As I see it - supercomputers will have to look at every avenue to get maximum performance for the lowest possible power consumption - and avoid solutions with high power consumption in standby situations.

Has anybody else seen/considered the Xilinx Zync? It's a mix of ARM kernels and FPGA, which could be interesting in supercomputing solutions.

For anyone willing to tweak around with it there are development boards around like the ZedBoard that is priced at US$395. Not the cheapest device around, but for anyone willing to learn more about this interesting chip it is at least not an impossible sum. Xilinx also have the Zynq®-7000 AP SoC ZC702 Evaluation Kit which is priced at US$895, which is quite a bit more expensive and not as interesting for hobbyists.

Done right you may be able to do a lot of interesting stuff with a FPGA a lot faster than an ordinary processor can and then let the processor take care of stuff where performance isn't a critical part.

Those chips are right now starting to find their way into vehicle ECUs, but it's still in an early phase so there aren't many mass produced cars yet with it.

As I see it - supercomputers will have to look at every avenue to get maximum performance for the lowest possible power consumption - and avoid solutions with high power consumption in standby situations.

To avoid clock skew, you regenerate the clock. You can use a phase locked loop to sync to another clock, and generate a new clock signal synced with this clock but with an adjustment to the phase.

The FPGA that I use has methods for dealing with clock skew, the Xilinx app note describes how you can deal with it:

http://www.xilinx.com/support/documentation/application_notes/xapp462.pdf ...see from page 26 "Clock skew, the performance thief" and "Make it go away!"

Presumably when an ASIC has a similar problem, a similar approach is taken. (Disclaimer: I have zero experience with ASICs).

While SystemC does have a synthesizable subset, it's mainly used for simulations at a high level from what I've seen. Going from synthesizable SystemC to hardware is an order of magnitude easier than going from a complex language such as C++ or C down to hardware, which is what this company is claiming. From reading the article I believe Tensilica is using a very similar approach with ASIPs) for bringing high-level lanaguages to hardware, and they are much more established in this field. One of the up-and-comers is AutoESL which was recently acquired by Xilinx. I've played around with this tool and its ability to bring C down to hardware is very impressive.

Man I wish I had seen this presentation, as it is clear the presentation you saw included discussion of major changes in attitude and approach.

I read the attached PDF, and my initial thought was "Great solution for SBU information, and provides a growth path to Type 1 operation if you add hardware, but not remotely Type 1 capable."

If the architecture presented in the paper is indeed being allowed to protect classified (as opposed to merely SBU) information without custom hardware (or at the very least, some serious FPGA work such as Xilinx SCC - http://www.xilinx.com/applications/aerospace-and-defense/secure-solutions/index.htm ) - that's a complete change in thinking. As described, I don't think it would be allowed to protect SECRET, let alone TS.

This story got me thinking that many of the tasks routinely executed on personal computers (perhaps cryptography, video decoding, and such) may benefit from including a FPGA in PCs to serve as a programmable coprocessor. Much like graphics-intensive software can come with shader code to offload processing to the GPU, couldn't a video codec or an implementation of SSL or whatever come with code that would allow an FPGA to do part of the work?

Xilinx (one of the two big FPGA companies) very recently released their "Zynq" family of combined CPU+FPGAs. They contain a dual core ARM Cortex-A9 running at 800 MHz and a pretty decent amount of 28nm FPGA logic, with interconnects between the two. That is basically what you are describing I think.
http://www.xilinx.com/products/silicon-devices/epp/zynq-7000/index.htm

Xilinx has some good info on bypass caps and how they can be placed in their Spartan 6 docs.

Xilinx Application Note 623 is an excellent introductory guide to PDS design.

Just to expand on your points: the main thing to bear in mind is that the higher the frequency you're running it, the smaller the cap values you need and the more important it is to keep loop inductance low. There are two cases in which I place my decoupling caps on the reverse side inside the package footprint (usually BGAs have an area free of pins in the centre of the die). Firstly, when I'm running at very high frequencies (> 100 MHz) and it's essential to use really tiny capacitors. Secondly, when I have a very restricted number of layers and putting the caps inside the footprint simplifies my fanout.

The spartan3an has built-in flash for storing the bitstream, and I think you can put other stuff in there too and access it through SPI. http://www.xilinx.com/support/documentation/user_guides/ug333.pdf might get you started

Where can I get an OpenRISC CPU and a motherboard that will support it, and how much do they cost compared to Intel/AMD CPUs of similar performance?

OpenRisc is a soft-cpu, defined in the Verilog language, suitable for implementing in many different types of FPGA's of varying price/performance/power.
Here is one source for boards of all types:

• Xilinx Boards and Kits

--jeffk++

I think that if there's any likelihood of Bitcoin becoming significant, there's also going to be an increasing likelihood of someone dividing the problem space in such a way that it's addressable with appropriately-designed FPGAs and thereby killing that likelihood of significance. Right now it's unlikely to be worth anyone's time & money (unless it's being examined in classes), but if there are significant $ there someone's going to be pursuing them.

There is no way to know without doing the FPGA design, at least at a high level. What you might make up for in one area, you might lose in another. The fact that the AMD's run at such a high clock rate with so many ALU's makes me doubt it would be worth it - but again, there is no way to know for sure without doing considerable work. Just going on number of ALU's (which is not really a proper way to compare, but is the only thing we for this discussion), only the latest HUGE and really expensive Virtex 7 parts have more DSP's.

      Marc

Ref:
http://www.xilinx.com/publications/prod_mktg/Virtex7-Product-Table.pdf vs.
https://en.bitcoin.it/wiki/Why_a_GPU_mines_faster_than_a_CPU#Why_are_AMD_GPUs_faster_than_Nvidia_GPUs?

The comparison is based on 1 FPGA vs. 1 CPU Core of an Intel Xeon E5430 2.66GHz.

More details:
http://www.xilinx.com/publications/archives/xcell/issue74/FPGAs-speed-computation-complex-credit-derivatives.pdf

There's a bit more detail in this article from XCell (the journal by Xilinx, the people who sell the FPGAs that JP Morgan used) - http://www.xilinx.com/publications/archives/xcell/issue74/FPGAs-speed-computation-complex-credit-derivatives.pdf

It seems unlikely that they're doing anything that would prevent them from doing it significantly faster with less power draw on a GPU, and with lower initial hardware costs to boot.

No, FPGAs use significantly less power and provide greater performance than GPUs. The initial capital cost is higher though. Here's an article that gives a bit more detail: http://www.xilinx.com/publications/archives/xcell/issue74/FPGAs-speed-computation-complex-credit-derivatives.pdf

It would also be nice with a similar system based around an FPGA.

I know that there are some people working on these sorts of ideas, so hopefully something will take off.

Uh, perhaps this board from Digilent? Or this kit from Xilinx? Or similar offerings from Altera and Actel?

What am I missing?

"By creating more than 1,000 mini-circuits within the FPGA chip, the researchers effectively turned the chip into a 1,000-core processor - each core working on it's own instructions."
This is entirely feasible, but the 'cores' would have to be very very simple. Looking at the data sheet for the Xilinx Virtex 6 FPGA, it contains 118,560 Configurable Logic Blocks, which are equivalent to four Look Up Tables, and 8 flip-flops. If you wanted to create an 8-bit instruction set processor, it would require at minimum 16 CLBs just to decode the instructions, then you have to supply more logic blocks to do any actual arithmetic. So it is possible, but they are not talking about cores comparable to a PC.

http://www.xilinx.com/support/documentation/data_sheets/ds150.pdf

Like this?
http://www.xilinx.com/products/devkits/HW-V5-ML510-G.htm

My bet is 1,000 very simple cores - most decent-sized FPGAs contain 10's or 100's of thousands of 'logic blocks'. The Spartan 6 series has between 3,840 and 147,443 logic blocks.

This type of vendor documentation is typical:
http://www.xilinx.com/products/boards/ml310/current/reference_designs/base/vxworks/ml310_base_vxworks_bsp_proj_creation.pdf

http://www.nvidia.com/page/purevideo.html
http://forums.nvidia.com/index.php?showtopic=12150

Xilinx EPP puts an ARM Cortex A-9 in the die with a large Xilinx FPGA. Is that the dream of integrated FPGA fabric come true?

Xilinx Extensible Processing Platform parts are supposedly manufactured, and planned for sale in early 2011. I've been hearing about their progress for over a year from a friend who's a top Xilinx engineer.

Xilinx this year introduced a whole new architecture embedding an ARM Cortex A-9 in a large FPGA, designed to run primarily as the CPU, including FPGA functions as the developer specifies through software.

Done: Altera Excalibur EPXA10
In progress: http://www.xilinx.com/technology/roadmap/processing-platform.htm

Altera used to have FPGAs with an embedded ARM core + support "stripe" (Excalibur, early 2000s) -- e.g. Altera Excalibur EPXA10.

Of course Xilinx has announced a family of 7 series FPGAs with ARM Cortex-A9MPCore cores. http://www.xilinx.com/technology/roadmap/processing-platform.htm

Both Xilinx and Altera also have in-house soft-processor cores and infrastructure, and ecosystems of third-party soft processor cores.

I wouldn't be surprised if they designed it so it would operate with the power provided by a kerosene lamp or other type of fire

I'm afraid you have never seen a kerosene lamp in action. The light is not even bright enough to read a book. The PV elements will only recover a few microwatts in those conditions, even if we assume the optimal angle of incidence. There is very little energy in that light, even if you manage to gather it all (which you can't.)

That's why calculators work inside of buildings without windows.

Sure they do, if you have 100W of fluorescent lights above your cubicle. But this device is not for people who have electric lights indoors. And if it's night, or just raining heavily, the daylight coming through the window won't be enough to power even a lowly calculator.

Such a device *must* be designed to take external DC or AC power. People already mentioned bicycle-driven generators. But there are also DC sources that can be used; for example, there could be an old car battery that is charged elsewhere and brought in for the night. You can make your own, primitive but working DC batteries. Have you heard about Grapefruit power? You can even stick a propeller in a river and get some power this way. There are many methods of generation of electricity; the PV one is one of least efficient.

Finally, /. is not one of those places where one can claim that someone is not an engineer and be often correct.

S3E's have DCMs (Digital Clock Managers) making them very flexible in terms of what the internal clock frequencies are, even with a fixed input frequency.

Chances are (I can't get to the site) it just runs at 33MHz as its best-supported clock frequency. An S3E is a pretty cheap and slow FPGA - I remember writing a 32-bit CPU for one, and until I started optimising the logic-placement in the FPGA, it was only running at ~30MHz. I got it up to ~50MHz after tweaking and pipelining, but his design may do more than my simple CPU.

Simon

It's software; the number of copies made has nothing whatsoever to do with the effort required to create it.

Poor choice of words on my part. By "volume" I mean amount of time spent on developing F/OSS. Indeed it doesn't matter how many times the bits were downloaded. But your time is finite, and short of leaving your day job you can do only so much.

Because their customers CHOOSE to pay them for their services

I can only confirm that. At my last job an expensive multi-core server got RH installed; in part thanks to Xilinx supporting their toolchain on Linux. Everyone is happy. And the IT people needed that support from RH when they had a problem integrating with the Windows infrastructure (domain) already in place. The Windows Server option was considered and rejected because it supports *less* functionality than Linux, and that is because some UNIX heads at Xilinx (who I met) chose to use some UNIX technologies that are poorly done in Windows.

And how many of those commercial jobs done in months were rush jobs that were released full of holes and bugs?

True, that happens pretty often (we don't need to go beyond Windows Update to prove that.) But overall, commercial outfits are driven by the need for revenue, and as a side effect it also pleases the customers who get the product sooner. It is important to note that most customers don't need perfect software that is too late, they'd rather use imperfect software now, as long as they can manage the crashes. This is not a guess on my part, most of my professional experience is surrounded by such software. I'd gladly take an app that is perfect and does what I need, but there is no such thing (examples: CST, Xilinx etc.)

Even in less exotic areas the GIMP is often rejected by power users in favor of Photoshop because, for example, Photoshop has more smarts to do things, whereas the GIMP gives you mostly the basic tools to move pixels around. The billion dollar company can throw money at the problem to add intelligence into the product, whereas GIMP is limited by a few factors, such as the number of man-hours of coders, expertise of coders (how many of them do AI for image recognition?) and by interests of those coders, because the work is voluntary. If only the GIMP project could afford to pay a top notch AI specialist to code the advanced tools of Photoshop. But they can't, and even the GUI of the GIMP is not as polished as Photoshop's, even though probably everyone on GIMP's team is qualified to code that.

Try more on the order of $1million plus.

1) It's an aircraft. Size, weight, and power are major factors. That slightly faster CPU or DSP might break your thermal envelope.
2) This design is many years old. People ask why AES wasn't used - AES DIDN'T EXIST!
3) You can't just throw a few more CPU cycles at encryption. Implementation is 5% of the work, testing, certification, and documentation skyrockets the bill. If you want an example of "encryption on the cheap" without the associated review process and paperwork, I suggest you look at the history of Debian's OpenSSL implementation.

http://www.xilinx.com/esp/aero_def/crypto.htm - "Historically, using FPGAs in Type I cryptographic equipment resulted in inefficient processing and an increase in system size, weight and power. Redundancy and functional isolation required physically separate devices."

List of FPGA prototyping boards. Xilinx software is free for certain FPGAs. http://www.fpga-faq.com/FPGA_Boards.shtml For books, the only one I know of with an emphasis on synthesis results that includes both VHDL and Verilog is "HDL Chip Design" by Douglas J. Smith. I highly recommend Verilog over VHDL even though I learned VHDL first. Also Xilinx has obscene amounts of documentation on their websitehttp://www.xilinx.com/support/documentation/. Some of their whitepapers and app notes cover general logic design techniques.

I would recommend a board made by Digilent as they seem to have the greatest selection of add-ons and features plus their boards are high quality from my experience. As for the FPGA, I always recommend Xilinx because of the availability of free development tools, Linux support ( I currently have their WebPACK ISE running under Kubuntu 9.04 ) and the general superiority of their products, especially for projects that involve high speeds, a large number of gates and/or flip-flops eg. a microprocessor and even low power -- Xilinx' weakness has always been their relatively high standby/leakage current compared to other vendors, but they've significantly improved upon that with the Spartan-3A and the just released Spartan 6 chips.

As a Spartan 6 dev board is going to be expensive ( Xilinx' Spartan-6 FPGA SP601 Evaluation Kit is $295 and AFAIK it's the only entry level board currently available for that chip ) right now, I would recommend a Spartan 3A board. Specifically I would recommend Xilinx' Spartan-3A Starter Kit as it has the right amount of features for the price ( $189 ) and it's made by Digilent although if you're on a *really* tight budget you can get kits based off of this chip for as low as $49

jdb2

I would recommend a board made by Digilent as they seem to have the greatest selection of add-ons and features plus their boards are high quality from my experience. As for the FPGA, I always recommend Xilinx because of the availability of free development tools, Linux support ( I currently have their WebPACK ISE running under Kubuntu 9.04 ) and the general superiority of their products, especially for projects that involve high speeds, a large number of gates and/or flip-flops eg. a microprocessor and even low power -- Xilinx' weakness has always been their relatively high standby/leakage current compared to other vendors, but they've significantly improved upon that with the Spartan-3A and the just released Spartan 6 chips.

As a Spartan 6 dev board is going to be expensive ( Xilinx' Spartan-6 FPGA SP601 Evaluation Kit is $295 and AFAIK it's the only entry level board currently available for that chip ) right now, I would recommend a Spartan 3A board. Specifically I would recommend Xilinx' Spartan-3A Starter Kit as it has the right amount of features for the price ( $189 ) and it's made by Digilent although if you're on a *really* tight budget you can get kits based off of this chip for as low as $49

jdb2

Xilinx: http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm

Altera: http://www.altera.com/products/devkits/altera/kit-cyc3-starter.html

Both are very mainline FPGAs, both have full devkits, references designs, include the tools, linux support on Xilinx at least (not sure on Altera), and are both at your price point.

Hardware: I highly recommend the Spartan Starter Kits. They're dirt cheap, well supported by the industry, and come with a good toolkit. There's not much more you need to know other than you'll probably want a serial cable in addition to the JTAG cable the kit ships with.

I'll grant you that the fabric isn't very large by today's standards, but it's still enough space to learn about the hardware. By the time you outgrow the fabric, you should have a good idea of what size hardware you want. In fact, your next board may even be a custom design based on a bus like wishbone. ;-)

Software: The Xilinx stuff (pronounced "Zy-Links") comes with a full toolkit for VHDL/Verilog development including an IDE, place and route tools, and software to reconfigure the FPGA. It's all quite slick and easy for a beginner to use.

Language: The most common route taken by new hardware developers is to learn Verilog. They do this because it's similar to C and that makes them comfortable. THIS IS A BAD IDEA. I can't count how many hardware designers swear up a storm when they see a Verilog project with loops and other software constructs stuck into them. See, the comfort and familarity of C makes new hardware developers forget that the hardware is a fixed layout. There is no for loops or control logic as you think of it. It all ends up flattening to hardware. If you write regular software constructs, you'll end up with the least efficient circuit possible.

From this perspective, learning VHDL is better because you won't have that comfort and familiarity that might tempt you into creating poor circuits.

I actually recommend doing some JHDL code for a while. It's lower level than VHDL, but that's a good thing. You have to think about every wire connection and how it all links up. When you're done, you can easily step through your circuit and see how it plays out in hardware. Even better, you learn how to properly use software constructs like loops to create a large number of static hardware objects. This will make your code better without falling in the trap of trying to write software.

That's my 2 cents anyway. Good luck! :-)

I've found that I can substantially reduce VHDL development time using Xilinx System Generator and its toolbox for Matlab's Simulink . Writing VHDL graphically makes understanding and testing substantially easier (for me, at least).

It has hand-coded VHDL equivalents for each Simulink function. Generate testbenches, hardware in the loop, etc. You can merge it directly with your own code by writing a simple high level wrapper. It interfaces easily with Chipscope as well (generates files to label each of your inputs).

It all depends on the FPGA size you need. Check this out:
http://www.xilinx.com/products/devkits/HW-SPAR3A-SK-UNI-G.htm

- outputlogic

Visit outputlogic.com : tools that improve productivity

No, but anyone who's that interested CAN have one of these in their garage (or on their desk, more likely), and get their design fabbed by these guys fairly cheaply.

Sure, it's not quite as easy as hacking on open source, but hobbyist CPU design is definitely possible. Especially when you consider there ARE open source CPU designs out there.

At least the Xilinx synthesis tools are free to download and use, although they're not F/OSS. I don't know about Altera.

Xilinx Webpack ISE, available for Windows and Linux. Free registration required.

There's a libusb wrapper available which allows JTAG programming through the standard Linux USB and parallel port interfaces without their proprietary kernel module (which, last I checked, doesn't compile against recent kernels).

You mean like a Virtex II-Pro?

Field programmable Gate Arrays (FPGAs http://www.xilinx.com/) are increasingly being used in the classrooms for teaching digital electronics. You can get a good starter board with 500K gates for around 150 bucks and the design software is free from the FPGA vendors.

Heres a couple of links to FPGA based development boards:

• Digilent http://www.digilentinc.com/Products/Detail.cfm?Nav1=Products&Nav2=Programmable&Prod=S3EBOARD/
• Xilinx http://www.xilinx.com/products/devkits/HW-SPAR3E-SK-US-G.htm

Field programmable Gate Arrays (FPGAs http://www.xilinx.com/) are increasingly being used in the classrooms for teaching digital electronics. You can get a good starter board with 500K gates for around 150 bucks and the design software is free from the FPGA vendors.

Heres a couple of links to FPGA based development boards:

• Digilent http://www.digilentinc.com/Products/Detail.cfm?Nav1=Products&Nav2=Programmable&Prod=S3EBOARD/
• Xilinx http://www.xilinx.com/products/devkits/HW-SPAR3E-SK-US-G.htm