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Don't any of you guys remember the Wired up MSN joint venture with Lazyboy?

Gaming lazyboy

enjoy.

one of the main problems would be the timing for the system and the heat!!!!!!! 4 PIII cores running 2x2 would not only generate somewhere around 200 watts of heat, and would require a 300 to 400 Watt psu for a bare minimum configuration

Don't take this as a disagreement, I do indeed think heat dissipation would (and already does) make one of the biggest problems. However, according to the P-III 1.13-1.40 spec sheet, the .13 micron P-III/1400 only dissipates 32.2W, for a total of 128.8W over four cores. That includes the cache as well.

For comparison, the Athlon XP 2600+ gives off 68.3W, the P4 3.06 sucks 82W, and Intel's next Itanium, the Madison, will nicely heat your computer room at a whopping 130W.


My opinion: Itanium does the job, and if people would spend the time it would take to learn a new archecture, it would be a nice, fast chip to start from.

I agree with you that, technologically, the Itanium looks rather impressive. However, even taking into consideration that it (well, at least the upcoming Madison core) does 6ops/clock compared to the P4's 2ops/clock, that still leaves it short for raw power at only 1.5Ghz (since, by the time Intel starts shipping in quantity, the P4 will certainly have passed 4.5Ghz). I understand that clock speed doesn't mean everything, but clock speed times throughput per clock *does* give a pretty good indication of its upper limit.


somebody give me theirs.. I'm broke again :(

Okay... A quick tip for getting properly-mounted Athlon heat sinks, without risking damage to the chip... Buy a motherboard combo. I suppose this doesn't apply if you just upgrade an existing CPU, but if you need a new motherboard, get them at the same time, from the same place. That way, not only will you not risk a crushed chip, but if it dies of heat within a few days, just send it back and get a free replacement. :-)

That's just where they had to color with the magic marker so as to bust the digital rights management.

If you haven't heard, the was banned in San Francisco. Ouch.

The judges claim they banned it because it is "unsafe for city sidewalks", but they also commented that the Segway is "a national threat at least as grave as Iraq" because of laziness. I don't think Iraq is that dangerous, so I don't know exactly what that comment is suppost to mean =) Also they said they didn't want to see a "potential tsunami of lard".

Personally, I don't think Segway is the "future of transportation". I'd much rather see PRT everywhere in the future.

This looks like it could be the original source.

I'm don't know what you searched under, but Google returns these results.

Some others have picked up on it, there are some loose translations, but no real original articles. No pictures either.

Yeah, this looks a little vaporous. I hope not,the technology is certainly feasible, but I'm a little skeptical of uncorroborated articles in national chinese news sites. The japanese, however, have a robot that looks promising.

"... So which claim should you believe?"

Well, its been clear to me that Amazon has for some time practiced some irritating sales techniques. I mean how many times to I have to wait for some stupid Harry Potter Soshkele when I'm tring to buy something entirely unrelated, such as Vincent Flander's latest tombe?

So to hear a spokeswoman try to play semantic games (for those of you outside of D.C., I believe it's called lying) with lame comments such as - "Perhaps in light of the mini-controversy, instead of saying that customers "also bought" the recommended clothing-store items, Amazon.com now says that the other customers "also wear" the recommended items." - is no surprise.

What I would be interested in is someone enumerating in simple bullet pionts all of Amazon's "irritating" sales gimmicks.

Now pardon me as I change my shorts ...

Hmm. So does Amazon.com employ legions of inspectors to check the cleanliness of its customers' underwear?

With the blue laser DVDs being able to hold a mere 27GB of information, other than the layering, I wonder if they will use the blue laser technology to read/write them. I'm thinking this might be one way to get the entire run of B5 on one DVD.

AOL shipped NS 7.0 without popup blocking because that would hurt advertisers' interests, but reversed their decision because of public outcry.

Reversed? Netscape 7.01 blocks pop-ups from all sites except AOL and its advertisers, although those sites can be removed from the whitelist. Now, the true Slashdot geek runs Mozilla with at least three different proxies to anonymize himself and protect his identity, but those who download Netscape 7.01 will not be rid of pop-ups.

If Microsoft adds a pop-up blocker to Internet Explorer 7.0, it will not block ads served by MSN sites by default.

Non Sequitur \Non seq"ui*tur\ [L., it does not follow]
n 1: a reply that has no relevance to what preceded it

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There is something I find annoying with Slashdot, it's the bad habit of posters to leech news from other sites that already refer to a previous coverage on another site. This is absurd: I click on Slashdot's link to go to geek.com's link, which sends me to The Inquirer, from which I can finally have the real thing. Is this only me that is irritated or what? Hey, when I read the same news first on OSNews (who at least have the decency to redirect to original sources more often) and that some hours after I see that same story on Slashdot, but with the link pointing to OSNews, I find that a bit ridiculous. Not that I think it wrong to acknowledge that news posted on Slashdot came from another news aggregator (that's how one learns about the other ones), but the point is that you end up with a neverending arab telephone, and the guy down the line says black when you're posting white. Or else it's a new way to counter the slashdot effect, and I'm not just getting it.

• more info at geek.com
• more info at yahoo.com
• more info at google.com

Um, guess you missed the announcements that two of the five major labels (Universal and EMI) are doing just that. Universal's price is 99 cents per track, and these are burnable, unrestricted files.

that is what it USED to be... new pricing suggests otherwise: AMD & Intel pricing comparison

some more [in german] links for the lazy ones.

The parent post is a Troll. The background of this story can be found all over the place:

A Microsoft spokeswoman said the company has disabled downloads from the PSS Support server "to improve the privacy protections on the site."
http://www.wired.com/news/infostructure/0,1377,564 81,00.html

http://www.geek.com/news/geeknews/2002Nov/gee20021 121017417.htm

I thought the same thing at first also. Until I read this report about a microsoft foulup and this post (granted take both with a grain a salt)

Still it seems that signs are pointing to validity instead of the other way around. Slashdotter may have anti-microsoft tendencies, but usually someone will dig up the Truth TM

I'd still like to see more evidence, but right now, I'm leaning toward credible.

No it was almost certainly this over the next few days and weeks I have a feeling we will see many more of these kinds of things.

Also see this.
So no it is not criminal it was a screw up at MS.

here's one

here's another

and another

If you're really interested in exact numbers, the cpu spec page at chipgeek shows the Thoroughbred-B core 2800+ putting out 74.3 watts and the Updated Northwood core 2800 putting out 68.4. It's hard to imagine that going to 3000 would bring the number up to 100 watts. I wonder how they got the 100 watt number? I mean, what did they use to measure it?

Have you ever heard of the Flat Neighborhood Network topology? Just because you can't figure out how to design a network for a cluster supercomputer, it doesn't mean nobody can. Apparently, you also seem to think you know Cray better than Cray. Not only is Cray now marketing Linux server clusters, it's also planning on building a cluster supercomputer using 16000 AMD Opteron processors. Perhaps you should jump in and inform them that clusters have gone the way of the dodo. Either you're wrong, or many highly paid Cray employees and various PhD's are.

*applies Ockham's Razor*

AMD or Intel can take a .13 micron part, underclock it, under-volt it and spank em silly

I'm not sure whether or not increased WiFi ranges are a good thing. This could mean that companies (who are what's being targetted according to the article) will be able to compete for bandwidth over a greater range than ordinary individuals.

Look what happened with Starbucks infringing on a WiFi co-op in Portland. Other companies that wan't to share their signal over a large building and don't particularly care about interfering with the signal outside of that building are sure to implement this technology.

Yeah, right. Right. Remember the WD 6GB? Remember the fact that IBM sold most of this hard drive manufacturing to Hitachi because of lawsuits because of failing drives. Right. Try, IDE is not high quality. Period. And Apple fucked you zealots over hard when they jumped the shark and went IDE.

I laugh at you, and piss on your stupidity.

"http://www.ccmagazine.com/gossip.asp?offset=2

It seems that data-storage business now became the most complex, but rather unprofitable. IBM sold their HDD subsidiary, Quantum was acquired by Maxtor and Fujitsu simply dropped the business without explaining the reasons. Well, now it seems that not only IBM had loads of problems with their hard disk drives.

Everyone in tune with the biz knows IBM hard drives have bad problems. Some techie you are. idiot.

Normally that would be humurous, but it's quite possible.

Active jamming is illegal.

Passive jamming is not.

Yet, all the cash Intel handed DEC didn't save them. As you probably know, DEC was bought by Compaq and now Compaq is part of HP.

Maybe more appropriate to suggest Sun and some people at HP (though not those working on McKinley) are jumping up and down with joy.

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Cache is a huge Intel problem. 20K L1 for P4, down from 32K since the Pentium MMX. Even the Itanium2 only has 32K.

AMD has 128K L1 since the original Athlon, and had 24K in the K5.

The Transmeta 3200 and the Motorola G4 both have 96K, the UltraSparc-III has 100K, Alpha had 128K when it died, and HP's PA-8500 has a whopping 1.5MB.

They may throw big chunks of L2 at the problem, but it seems to me that so little L1 means more time moving data and less time processing...

Presently the registers are saved automatically by the processor in something called a Task State Segment (TSS) during a task switch. There are currently unused portions of TSS which could be utilized and (sic) for RM and RMC during a task switch.

The PUSHRMC and POPRMC instructions are available for explicit saves/restores of the RM and RMC registers in general code. I don't recommend it, however. The decoders would be physically stalled until the RM/RMC registers are re-populated. It would be better to use explicit MOVRMCs in general code.

- Rick C. Hodgin, geek.com

>Why is it people think they can just make up whatever crap they want about apple and people will believe it?

I didn't author any of those links. Sorry you seem to think the entire world is against you (including PBS).

>The G4 Cube had no quality problems that I've ever heard of

Please search the web a little, and/or read more magazines, or talk to more people. Your choice.

I'll provide you with some G4 Cube problem links:

One
Two
Three - Admittance from Steve Jobs himself that G4 Cubes don't have the quality users expect from Apple
Four
Five

And so on. It doesn't matter if they were cracks or mold lines -- either way they show a lack of quality assurance. If this were my car and Apple said "Oh, those ripples on the bodywork are just caused by the type of paint we used" I'd still say it stinks.

>ARe you really so stupid you believe what you're shovelling?

Are you so blinded by your mac fanatacism that you can't admit Apple could have made mistakes in its engineering of the G4 Cube?

>You cant even remember the show, and what steve said was "Mcirosoft, just doesn't have a sense of style"

You can't remember the part where he ignores Woz, his partner, for the company. A total lack of sympathy is an emotional problem, IMHO.

Not to mention the Newton thing -- what's your excuse for that? Or did you skip over it because you have no answer and are again blinded by Mac zealotry?

A 10 mbit 802.11a can cost as much as a gigabit NIC, which isn't too favourable if you're not going to do much roaming. The fact that you have to buy several Wi-Fi cards to get a wireless network together makes the proposition daunting for homes and small businesses. It doesn't have to be fast (or even secure, that's what ipsec is for), but for the technology to become truly ubiquitous, it needs to be priced at commodity levels, say around £10 to £15.

Personally I'm hedging my bets on systems that offload most of the processing to the host CPU like the stuff Microsoft is working on. It allows not only for cheaper hardware, but also gives more flexibility and upgradability (care to upgrade your Wifi setup to 100mbit with a software update?) The only thing that could potentially go wrong with this technology is if Microsoft tries to abuse its position and fails to release open specs for the hardware or releases proprietary (or no) drivers for non-Windows operating systems. However, given their commitment to FreeBSD it's quite possible that they'll go ahead and release some BSD-licensed reference drivers for FreeBSD which can be ported to other architectures.

Linewidth is essentially that "0.13 micron" number and similar that semiconductor manufacturers quote when they're quoting the process node that their device is manufactured on. It's a size gauge used to advertise how advanced the process is. Smaller is better.

Semi mfgrs usually quote "L_effective", which is the "effective gate length of the smallest transistor". This is usually a bit smaller than "L_drawn" (the drawn gate length), and smaller than the line width. This page (down near the bottom) offers this blurb from a Motorola engineer:

In the case of line widths there may however be some legitimacy to the different numbers they feed you. Each company uses a different definition for this parameter, and within the same Company they may bounce between definitions to suit their purposes. One definition is the drawn width of the minimum poly-silicon feature. Another definition is called Leff ('L' effective), the minimum length of the electrically isolated region under the CMOS transistor. The value in this second definition is modulated by the drawn width from the first definition. It, however, is also modulated by diffusion of ions implanted into the silicon substrate which often makes it 15% to 40% smaller then the drawn width. This definition is also highly dependent on the algorithm and the equipment used to calculate the Leff parameter.

There is yet a third definition also commonly used for line-widths which is very similar to the first definition. This definition gives the average minimum width of the actual poly-silicon where it forms the gate of a transistor. Due to the polymerization of the masking resist during the poly-silicon etch and the magnitude of the exposure during the photo step, this value can be 10% greater or less than the drawn width.

And don't forget, the first 20 collers get a free Elbrus E2K CPU!

This article might be of some use as far as pricing such an item. Also pretty cool talking about setting up a solid state raid, which is pretty absurd as far as going with the concept of trying to increase the speed; but with access times below .1 ms, it seems pretty sbsurd.

This site seems to have a price on some surplus quantum rushmores, but i dont know what a good price on these are, and therefore dont know what a good price would be.

-D

Links courtesy of google.

A very long time ago (october 12th 2000) to be exact, I read a story on geek.com detailing new florescent disk technologies, kinda reminds me of this technology.

Please do not buy this device from Best Buy.

Best Buy has its own customers arrested.

Best Buy also supports CD copy-impairment.

Please buy somewhere else!

For more information, check out the NewFactor article at : http://www.newsfactor.com/perl/story/18805.html

Also check out this GeekNews story: http://geek.com/news/geeknews/2002Jul/gee200207310 15675.htm

(Don't need the Karma, I just want people to get the facts straight. I hate misinformation being spread around...)

A quick web search shows Itanium is x86 compatible.

Admittedly, the Itanium does this using emulation, whereas the Opteron is supposed to handle 32-bit instructions natively, however the statement that 32-bit code will not work on Itanium is quite misleading.

release what I wanted :) The Treo 270 (or something similar) embedded into Portable keyboard. The setup should be such that the screen is inside the portable keyboard, when folded together and this all should be in one package. When folded, it would only work as a phone, kind of similar principles as in the Nokia 9210 Communicator - when opened you would have a natural size keyboard and all.

Well a reuter's aricle states that CDR sales passed the 1 billion mark in 2000.

Looking at the article, it seems that 95% of CDRs are used to pirate music... and now there's another article! They state that now 1.9 billion units were churned out in 2001. How can the number of pirated discs created somehow exceed production/sale for CDRs for that year? Did blank CDR sales double?

This was about 2 years ago, in the middle of the Napster era, and the reports at the time suggested it might've had a positive effect on album sales. Nice to see that the RIAA are so one the ball by doing it two years later.....

(Details here and here among others)

Interesting to hear independent data.

There have been reports that fear of war is affecting the Indian IT industry.