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...might be used to run the PS3 (assuming this is true). Outside of a weighty OS (assuming you use Windows, Mac or a Linux GUI with that nVidia) they should do better.

Besides, 256 GFlops in single-prec. can't be too bad either...can it?

XServe Cells are looking better, since they're primarily used for specific, high-performance apps, but if Sony can fit a (perhaps reduced) Cell into PS3, pricewise & heatwise, even a specialised form of Mac Mini HTPC might be a possibility.

http://www.realworldtech.com/page.cfm?ArticleID=RW T121300000000

The Alpha line was very advanced in terms of architecture and design. EV8, if only having a tiny fraction of resource from DEC/Compaq/HP as Itanic got from Intel, would be king of 64bit computing.

HP killed EV8 because they didn't want to anger Intel. It wasn't their project anyway. We all know the ill-fated Alpha was from the now demised DEC, acquired by now demised Compaq, acquired by ... well, HP.

You should pick up a Catweasel. It's a universal floppy controller for old media which can read Commodore, Amiga, Mac 800k, and other formats directly with modern floppy drives.

The new Catweasel apparently also includes joystick/paddle ports and HardSID functionality. Yesss! :)

As far as beating bitrot by multiplying the data: You can also use software FEC encoding to add check blocks to the data, growing it by less than an integer multiple. Repairing the errored bits is automatic, whereas storing multiple copies of the file still gives you no easy way to tell which copy is correct.

Periodically rewriting the data and correcting for small errors that occur will prevent the accumulation of errors too large to be corrected. In RAM this is known as memory scrubbing and is used on some high-end servers to counteract cosmic rays and bit-rot.

It's also a good way to detect impending media failure. Your drives should have SMART enabled, so you know when they're covering up a growing problem, and can get your data out of harm's way. This only protects against gradual deterioration however, and is no substitute for a backup in case of catastrophic drive failure.

These questions are dealt with all the time by serious archivists. Storing metadata to provide context is important too. Historians of the future will probably have a thousand copies of "Driller.d64" but will they know what the original floppy label looked like?

I recall reading on the RealWorldTech forums that these are highly specialized machines and particularly geared to floating point computation. As integer factorization, index calculus computation for discrete logarithm cracking, Pollard rho attacks for computing elliptic curve discrete logarithms, etc. are integer algorithms, crypto should be safe from this particular beast.

And before anyone asks about symmetric/secret-key cryptosystems and hash functions, recall that these are also based on integer operations, so they're safe from the BlueGene as well.

"POWER is a implementation of PowerPC architecture"

You've got to be kidding me. PowerPC is a *cut-down* version of the POWER architecture!

Check out these references here, here, here, and here.

... since AMD (unlike Intel) doesn't encrypt microcode updates, a virus CAN do real damage to the physical cpu. Check out this for more details...

The first chart at this realworldtech article is a good summary of the relative performance of today's processors. The Itanium is way out front in floating point performance.

This review struck me as a bit clueless, or unfinished.

Unfortunately, that is the case with so many of these "review" sites like anandtech and tom's hardware. For the most part, they are all just a bunch of kids or hobbiests with little to no industry experience. If they are lucky, they've got a CS degree but that's a bare minimum requirement not a qualification. More often than not the people writing these "reviews" are the same guys wearing the blue shirts down at the local best buy smurf cave.

If you think about it, it isn't too surprising. People with a real understanding of modern cpu architecture and system design are still rare enough, even in this depressed and outsourced micro-economy, that they can earn one or two orders of magnitude more money working in the labs of the big boys like Intel, AMD, HP, IBM, etc. Thus there is very little incentive for them to go do evaluations and write meaningful reports for hobbiest websites. The end result is you've got the blind leading the blind and at the same time these hobbiest websites are able to generate a hugely loyal following (whenever I post a critical message like this, there is usually at least on adherent to a website who replies with vitriolic denial).

That is not to say that there are no good sources of discussuion of modern computer architecture - the comp.arch usenet group has a few distinguished regulars like Andy Glew, a cpu architect who has worked on Intel and AMD microprocessors, for example. Though comp.arch has apparently become populare enough over the last year or so that the signal-to-noise ratio has significantly decreased. As for websites, of those with any regular activity, I think realwordltech has the highest level of knowledgable articles and community discussion going on, although many of the participants are just comp.arch regulars in a different venue.

The amount of abject ignorance on display in this thread is staggering, even for Slashdot. Just to hit a quick list of misconceptions and misanalysis:

a) A unified Xeon/Itanium socket for Tukwila has been on Intel's official roadmap for at least a year now, and obviously has been in the works for much longer. This is not news and indeed Intel has been hyping the hell out of it for some time now.

b) The point of this is not to somehow "retire" Itanium (what, by giving Itanium customers the option to "upgrade" to Xeon??) but to drive it into the mainstream by dramatically lowering platform costs. Intel claims Itanium will get 2x the performance on the same socket as Xeon in 2007. Obviously this will depend on the workload, but with Tukwila going against an dual-core MPU based on the ancient NetBurst core, it's not unlikely either. Of course the reason to stay x86 will be for binary compatability, but in many if not most server situations IA-32 EL on Tukwila should provide better x86 performance than the top end Xeon. The point of a unified socket is to phase out Xeon, not Itanium.

Meanwhile, Slashdot has managed to miss today's announcement that the likely future fastest supercomputer in the world will be running Linux. Seems like a slam dunk, right? Linux running the fastest single-image computer in the world? What's the catch? It's running on Itanium, of course.

Must be tough trying to come up with a negative spin on that one. From the but-if-it-was-opteron-it-would-cost-$100,000-less dept., perhaps??

I am rather disappointed by the quality of this article:
"I just got a new computer with a Creative Labs Sound Blaster Audigy 2 card with amazing sound and music capabilities. For example, theres support for 24-bit EAX Advanced HD sound,"

What the fuck is 24 bit EAX Advanced HD Sound? Its not a feature, its a fucking marketing term. EAX may loosely refer to 3D Audio features but the author clearly doesn't know what he's on about.

Firstly let me get something off my chest - creative fucked ME over. my Soundblaster Audigy, a "24 bit" card is nothing of the sort. It only plays 16 bit sounds. Apparently it can (in hardware) mix 24 bit sound down to 16 bit, bypassing the windows functions that do the same, nonetheless marketed to me as a 24 bit card. So of course this means the card is completely useless if bought specifically for audio work.

Also my mate bought a soundblaster live, one of the selling points was that the "liveware" could be upgraded, providing more features/effects/whatever. His original cd came with liveware 3.0, since then (well last time I checked) creative have not bothered updating the SBLive liveware, which is a bit naughty.

Their drivers are SHIT, check this, this and this.

The last link hints on having the same FUCKED UP driver problems that I have been having: the original driver off the cd will install, but none of their updates off their website work. I have been through all the tech support and they have even sent me out a new driver cd (for free) but those drivers wont install. Creative seem to have some sort of fucked up hardware detection routine in the driver installation for every drivers apart from the ones on the original cd, and this hardware detection always tanks stating "No creative product found in this computer. Please ensure it is installed properly."

My mate has a soundblaster live and when he went from win 98 to winXP his SBLive just completely refused to work, with all the drivers from creatives website claiming that he had not soundblaster installed. The CHEEK! If only creative would allow MS' hardware detection to do the work, rather than have their FUCKED UP BUGGY hardware detection fail to find legitimate hardware. My mate now uses unofficial drivers for his soundcard that *arent even written* by creative. This was the only way he could get his sound card (that he paid 180 pounds 5 years ago for) to work.

Once I gave up on getting any semblence of modern drivers working, I moved onto getting 3d audio working in games. Like fuck was that going to work. Every game I tried refused to recognise the existence of EAX hardware. In every game without fail, the EAX option would be unselected. This was particularly galling with halo.

In the end I uninstalled my SB Audigy and used my onboard 5.1 surround. Which is recognised by games, shock horror! Admittedly when theres about 10 people firing at once in halo the sound gets choppy, but at least I have surround.

Also we have to ask about the quality of onboard effects on the soundblaster live. The reverbs are so shit and tinny that you cannot possibly use the for any audio application. This belies their claim that their soundcards are good for musicians.

Finally we have to ask: is the lack of decent 3d support due to game developers not being bothered, or is it due to the 3d support/hardware accelerated sound support being in such a perilous state?

I tend towards the latter. The author of the article states:
"Creative Labs has a virtual monopoly, due at least in part to aggressive techniques such as lawsuits or buyouts to take care of most potential competitors....Fortunately, even without competitive market pressures, Creative Labs has developed high quality audio hardware."

In the event, it turned out to impossible to write an OS for it due to many reasons: virtually-addressed caches, imprecise interrupts, multiple instruction decode modes, etc.

I assume "impossible" is a rhetorical term here meaning "more difficult", as

1. Sun had a number of machines with virtually-indexed, virtually-tagged caches, and an already-written OS (SunOS) was ported to machines with that cache without too much pain;
2. I have the impression that other machines with imprecise interrupts have run UN*Xes;
3. this article says that the Oki 7300 workstations used the i860 (I seem to remember there was an i860-based workstation at one point), probably using some UN*X-flavored OS.

How many people remember this AMD Dual Core K8 Architecture slide? AMD has been planning this for a long time.

They introduced the k8 on a .13micron process and it was 192mm with 1024k L2 cache. Moving to .09micron it will shrink to 114mm and a dual core version, with 1024k L2 per core, may come in at ~215mm, not much bigger than the current Athlon64!

AMD will claim the market is ready for dual core processors when they move to .09microns sometime next year. We've all read this quote from AMD chairman and CEO (Hector Ruiz), right: "One of the most powerful things next year is going to be our dual-core product. To me, that's going to really shock the hell out of everyone, because it's going to be hardware-compatible, infrastructure-compatible, pin-compatible. I mean, people that have a 2-P system can slap in a dual-core product and end up with a 4-P system for the price of a 2-P. That's been the biggest drawback, everyone tells me. What keeps them from going from a 2-P to a 4-P system? It's price."

Paul DeMone had a great article about the 64bit processors we'll see in 2005 and the k8 is looking pretty good!

The Integraph suit deals with Itanium stuff, as is stated here. The SSE/Hyperthreading suit is another company (MicroUnity) and another suit (same article).

Now, from what I understand, MicroUnity's MediaProcessor is a fine-grained multithreaded processor. There's limited information here and here, which may be the processor with the alleged patents that have been infringed upon. But what about University of Washington's SMT group? They put out their first paper in 1995. The Alpha EV8 (21464), before it got canned, was supposed to have SMT (and the Alpha group went from Digital to Compaq and then to Intel). I'm speculating that Intel got Hyperthreading from Alpha who got it from Washington. DEC/Compaq worked with Washington's SMT group, as Luiz Barroso is listed on the Washington SMT page (interestingly, he works for Google now. His Google article is quite interesting).

The native instruction set isn't well-suited to host an operating system (see also Linus's take, it's too much of a moving target (TM changes it all the time and keeps the frontends stable; without this flexibility they would be entirely lost), and compiling for the native instruction set would eliminate all the benefits of code morphing (the dynamic optimizations, etc). Efficeon has a lot of potential; here's hoping Transmeta can get bugs sorted out and become competitive.

No surprise there. Very few of these popular "review" sites have anyone on staff (or even freelance) who know anything about computer architecture. These guys are all hobbiests with backgrounds based in futzing around with their PC and reading press releases. They have zero understanding, or "deep knowledge" of the design trade-offs and implementation details that make all the difference in these systems.

With few exceptions these guys are only good for putting pretty lights in their computers and running benchmarks. But in no way are they qualified to CHOOSE appropriate benchmarks nor to evaluate the results and draw conclusions beyond the raw numbers.

For the most part, it isn't their fault, it is a classic case of, "Those who can do, those who can't teach." The people with the ability to properly evaluate systems can make a ton more money working in the industry than they could writing articles for free websites.

Linus Torvalds on 64bit desktops

Linus Torvalds on 64bit desktops

Linus Torvalds on 64bit desktops

Linus Torvalds on 64bit desktops

This great article discusses the general specs of the CPU and it's architecture.

A really well written (but highly technical) article. As you can see, IBM designed it to beat Sun and Alpha (still alive at the time), not Intel. As far as Apple is "involved" in the development, it's in the latter stages of implementation rather than design itself.

Here's a fixed link (with HTML in it): PowerPC 970 Annoucement

[...] what I would really love would be a comparision to RISC (UltraSPARC, POWER, ARM) processors and VLIW (EPIC: IPF) ones.

If you mean general architecture, then this isn't a bad overview.

The Battle in 64 bit Land, 2003 and Beyond, summarizes the 64-bit competitive landscape quite well.

Summary:

64-bit CPUs (SPARC, PA-RISC, MIPS) do not make the "magic quandrant". Short of inventing a time machine, they never will...better to abandon non-competitive CPUs and swallow pride like SGI and HP have done then cling to shitty technology...SUN engineers need a reality check.

As a programmer, I don't understand why anyone cares about preserving the legacy of 32-bit architecture by expanding it (yet again) for 64-bits.

As a programmer, how much would you charge to reprogram all those apps from 32bit to 64bit? As a CFO, how much would you be willing to spend in one lump sum on converting all your 32bit apps to 64bit ones b/c your new hardware wouldn't support all your old apps? In aggregate, that's a lot of money spent on an essentially non-productive endeavor. AMD's solution may not be technologically ideal, but it is finacially appealing, especially in an economic downturn. It allows a gradual upgrade to cheap low and mid-range 64bit technology. And Opteron and Athlon 64 are not without significant performance improvements either. It's quite competitive on a price/performance basis with the other major 64bit players.

http://www.realworldtech.com/page.cfm?AID=RWT01260 3224711

Go here for a really good summary of current CPUs.

Go here for a really good CPU comparison.

To quote Linus: "And I further bet that using a native distribution (ie totally ignoring the power and price and bad x86 performance issues), ia-64 will work a lot worse for people simply because the binaries are bigger. That was quite painful on alpha, and ia-64 is even worse - to offset the bigger binaries, you need a faster disk subsystem etc just to not feel slower than a bog-standard PC."

Yeah, RISC workstations always seemed sluggish to me for interactive use. Not sure if it's really due to the increased time to load binaries, or some other optimization issue.

Did you read the source for the Inquirier article?

Linus spends a lot of time debunking the "more registers is better" myth. X86 implementations have been addressing this issue for a long time, both by register renaming and by having extremely fast L1 data caches (esp. on P4). Adding more registers will not help speed up code much at all - and anyways requires a recompile and won't help improving legacy code.

If IBM ends up ruling the high-end, the consumer may well see an offering. In this previous article quoted yesterday on /., the IBM PPC 970 - based on a scaled-down Power4 - may wind up in Apple's future desktop & portable offerings.

What's with this graph? http://www.realworldtech.com/includes/images/artic les/battle64-2003-fig1.gif

Am I the only one who likes seeing UNITS on things?

Itanium 2/1000 scores a little over 1400 somethings at just above 800 something elses. Is this better or worse than the Athlon XP/2250, which scores less than 800 whatever-they-ares at 900 who-knows-whats?

here.

For those who want the article all on one page.

Keep reading ...

The machine was configured such that thread count equalled active CPU count.

'jfb

sorry, nosferatu-man, but those marks are misinterp'd

As Rob Young pointed out in his post:

"Not sure what you cobbled together but threads are your CPU counts. All the EV7 results are for 16 CPUs"-RY


Tester Name System Name CPUs Threads Base Peak
Compaq Computer Corp AlphaServer GS320 Model 32 64/731 16 16 5073 --
Hewlett-Packard Comp AlphaServer GS1280 Model M16 16 4 6027 6824
Hewlett-Packard Comp AlphaServer GS1280 Model M16 16 8 10349 11929
Hewlett-Packard Comp AlphaServer GS1280 Model M16 16 16 17420 20066
Hewlett-Packard Comp AlphaServer GS1280 Model M16 16 4 5482 6324
Hewlett-Packard Comp AlphaServer GS1280 Model M16 16 8 10040 11547
Hewlett-Packard Comp AlphaServer GS1280 Model M16 16 16 17724 20637

Info from here.

Nuke the space, cut and paste and there you go. Same article posted back in march.

Sigh... One more try, link here

Estimated Power4 scores
P4 scores at SPEC

Estimated Power4 scores:
Est. SPEC INT 937 @ 1.8 GHz
Est. SPEC FP 1051 @ 1.8 GHz


Intel Corporation Intel D850EMVR motherboard (2.8 GHz, Pentium 4 processor):
SPEC INT 1032
SPEC FP 1034

Read World Tech talks about the 970 in depth... I wonder how the addition of 64-bit arch AND the 32-bit compat mode will affect things.

Like the Itanium, with its poor backwards compat performance? Or will it be speedy?

• It doeshave AltiVec compatible SIMD
• Blistering memory bandwidth
• Expected to be very fast, especially on FP
• Will probably require fast DDR and fast mobo to run at all
• Seems to have been very much made with Apple in mind

The article was clear at Vans Hardware, he wrote an article using AMDs information... Van Smith should of wrote the article with a little more distance from AMD, but that doesnt alter the facts from AMD.

I didnt see that article over at HardOCP when I posted the news last night. But after reading HardOCP comments, You can see Kyle is really pissed off at Van Smith. Kyle even links to another site Real World Tech where people are talking about Glad someone released the information... Could it be HardOCP is getting ready to release a major article, and Vans Hardware took the spotlight?

There is a hint of back room dealings going on. I picked a new magazine "CPU" that has people from various places. Interesting to see what happens in the next year and major fansites... Heres a list of authors for "CPU" magazine. Rob "CmdrTaco" Malda, Anand Lal Shimpi, Kyle Bennett from Hard OCP, Joan Wood co-founder of Sharky Extreme, Alex "Sharky" Ross, Alex St. John (founder of directx at microsoft), Chris Pirillo (creator of LockerGnome/host on TechTV), Pete Loshin (former editor of BYTE Magazine, runs Internet-standard.com), Lisa Lopuck (Author of Web Design for Dummies).

According to Hennesy & Patterson, 2nd Edition, page 391, the total miss rate (for SPEC92) of a 8k 4-way set associative cache (like the P4's) is 2.9%. The miss rate of a 128k 4-way set associative cache (like Athlon's) is 0.6%.

The hit time for P4 is 2 cycles, and for Athlon it's 3 cycles. The L2 hit / L1 miss is ~10 cycles for both. Everything further out is approximately the same so we can ignore it for simplicity.

So, the average memory access time for P4 is (0.971 * 2) + (0.029 * 10) = 2.2 Cycles. The average memory access time for Athlon is (0.994 * 3) + (0.006 * 10) = a little over 3 cycles.

Suppose Athlon had an infinite size L1 cache (or 512 MB if you like to use numbers). The highest hit rate it could ever achieve is 100% (actually slightly less, since you cannot eliminate complulsory misses). The average memory access time would then be 3 cycles - which is higher than P4's 2.2 cycles!

BTW, Paul DeMone wrote a pretty good article about P4's L1 cache.

Second of all, intel stretched their pipeline to 40+ stages, this means that the penalty for pipeline stall, branch perdiction miss, context switch, etc is *HUGE*. AMD's Athlon pipeline was a lean 7 stages.

Nicely confabulated! When making stuff up to prove a point, you might as well go for the jugular. The pipeline lengths in question are 20 and 10, not 40 and 7. Incidentally, a long pipeline has nearly nothing to do with "context switch", at least as that term is commonly used (i.e., switching from one process context to another). Any pipeline issues caused by a context switch are dwarfed a thousand times over by cache and TLB issues.

Aside: what is with the short pipeline fetishism on the part of AMD partisans? You guys realize that they had four- and fiv-stage implementations of MIPS CPUs back in the early '80's, right? Imagine how brilliantly fast a MIPS r2000 would be in 3.0GHz! Oh, wait, you can't make an r2000 run at that clock speed. Hmm. Maybe pipeline length is just one parameter in a complicated design space, and we should look on manufacturer variations as differing technical solutions. After all, that's how we treat cache design, functional unit choices, and myriad other microarchitectural parameters.

No, that sounds complicated. It must be an Intel conspiracy to corrupt our precious bodily fluids...

Why did Intel do this? They were scared because AMD beat them at their own game.

Then in a few sentences, you say:

You'll notice now that Intels best P4 is faster then AMD's best part right now...

Umm, so how was Intel "beaten at its own game"? A bit of history, for perspective.

The Pentium III is the same core that was originally sold as the Pentium Pro. That core was introduced in 1995, and Intel is still squeezing performance out of it. At the beginning of the PPro's lifetime, it was an extremely ambitious design for the physical processes then available; people called it a too-hot, too-big, too-transistor-intensive monstrosity that would never be practical. Towards the middle of its life, in the years '97 to 2000 or so, the PIII was nicely matched to the physical parameters of then-current fab technology, and Intel produced modest shrinks and speed bumps seemingly at will. Those were the salad years of the PIII. Now physical technology has moved further down the road, and the PPro core is showing its age. It's leaving performance on the table that could be scooped up with transistor-intensive techniques like trace caches, more functional units, issue width, etc.

Like almost every other design generation of every CPU, ever, the P4 has a more complicated pipeline than its predecssors. Just as in 1995, the first year showed pretty "meh" performance, with much armchair punditry claiming that it's a monstrosity. Now, about 18 months after its introduction, the P4 is scaling well. AMD, on the other hand, is struggling to wring a few more modest speed bumps out of the K7 before it limps along to the end of its design life. The AMD partisans hold out hope for the K8, generally forgetting that the K8 is a K7 with a 64-bit bag on the side.

It saddens me to type this on my Athlon, but there's a strong likelihood that AMD's years in the sun are over. Five years hence, we might be looking back at the years 1999-2001 as a lost golden age of competition in the x86 CPU space.

To remedy the situation, processors ratings need to be measured in IPC*MHZ [instructions per cycle] for both integer and floating point operations. Then it would be pretty clear to consumers what was going on.

Any simple attempt at measuring performance will end up being simplistic. The big problem with your proposal can be summed up as: which instructions? NOPs? SIMD floating point? The instructions that make up Quake III, or gcc, or my LISP stock market prediction application? What about when the instruction sets of the CPUs differ, ala SSE2? Performance characterization really is difficult; anybody who claims otherwise is trying to sell you something.

So you say, but I certainly haven't seen any evidence of this, not in the last 3 years.

Before then, THG was one of the better sites on the web (that I knew about at least). Now I will only go there if I'm really bored or looking for a laugh. www.tech-report.com, www.aceshardware.com or www.realworldtech.com are SO much more informed.

It still is one of the best out there, and the now-defunct Alpha EV8 would have been a powerful contender to IBM POWER4.

Some Alpha EV8 articles:

Alpha EV8 (Part 1): Simultaneous Multi-Threat

Alpha EV8 (Part 2): Simultaneous Multi-Threat

Alpha EV8 (Part 3): Simultaneous Multi-Threat

The Spider and the Mountain (Alpha EV8 vs. Intel Itanium)

You can thank those Compaq morons in Houston and complicit jerks at Intel for killing Alpha, in particular Compaq CEO Michael Capellas. May they be damned to hell.

PA

It still is one of the best out there, and the now-defunct Alpha EV8 would have been a powerful contender to IBM POWER4.

Some Alpha EV8 articles:

Alpha EV8 (Part 1): Simultaneous Multi-Threat

Alpha EV8 (Part 2): Simultaneous Multi-Threat

Alpha EV8 (Part 3): Simultaneous Multi-Threat

The Spider and the Mountain (Alpha EV8 vs. Intel Itanium)

You can thank those Compaq morons in Houston and complicit jerks at Intel for killing Alpha, in particular Compaq CEO Michael Capellas. May they be damned to hell.

PA

It still is one of the best out there, and the now-defunct Alpha EV8 would have been a powerful contender to IBM POWER4.

Some Alpha EV8 articles:

Alpha EV8 (Part 1): Simultaneous Multi-Threat

Alpha EV8 (Part 2): Simultaneous Multi-Threat

Alpha EV8 (Part 3): Simultaneous Multi-Threat

The Spider and the Mountain (Alpha EV8 vs. Intel Itanium)

You can thank those Compaq morons in Houston and complicit jerks at Intel for killing Alpha, in particular Compaq CEO Michael Capellas. May they be damned to hell.

PA

It still is one of the best out there, and the now-defunct Alpha EV8 would have been a powerful contender to IBM POWER4.

Some Alpha EV8 articles:

Alpha EV8 (Part 1): Simultaneous Multi-Threat

Alpha EV8 (Part 2): Simultaneous Multi-Threat

Alpha EV8 (Part 3): Simultaneous Multi-Threat

The Spider and the Mountain (Alpha EV8 vs. Intel Itanium)

You can thank those Compaq morons in Houston and complicit jerks at Intel for killing Alpha, in particular Compaq CEO Michael Capellas. May they be damned to hell.

PA

How about:

Alpha EV8 (Part 1): Simultaneous Multi-Threat
Alpha EV8 (Part 2): Simultaneous Multi-Threat
Alpha EV8 (Part 3): Simultaneous Multi-Threat

Anonymous Coward

How about:

Alpha EV8 (Part 1): Simultaneous Multi-Threat
Alpha EV8 (Part 2): Simultaneous Multi-Threat
Alpha EV8 (Part 3): Simultaneous Multi-Threat

Anonymous Coward

How about:

Alpha EV8 (Part 1): Simultaneous Multi-Threat
Alpha EV8 (Part 2): Simultaneous Multi-Threat
Alpha EV8 (Part 3): Simultaneous Multi-Threat

Anonymous Coward

According to the Motorola PowerPC roadmap, the G5 will be available in both 32 and 64 bit versions. How much it resembles Power4 isn't clear, but it's supposed to debut at up to 2 GHz. Are you still so confident it won't have world-class performance?

No. According to the Motorola PowerPC "roadmap" (I'm sure they have more informative roadmaps internally and released to their partners, but god is that thing vague!) the G5 will debut at 800MHz and up, and eventually scale over its lifetime to 2GHz or maybe even higher. Am I positive that it won't have world-class performance? No, but I would guess that it won't based on the fact that it's being designed at a 2nd-class design firm which has fallen significantly behind of late, and that it's primarily targeted at embedded systems, not desktop PCs. Of course, the K7 was designed at a previously-thought-to-be-2nd-class design firm which had fallen significantly behind on their previous core, and was arguably rushed out to replace a rapidly obsolete K6. And yet the K7 turned out to be extremely successful, and grabbed the x86 performance crown from just after its introduction til very recently.

But there are important reasons why we shouldn't expect a K7 out of Motorola. Among them, while AMD had amassed a semi-dream team to design the K7, Moto is apparently so hurting for talent that they are soliciting EEs on the basis of comp.arch posts. Plus their semi division has posted very large losses the past several quarters and is speculated to be a candidate for being shut down or spun off. (AMD had losses before the K7, but as CPUs were their main business, they weren't about to drop them.)

Certainly the G5 will be faster than the G4, and Jobs will surely be able to make it seem faster than a room full of P4s. Since Macs have never been about performance, I would bet the G5 will be enough to keep them happy. But world-beating, I doubt it. We'll see...

(BTW: you are right that the G5 apparently has a 64-bit version. There is no good reason for Apple to use it, however; 64 bits is worthless for all the markets Macs sell to. The only reason it's at all worthwhile for Hammer is that Hammer is trying to steal some of Xeon's market in e.g. databases. Of course, Apple isn't past using a useless feature for marketing purposes, so perhaps they'd use a 64-bit version anyways.)

The integrated I/O might or might not be worthwhile, but Apple's current pro machines use L3 cache.

*Some* integrated I/O and *some* L3 cache TLBs might be of use in a desktop chip. But the integrated I/O to network a 2-way system across a motherboard is nothing at all like the integrated I/O to network a 4-way system across an MCM. They'll use completely different protocols. Similarly, the TLBs for maybe 2 or 4 MB of L3 aren't going to share much in design or layout with the TLBs for 128MB L3. Indeed, the whole address space will have to be completely different. And so on.

The new dual-processor 1 GHz G4 is claimed to have 15+ GFlops of computing power, using Altivec I presume.

Snort. This figure is what you get when you multiply the peak execution rates of all the Altivec and floating point units on both chips together and multiply by 1 billion. This assumes all peak-rate operations (so, most likely, 100% fp adds/packed Altivec fp adds...although, come to think of it, they might be counting fp loads as "operations"), no loading of operands, no data hazards, etc. The precise technical term for this is "bullshit." Side note: how do you plan on getting the operands for 15 billion floating point operations every second across a 1 GB/s memory bus??

If the G4 is a supercomputer on a chip, how come there aren't any G4-based machines on the Top 500 list? More to the point, how come any old x86 chip will destroy a G4 on LINPACK or LAPACK? A supercomputer with PC133?? (If you think the derision is too harsh, it's because you don't realize the degree to which "supercomputer" workloads are dominated by memory bandwidth considerations.)

If that single Power4 CPU was really "optimized to work in an 8-way MCM", it truly did a stellar job as a uni-processor.

Again, 128MB L3 didn't hurt. :)

On the compiler front, I did find a seemingly decent FORTRAN compiler for MacOS X, so that issue is addressed at least. ;-)

Good to hear. A SPEC license isn't all *that* expensive ($100 for a student IIRC), so hopefully someone will get cracking and produce some real independant benchmarks comparing the G4 to other processors. (Again, *not* holding my breath for Apple to do the same.) Of course a lot of effort needs to go into figuring out the optimal compiler flags, etc. And I somewhat doubt Absoft's compiler can vectorize Altivec out of code without any changes or hints stuck in. (SPEC doesn't allow any changes to the source, and very few compilers can do truly autonomous vectorization.)

But I'd be *very* interested to see those results!

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