As long as the distance between A&B is greater than twice the error margin for your GPS receiver, taking a reading from both gives you your orientation. More antenna or a greater distance between A&B equals more accuracy.
Just measure the carrier phase difference to each satellite using pairs of closely spaced antennas. If you know your location and the satellite locations, then the two closely spaced receive antennas have to be at a specific orientation to generate the measured phase differences. This could be done using simple FM demodulation of each carrier and a Roanoke type of radio direction finder design but I suspect it would be easier to just make sure the carrier phase information is not discarded in the receiver and do the processing digitally. Survey GPS units use carrier phase measurements for more accurate location measurements.
Is this the same type of nobody who on Flight 93 succeeded where terrorism experts, intelligence agencies, police, military, Congress, the President, and the courts failed? And despite having been disarmed and ignored for more than a hundred years?
Perhaps things would have been better if they had listened to the experts and given the hijackers what they wanted instead of resisting.
The sparks from the plugs are inside the Faraday cage of the combustion chamber. If the leads to the plugs are shielded (I haven't gotten around to dissecting a set yet.), there should be no radiation.
Ignition wires are only shielded for special applications. It can be done in a couple of ways (braid over standard ignition wires or wire replacement with high voltage coaxial cable) but the effort required is not trivial. HAM operators who work HF or weak signal linear modes (AM, SSB, QAM, various digital) sometimes do this.
Automotive manufacturers rely on spark plugs and ignition wires designed with controlled resistive loss for EMI suppression. If you cut apart a standard wire, you will not find copper.
all kernel code is integer, i think most SSE instructions are float based.
The poster probably meant SSE in a general way. SSE2 supplanted MMX by extending the MMX instructions to operate on the larger (128 bits versus 64 bits) XMM registers instead of the x87 floating point register stack. Power of 2 integers from 8 to 64 bits are supported.
Current nahelm based processors don't seem to have any provisions for onboard graphics at all (other than using a PCIe soloution with it's own memory) which would seem to be a good thing for vendors of add-in cards. However with the next shrink it seems they are going to put graphics in the package with the CPU. I'd bet that the vast majority of nahelm based laptops will be using that on-chip graphics.
Many onboard graphics solutions have used a shared memory architecture without a separate frame buffer but the interest here is doing so with an CPU that has an integrated memory controller and like you say, no current i5 or i7 systems support this. It is unclear to me if DMI and QPI do not support this type of operation or if Intel did not see a market for an integrated graphics chipset. nVidia was probably looking to provide something along these lines but their licensing dispute with Intel finished that. I guess Intel figures on going straight to integrating the whole GPU.
AMD's current integrated graphics chipsets link to the CPU via Hypertransport and can operate with only the CPU memory although usually manufacturers include a separate 128MB 32 bit DDR2 or GDDR3 frame buffer. nVidia's voluntarily withdraw from this market seems like a mistake in retrospect now that Intel has abrogated any licensing beyond Core2. Burning their bridges to AMD with SLI and PhysX just seems like spite now.
They have so much oil, what do they need nuclear tech for?
They want a nuclear deterrent but any indigenous use of nuclear power by Iran can displace oil which can then be exported. A nuclear power plant might as well be a bottomless cash machine from their perspective.
1. The people playing that class complain that they can't get a group a lot of the time because most of the content doesn't require them to be there (why take along someone who can debuff the enemies if for all the battles you're fighting this time, you can kill them without those debuffs? Just take along another DPS).
or
2. The people that do the 95+% of the content that doesn't require those classes complain that they have to go and find someone of that class for that ONE moment when they are useful.
I saw both of these with my Enchanter main. Early in EQ I was excluded from the raiding guilds because enchanters were not needed except in exp groups and later I was continuously asked to help out (*) by the same guilds when they got stuck and lacked anybody who knew how to play an enchanter effectively. In most if not all of these cases, they had either enchanter alts or bots so once they reached some content that actually required someone who knew how to really play, they found themselves in a bind.
Add flagging and equipment requirements for resistances which preclude adding enchanter non-raid-guild players late in the game and the pool of available enchanters drops to zero. They become high in demand (for specific encounters) yet unavailable in the general population.
(*) But not join! I did Rathe for a guild once on the promise of getting flagged and becoming a member when at the end it was suddenly decided to flag alts but not guests and you could not be a member without the flag. One week later the same guild asked me again and I said, "You remember the enchanter main who did Rathe for you last week but was not allowed to get the flag? That was me." "Oh."
Wait, why is nuking it a bad idea? If you can break it up, the smaller pieces will burn up or make small craters. If you let a large one hit directly, it can cause nuclear winter. I'd rather take destruction of 20% of the surface in small craters than one large hit that blocks out the sun for 10 years (or however long it lasts).
The energy transfer to the biosphere is ultimately what does the most damage. Sea strikes are significantly more damaging than land strikes even when you ignore the tsunamis because the energy gets converted into vaporized water which condenses out across the globe. There would be months of continuous rain and failure of almost all crops. With land strikes, a significant amount of the impact energy can radiate directly back into space and the damage is more localized. If the asteroid is broken up but the remains still enter the atmosphere, the energy transfer just becomes more efficient.
Yes, but the question is *why* can the data be recombined in radio astronomy and not IR astronomy. I would think if its just a problem of having the actual light waves then it would be as easy as running an ultra-high purity fiber optic cable between the two observatories. But if radio detectors can measure the frequencies sufficiently then why aren't we at the stage where IR or light detectors could as well?
We currently can manipulate radio and microwave frequencies much better than even long infrared. In order for interferometry to work, the receivers have to maintain coherence between each other. For optical interferometry, this means using a coherent laser along the baseline to control the distance down the wavelength and combining the actual optical signals directly while at radio and microwave frequencies, the precision required is so much less that any number of techniques will work including just coherently sampling the incoming data and then using digital processing at a significantly later time.
How many network cards have been released which despite having error detection at the ethernet, IP, TCP, UDP, and interface levels, still managed to corrupt data on a regular basis?
None, since some of the error detection/correction is already taking place above the network card level.
So are all of those BSD and Linux driver release notes which discuss network card data corruption wrong? If you offload the ethernet, IP, and TCP/UDP error detection to the card then there is no upper level unless the operating system or application implements it. Error detection on the peripheral bus also becomes useless since usually the ethernet controller itself is the source of the errors which will happily be transferred across the bus error free. Common ethernet controller problems that lead to corrupted data include bad DMA state machines, various race conditions, and interrupt problems.
All of these may have individual protection but what about the intervening DMA and bus mastering state machines?
If those need error correction to function with a low enough error rate, they should implement it themselves, not leave it up to user programs.
The usual solution is for the drivers to configure and use the peripheral in such a way as to avoid known problems. Disabling TCP/UDP checksum offloading is common but more drastic measures are sometimes necessary. This usually happens at the expense of performance but sometimes entire advertised features or standards compliance are lost. There is an astonishingly large amount of hardware released which relies on drivers to ameliorate hardware problems.
There is no reason to reimplement block-level ECC at the file system level. If people aren't checking for hardware failures, what's the point of giving them another set of ECC errors to check?
End to end block checksums can detect more than hard drive sector errors. They can detect seek errors (hard drives have a specified error rate of returning the wrong data), interface errors, bus errors, and memory errors. All of these may have individual protection but what about the intervening DMA and bus mastering state machines? How many network cards have been released which despite having error detection at the ethernet, IP, TCP, UDP, and interface levels, still managed to corrupt data on a regular basis?
. . . another when on the network and I don't think it's protected at all when flowing accross the computers busses.
Most interface and peripheral busses support at least parity. The possibility of retransmission instead of correction is generally assumed. At least for IP networks, you generally have the option of handling the 16 bit IP, UDP, and TCP checksums after packets are transferred into memory although this function is often offloaded to the network card itself.
Hard drives already take the burst nature of their media errors into account. The burst errors are considerably smaller than sector sized and data is interleaved accordingly within each sector.
12VDC, each unit needs 300W at least... That's 25 amps per unit. Think wire gauge. That's the reason, long and short. That, and you can't run 12VDC very far before power loss becomes a significant consideration.
DC distribution for telecommunication tends to be -48 volts DC and is designed to run with a 48 volt battery in a wired-or configuration.
The most significant DC distribution systems for computers are based on 370 volts DC which allows low power operation directly from a 120/240 volt AC rectifier producing 340 volts DC or high power operation at 370 volts DC produced from a boost switching regulator used for active power factor correction. Battery operation in this case would probably involve boosting 48 volts to 370 volts instead of a wired-or configuration because having a series connected battery at 370 volts is not a good idea if you can avoid it.
Tesla figured this out over a hundred years ago -- AC powers and transformers = more efficient.
Tesla did not have high efficiency, power, and density DC to DC converter technology available. AC is still more economical in applications outside of computer power distribution and very long distance power transmission.
The replies you've got so far seem to think that just because a router has gigabit ports that it can do NAT at gigabit speeds, which of course you've already figured out is nonsense.
Those dinky little consumer routers invariably have the LAN ports connected through an ASIC switch with one port internally connected to the processor for routing and bridging to the WAN side so LAN to LAN traffic is not performance limited by the CPU.
pfSense is better than m0n0wall, but still can't handle more than 35Mbps symmetric over a 100Mbps link (at least not with only a 2GHz processor and 512MB of RAM) when the "traffic shaper" is turned on.
With it off, it can handle over 70Mbps, but then you lose all those great features (like prioritizing VoIP, etc.).
I am not sure what you have going on but people are regularly get upward of 700Mbps over gigabit ethernet using m0n0wall and pfsense with good network cards. Memory latency or cache thrashing seems to cause Intel's Core2 CPUs to do significantly worse than AMD's Opterons (especially with multiprocessing) but even the current crop of embedded x86 boxes can handle better than 100Mbps.
If the traffic shaper is causing a problem there may be some low level parameters to adjust. The m0n0wall mailing list would be a good place to ask.
At the low end PCIe x1 cards/slots don't seem to be doing so well though, while lots of machines have at least one slot I don't think i've ever seen a card in person (and the cards i've seen on suppliers websites are generally more expensive and with less choice than PCI versions). It seems at the low end that most stuff has either moved to USB or been itegrated onto the motherboard (though when integrated on the motherboard it is often connected with PCIe x1).
I have a PCIe x4 RAID controller and an inexpensive PCIe x1 Intel network adapter. Besides disk controllers and network adapters, I have seen various I/O cards including serial/parallel with PCIe x1 interfaces. In my experience at least, USB based serial and parallel converters are prone to problems even if you get past driver and operating system support issues.
The onboard clocks run slower (and thus need to be corrected) because, for the satellites to be in a geostationary orbit at that altitude (IOW, to keep the same angular velocity than Earth), they need a linear velocity that's much faster than Earth's.
The GPS satellites orbit at about 12.5 thousand miles with an orbital period of about 12 hours. They are synchronous with the sidereal day and not geostationary.
The GPS satellite clocks lag by about 7 microseconds per day do to their velocity (special relativity) and lead by about 45 microseconds per day do to their orbital distance from earth's gravity well (general relativity) compared to an earth bound clock.
Not all credit cards can be relied on as a sole financial instrument while traveling. They can leave you stranded if the issuer decides any transactions were suspicious and resolution through customer service even if possible may not be timely.
If she can send the instructions for creating a wave motion engine, why couldn't she send the instructions for how to create the machine which would rid the Earth of the radiation? Why make us make the trip? Oh right, plot.
The machine instructions were on a DRM protected format so we had to go buy, err, license a copy for ourselves. There was no point in shipping it because of region coding.
I have yet to see a proposed replacement for the existing email system that actually suggests anything that would make a bit of meaningful difference for spam issues.
What about sender proof-of-work systems?
Mailing lists and legitimate bulk emails would need to be white listed but individual emails could be either rejected or flagged as SPAM if they do not include proof-of-work authentication unless they were individually white listed. That in itself does not stop SPAM but it does slow the generation rate significantly and makes it easier to detect compromised systems since the rouge processes would be consuming significant computing resources if they chose satisfy proof-of-work requirements instead of just making use of the network.
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Just measure the carrier phase difference to each satellite using pairs of closely spaced antennas. If you know your location and the satellite locations, then the two closely spaced receive antennas have to be at a specific orientation to generate the measured phase differences. This could be done using simple FM demodulation of each carrier and a Roanoke type of radio direction finder design but I suspect it would be easier to just make sure the carrier phase information is not discarded in the receiver and do the processing digitally. Survey GPS units use carrier phase measurements for more accurate location measurements.
Is this the same type of nobody who on Flight 93 succeeded where terrorism experts, intelligence agencies, police, military, Congress, the President, and the courts failed? And despite having been disarmed and ignored for more than a hundred years?
Perhaps things would have been better if they had listened to the experts and given the hijackers what they wanted instead of resisting.
Ignition wires are only shielded for special applications. It can be done in a couple of ways (braid over standard ignition wires or wire replacement with high voltage coaxial cable) but the effort required is not trivial. HAM operators who work HF or weak signal linear modes (AM, SSB, QAM, various digital) sometimes do this.
Automotive manufacturers rely on spark plugs and ignition wires designed with controlled resistive loss for EMI suppression. If you cut apart a standard wire, you will not find copper.
The poster probably meant SSE in a general way. SSE2 supplanted MMX by extending the MMX instructions to operate on the larger (128 bits versus 64 bits) XMM registers instead of the x87 floating point register stack. Power of 2 integers from 8 to 64 bits are supported.
Many onboard graphics solutions have used a shared memory architecture without a separate frame buffer but the interest here is doing so with an CPU that has an integrated memory controller and like you say, no current i5 or i7 systems support this. It is unclear to me if DMI and QPI do not support this type of operation or if Intel did not see a market for an integrated graphics chipset. nVidia was probably looking to provide something along these lines but their licensing dispute with Intel finished that. I guess Intel figures on going straight to integrating the whole GPU.
AMD's current integrated graphics chipsets link to the CPU via Hypertransport and can operate with only the CPU memory although usually manufacturers include a separate 128MB 32 bit DDR2 or GDDR3 frame buffer. nVidia's voluntarily withdraw from this market seems like a mistake in retrospect now that Intel has abrogated any licensing beyond Core2. Burning their bridges to AMD with SLI and PhysX just seems like spite now.
They want a nuclear deterrent but any indigenous use of nuclear power by Iran can displace oil which can then be exported. A nuclear power plant might as well be a bottomless cash machine from their perspective.
I saw both of these with my Enchanter main. Early in EQ I was excluded from the raiding guilds because enchanters were not needed except in exp groups and later I was continuously asked to help out (*) by the same guilds when they got stuck and lacked anybody who knew how to play an enchanter effectively. In most if not all of these cases, they had either enchanter alts or bots so once they reached some content that actually required someone who knew how to really play, they found themselves in a bind.
Add flagging and equipment requirements for resistances which preclude adding enchanter non-raid-guild players late in the game and the pool of available enchanters drops to zero. They become high in demand (for specific encounters) yet unavailable in the general population.
(*) But not join! I did Rathe for a guild once on the promise of getting flagged and becoming a member when at the end it was suddenly decided to flag alts but not guests and you could not be a member without the flag. One week later the same guild asked me again and I said, "You remember the enchanter main who did Rathe for you last week but was not allowed to get the flag? That was me." "Oh."
The energy transfer to the biosphere is ultimately what does the most damage. Sea strikes are significantly more damaging than land strikes even when you ignore the tsunamis because the energy gets converted into vaporized water which condenses out across the globe. There would be months of continuous rain and failure of almost all crops. With land strikes, a significant amount of the impact energy can radiate directly back into space and the damage is more localized. If the asteroid is broken up but the remains still enter the atmosphere, the energy transfer just becomes more efficient.
We currently can manipulate radio and microwave frequencies much better than even long infrared. In order for interferometry to work, the receivers have to maintain coherence between each other. For optical interferometry, this means using a coherent laser along the baseline to control the distance down the wavelength and combining the actual optical signals directly while at radio and microwave frequencies, the precision required is so much less that any number of techniques will work including just coherently sampling the incoming data and then using digital processing at a significantly later time.
Ubiquiti has started making 802.11n 5GHz access points although the price may be a little high. They have some inexpensive 802.11a products though.
How many network cards have been released which despite having error detection at the ethernet, IP, TCP, UDP, and interface levels, still managed to corrupt data on a regular basis?
None, since some of the error detection/correction is already taking place above the network card level.
So are all of those BSD and Linux driver release notes which discuss network card data corruption wrong? If you offload the ethernet, IP, and TCP/UDP error detection to the card then there is no upper level unless the operating system or application implements it. Error detection on the peripheral bus also becomes useless since usually the ethernet controller itself is the source of the errors which will happily be transferred across the bus error free. Common ethernet controller problems that lead to corrupted data include bad DMA state machines, various race conditions, and interrupt problems.
All of these may have individual protection but what about the intervening DMA and bus mastering state machines?
If those need error correction to function with a low enough error rate, they should implement it themselves, not leave it up to user programs.
The usual solution is for the drivers to configure and use the peripheral in such a way as to avoid known problems. Disabling TCP/UDP checksum offloading is common but more drastic measures are sometimes necessary. This usually happens at the expense of performance but sometimes entire advertised features or standards compliance are lost. There is an astonishingly large amount of hardware released which relies on drivers to ameliorate hardware problems.
Range safety is very important.
Obscure?
End to end block checksums can detect more than hard drive sector errors. They can detect seek errors (hard drives have a specified error rate of returning the wrong data), interface errors, bus errors, and memory errors. All of these may have individual protection but what about the intervening DMA and bus mastering state machines? How many network cards have been released which despite having error detection at the ethernet, IP, TCP, UDP, and interface levels, still managed to corrupt data on a regular basis?
Most interface and peripheral busses support at least parity. The possibility of retransmission instead of correction is generally assumed. At least for IP networks, you generally have the option of handling the 16 bit IP, UDP, and TCP checksums after packets are transferred into memory although this function is often offloaded to the network card itself.
Hard drives already take the burst nature of their media errors into account. The burst errors are considerably smaller than sector sized and data is interleaved accordingly within each sector.
The power loss is proportional to the square of the current so if you halve the current then the losses decrease to 1/4 of what they were.
Power Loss = Current * Voltage Drop
Voltage Drop = Current * Resistance
Substituting:
Power Loss = Current * Current * Resistance = Current^2 * Resistance
This applies equally to AC and DC current unless the frequencies involved are high.
DC distribution for telecommunication tends to be -48 volts DC and is designed to run with a 48 volt battery in a wired-or configuration.
The most significant DC distribution systems for computers are based on 370 volts DC which allows low power operation directly from a 120/240 volt AC rectifier producing 340 volts DC or high power operation at 370 volts DC produced from a boost switching regulator used for active power factor correction. Battery operation in this case would probably involve boosting 48 volts to 370 volts instead of a wired-or configuration because having a series connected battery at 370 volts is not a good idea if you can avoid it.
Tesla did not have high efficiency, power, and density DC to DC converter technology available. AC is still more economical in applications outside of computer power distribution and very long distance power transmission.
Those dinky little consumer routers invariably have the LAN ports connected through an ASIC switch with one port internally connected to the processor for routing and bridging to the WAN side so LAN to LAN traffic is not performance limited by the CPU.
I am not sure what you have going on but people are regularly get upward of 700Mbps over gigabit ethernet using m0n0wall and pfsense with good network cards. Memory latency or cache thrashing seems to cause Intel's Core2 CPUs to do significantly worse than AMD's Opterons (especially with multiprocessing) but even the current crop of embedded x86 boxes can handle better than 100Mbps.
If the traffic shaper is causing a problem there may be some low level parameters to adjust. The m0n0wall mailing list would be a good place to ask.
As I remember it, the documentary for one of the Alien movies said it was methylcellulose and mentioned its use as a milkshake thickening agent.
I have a PCIe x4 RAID controller and an inexpensive PCIe x1 Intel network adapter. Besides disk controllers and network adapters, I have seen various I/O cards including serial/parallel with PCIe x1 interfaces. In my experience at least, USB based serial and parallel converters are prone to problems even if you get past driver and operating system support issues.
The GPS satellites orbit at about 12.5 thousand miles with an orbital period of about 12 hours. They are synchronous with the sidereal day and not geostationary.
The GPS satellite clocks lag by about 7 microseconds per day do to their velocity (special relativity) and lead by about 45 microseconds per day do to their orbital distance from earth's gravity well (general relativity) compared to an earth bound clock.
Not all credit cards can be relied on as a sole financial instrument while traveling. They can leave you stranded if the issuer decides any transactions were suspicious and resolution through customer service even if possible may not be timely.
The machine instructions were on a DRM protected format so we had to go buy, err, license a copy for ourselves. There was no point in shipping it because of region coding.
The wave motion engine designs were open source.
What about sender proof-of-work systems?
Mailing lists and legitimate bulk emails would need to be white listed but individual emails could be either rejected or flagged as SPAM if they do not include proof-of-work authentication unless they were individually white listed. That in itself does not stop SPAM but it does slow the generation rate significantly and makes it easier to detect compromised systems since the rouge processes would be consuming significant computing resources if they chose satisfy proof-of-work requirements instead of just making use of the network.