FPGA Supercomputers

olafva writes: "You may be interested in this new breakthrough! See NASA Press Release and a couple of today's local stories for a remarkable paradigm shift in "Computing Faster without CPUs"." CmdrTaco said he'd believe it when he saw it. Well, they've got pictures. (Update: 03/29 5:02 PM by michael : At NASA's request, we've modified the links in the above story to reduce the load on their Public Affairs website. The same content is at the new links.)

Comments

FYI: Star Bridge=Fraudish Hype

[Anonymous Coward]

Everyone who does research with FPGAs groans when they hear something from Star Bridge. These guys mislead the public to get VC$.

If you're interested in FPGAs look for real research. Anyone can put together a board with a few hundred FPGAs. The real research is in designing a way of really using the chips.

SB's original benchmark that gave them the claim for "supercomputing performance" was "How many 1-bit adders can I stick in a couple of hundred FPGAs?. Bogus.
Fraud..

Re:FYI: Star Bridge=Fraudish Hype

[Trailer Trash]

I guess NASA is in the business of releasing press releases about the use of a new product that they've never even seen work. Fraud? You are a cynic, aren't you.

Not too cynical if you read their web site. I've been watching this company since 1997, and it is very suspicious. It should also be noted that NASA hasn't used it yet, rather they have bought one to test. Big difference, and definitely it shouldn't be seen as an endorsement.

Their web site is really short on technical details, long on hype. Just reading the technical specs that they provide is an interesting exercise. Let's take a quick look:

Memory: 288 MB SDRAM - 8 NS access time 36 chips, each 4 meg x 16 bits 7.2 GB/s throughput (200 MB/s per chip)

"8 NS access time" would normally be written as "133MHz", or PC133 memory. 7.2GB/sec? Give me a break. That number is BS.

FAI to Host: PCI 32 bit 33 MHz, which is 120 MB/s

It might be 120MB/s, but it's also behind the current $1K PC.

External: 50 pin back edge of cord Mini SCSI female connector (physical only) 48 pins directly connected to FPGA, power, and ground 1 pin connected to clock bus 10 nanosecond pin cycle time 4800 Mb/s data rate

Note that now we're using bits instead of bytes to get an extravagantly large number. That's still 600MB/sec, presumably 160MHz SCSI at 32-bits. If so, that's fast.

Eurocard organized as: Bus width: 8x36 pins direct connect to compute FPGAs (array) 2x36 pins direct connect to I/O controller FPGA Bus speed: 10 nanosecond cycle time Aggregate 36 Gb/s bandwidth

Yet another new unit for bandwidth, Gb/s. It's running at 100MHz, you can do the math. Ah, but wait:

Clock: On board 200 MHz

Let's see, 10ns cycle time, 200MHz clock. So the clock is divided by two, and it's really not relevant how fast it's running. Why not get a 1GHz crystal and divide by 10?

Operating system Windows 98 SE

Would someone seriously ship a research oriented computer with Win98? Even if you were sticking with MS products, NT/2K would be the logical choice.

The simple fact is that their web site is short on real facts, long on real hype. It's dumbed down, and includes a lot of numbers like the ones above which have been obfuscated to make them look better. Most of their hardware is standard stuff, I believe that the numbers that they've chosen to use in various descriptions (8 NS, 4800Mb/s, 3.6Gb/s, etc.) were purposely chosen to make it difficult for the average person to see that most of that hardware is the normal stuff that you would get with your $1500 computer.

I hope that they have something here, that it's as good as they say. But to convince technically-minded people like me, they'll have to post a page with no BS, just straight facts. I'm not holding my breath.

Michael

Re:FPGA?

[Anonymous Coward]

Hey - spend some time at Tom's Hardware Page!

An FPGA is a combination hardware/software device. If you passed that Digital Circuit Design class back in college, you remember that you can implement a 20-bit divider using - what - 84 NOR gates or something like that? There are orders of magnitude more gates in these devices, and orders of magnitude more complicated tasks can be accomplished.

You write a 'program' as a collection of declarative statements from the "Predicate Calculus" around the internal structure of input and output pins, and the FGPG compiler figures out which "gates" to "program" in the "field".

As the number of gates, intermediate terms, inputs, and outputs has grown, so has the complexity of the expressions, thus programs, that these puppies can handle.

Other groups working on similar stuff

[Anonymous Coward]

There are a lot of groups working on similar stuff:

http://www.ccm.ece.vt.edu/acs_api - This is my group and I apologize for the lame web page. http://splish.ee.byu.edu These guys do very good work, especially when it comes to hardware description languages. http://www.east.isi.edu/projects/SLAAC/ We like these people too. http://www.annapmicro.com A lot of our graduates go here.

There are several more groups - you can find a more complete list on the People section of ISI's web site.

Re:Other groups working on similar stuff

[bughunter]

for typical pc use it would be to expensive and painstaking to program

Bullshit. No more expensive and painstaking than it was to make a pentium processor and a Windows operating system. Christ but both of those architectures are nightmares of complexity, and yet they still got built.

No, the real problem is that it's a wholesale change in the way of thinking about solutions and applications, and we don't have enough engineers and programmers trained to think that way.

Yet.

Re:Other groups working on similar stuff

[bugspawn]

I'll add one more group: SRC Computing (Seymour Cray's last company he started before he died tragically). Check out their MAP architecture.

Re:Other groups working on similar stuff

[mchang]

Another salient link ... I work with this group, which is researching adaptive computing from within NASA Goddard.

Re:Other groups working on similar stuff

[M$ Winblows]

When I read the article it felt like the clouds parted and rays of sunshine were comming down - finally we're reaching a technology break through that Micro$oft/IBM/INTEL cant control or squash.....

then I read what you guys have been saying about the real use of this pc would be (flight simulations, huge engineering questions etc..) and that for typical pc use it would be to expensive and painstaking to program - crap! Thanks guys, as always you put the reasoning back into my fantasies. But hey just think of the things NASA can fake us out with now with this 'hyper-computer' - you know since the moon landings were all fake.

Hey has anyone heard anything about quantum computers? and how far they have come along??

Re:Other groups working on similar stuff

[adamjone]

Concerning Annapolis Micro Systems, Inc., I would highly discourage any new college grads from considering a job there. Yes, the product is extremely cool, and the job offer will be phenomenal, but speaking from experience, the work environment is awful. Although the offer will include profit sharing, the "Calculated using a propietary function each year" means you get 0% profit sharing. The 401k matching is a joke too (less than half of a percent, and only payed out one year after you pay into the 401k). I accepted a position straight out of college based on the offer and the product, and left them less than two years later. The average employee stays with the company for less than two years.

Smoke and mirrors?

[Anonymous Coward]

This FPGA-reprogramming trick came up about a year or so ago. If I recall correctly, the company involved has as its star actors, a couple of high-power intellectual property attorneys, and a huckster of sorts that has a patent on a reprogrammable audio mixer console, using similar technology. The company at the time was begging old, cast-off FPGAs from Altera, et al, so they could 'prototype' a few boards covered with hundreds of FPGAs, so they could show these around to various companies, and raise some venture capital. The only information available on their web site was a pitch aimed at folks with more money than wits, to invest in their company.

The important things to note:

1) Even though you can reprogram an FPGA in about a millisecond, the logistics of getting all the right programs to all the right FPGAs on a very dense board is left as an exercise to the reader (hint -- it is not a simple walk in the park).

2) Even though you can reprogram an FGPA in about a millisecond (yielding the claimed 1000 times a second machine re-configuration), it takes many minutes (sometimes hours) for the typical VHDL or similar program to produce the code that you will want to download to those FPGAs. And, of course, if you want disimmilar loads for various groupings of those chips, you will need to repeat the above with feeling, over and over, and over.

3) This particular company was crowing about their patented graphical programming language last year, and also didn't have anything real to show. In other words, no one had actually seen them push buttons, and have this magical language actually produce runnable code for all those FPGA's to do anything useful.

As near as I can tell, this whole thing is based on some guy's idea of raising money so he can drive fast cars, etc, etc. What really hurts is seeing NASA geeting sucked into this black hole...

Re:Smoke and mirrors?

[DCheesi]

I don't know anything about this company, so I'll have to take your word for it. But I don't think this is as implausible as you make it sound.

I'm assuming that what they're planning is to have a sort of standard library of FPGA loads for different functions, and programmers will write programs by picking the right loads for each device group. This, no doubt, is what that special language is for, so that programmers won't have to understand all the gory details in order to write code for it. Any custom loads that need to be created will be synthesized at compile time; compilation will be slow, but the run-time can be fast.

Admittedly, programming all those individual FPGAs on the fly is a complex and difficult task, but then, I doubt that most programs will be reconfiguring so often in the real world. Their 1000/s number is a maximum, and may not apply when you're trying to program multiple loads into multiple devices.

Re:Smoke and mirrors?

[garns]

I don't think the idea is to re-program the fpga's more then once per application. There ide, viva, is in fact really neat. It is a schematic editor where you connect various componects, that are then implemented on the fpga, and these bits can then interact with a program. It was explained that one would identify slow bits of code using a profiler then implement these on the fpga, to speed up execution. These fpga's, don't do things iteravly, but in parallel; and very fast. You put somthing in at one end and the result comes out with a delay involving only the delay between gates.
The complexity of the circuits you can design is limited only by the CLB(configurable logic block) count which is increasing (I think it was quoted during the presention to be) like 10x every 2 or 3 year. In any case greater then the rate of incease on transitor count.

Re:Smoke and mirrors?

[superflex]

I don't think there's any question that if this becomes mainstream, a fairly comprehensive library of digital logic functions will be developed, similar to C++'s STL or Java's class libraries. The Xilinx software I used in my digital design course already had a pretty good selection of SSI and MSI components (BCD functions, adders, shift registers, etc.), and obviously further libraries would be devloped, both for common algorithms and specialized ones (i.e. scientific).

BTW, if anyone is really interested in FPGA's, Xilinx has a hellass pile of info here.

Finally, I wanted to ask any current FPGA users if they find that they get different performance stats on the same design on different compiles. When I was doing work on Xilinx, I found that the compiler would produce designs of various speed, based on routing and the number of CLB's it used. On a couple of occasions, my longest path delay was decreased by about 25% just because i recompiled a couple of times.

Re:This just in...

[Tim Doran]

*low conspiratorial tone*

Or allow the *real* positives through...

Re:All I know will be useless!

[AxelBoldt]

they have no qualms about using quicksort for simple arrays of primitive types.

Stability is obviously not an issue in those cases.

--

Re:Press release

[dilger]

Hint: strings nasapressrel.doc | less

-cbd.

How does this differ from my CPU?

[roystgnr]

it takes many minutes (sometimes hours) for the typical VHDL or similar program to produce the code that you will want to download to those FPGAs

It takes many minutes (sometimes hours) for my compiler to build a medium or large project. But I don't store the source code on my computer to run, I store the object code, so I don't care how long the compiler takes to produce it.

I've never used an FPGA; would it not be possible to do the same thing for them? Compile a program once into "FPGA code" which then gets stored as the executable file to be sent to the chip when invoked?

Re:How does this differ from my CPU?

[Atlantix]

Absolutely. You don't have to recompile the code everytime you want to turn on an FPGA system. With Xilinx FPGAs, you store the object code in a reprogrammable PROM and on power-up, the FPGA just reads the PROM to find out what it's supposed to do. Altera chips integrate the PROM and keep their programming when turned off so they startup faster.

The real question is...

[booch]

Will it run DOS?

Re:The emperor looks great in those new clothes

[Kythe]

Depends upon what you mean by "outperform". A reconfigurable computer made of FPGA's, at least in theory, can outperform custom hardware when it comes to meeting the instantaneous needs of a task.

Kythe
(Remove "x"'s from

Re:So we learn a new skill

[slpalmer]

> How could you else have learned
> Linux 10 years ago :)

Simple.
Linux Kernel 0.01 - Released 01 Aug 1991
Linux Kernel 0.02 - Released 05 Oct 1991

I was there too....

Stephen L. Palmer

---

Re:So we learn a new skill

[slpalmer]

> Also,this does give rise to the idea
> that it is time to start the 10 year
> celebration planning

Most definately! Where's the party!?!?!

Stephen L. Palmer
---

The Nasa Press Realease

[jjr]

NewsRelease
National Aeronautics and
Space Administration
Langley Research Center
Hampton, Virginia 23681-2199

Bill Uher
NASA Langley Research Center, Hampton, Va.
(757) 864-3189

For Release: March 26, 2001
For those you can read the Word Document

RELEASE NO. 01-021

NASA Langley to test New Hyper Computer System
Computing Faster Than Engineers Can Think

NASA Langley engineers are exploring new tools and techniques that may move them and the projects they develop beyond the serial world into a parallel universe.

Via a Space Act Agreement, NASA Langley Research Center will receive a HAL (Hyper Algorithmic Logic)-15 Hypercomputer from Star Bridge Systems, Inc. of Midvale, Utah. The system is said to be faster and more versatile than any supercomputer on the market and will change the way we think about computational methods.

Taking up no more space than a standard desktop computer and using no more electrical current than an hair drier, the HAL-15 is the first of a new breed of high performance computer that replaces the traditional central processing units with faster Field Programmable Gate Arrays (FPGAs). These are specialty chips on a circuit board that can reconfigure themselves hundreds or thousands of times a second. This makes it possible for multiple applications to run at the same time on the same chips making them 1000 times faster than traditional commercial CPUs. This maximizes the use of millions of transistors (gates) on each silicon array. Traditional processors, because of their general purpose design, are wasteful, since for most applications they use only a small fraction of their silicon at any time.

HAL is programmed graphically using the company?s proprietary programming language, VIVA. This language facilitates rapid custom software development by the system?s users. Besides NASA Langley, other users will include the San Diego Supercomputer Center, Department of Defense, Hollywood film industry and the telecommunications industry.

-more-

NASA Langley is among the first in the world to get ?hands on? experience with the new system. It will be implemented to explore:
-Solutions for structural, electromagnetic and fluid analysis
-Radiation analysis for astronaut safety
-Atmospheric science analysis
-Digital signal processing
-Pattern recognition
-Acoustic analysis

Media Briefing: A media briefing will be held at 9 a.m., Tuesday, March 27, at the Pearl Young Theater Newsroom, Bldg. 1202, 5 North Dryden Street at NASA Langley Research Center. There will be a news briefing and short demonstration at 9 am followed by a demonstration and discussion for scientists and engineers. HAL developer Kent Gilson and Star Bridge Systems, Inc. CEO Brent Ward will conduct the demonstration. Two Langley researchers, Dr. Robert Singletarry and Dr. Olaf Storaasli, trained on the new system and will report on their first-hand experiences with the hypercomputer.

-end-

Re:The Nasa Press Realease

[Fesh]

Maybe somebody thought it was funny that the acronym for a new NASA supercomputer is HAL? I didn't realize it was the real press release until I saw the responses.

--Fesh

Re:The Nasa Press Realease

[vanadium4761]

Why is this modded as funny? That is just verbatim the press release from NASA.

didn't we see this before

[scrytch]

... on slashdot? Not that I don't welcome more news on the subject, but I remember the story on StarBridge, which was greeted with nearly universal skepticism (I among the skeptics, I'll admit). Wonder how they're doing with investors now?
--

How?

[battjt]

I can't find a "FPGAs for Idiots". Can you recommend a site for me to get started?

I've talk talked about this stuff at a highy conceptual level for years and have a very strong CS background, but I keep getting lost in the marketing literature.

Thanks,
Joe

Re:How?

[adamjone]

You are going to need a good understanding of digital logic design before you begin, so I suggest Contemporary Logic Design by Katz. It starts at the very beginning, so you may be able to skip the first few sections, but has good info on the basics of digital circuits.

The next thing is to learn how to efficiently design the circuit you wish to run on the FPGA. Most designs are now done using VHDL. This is a C like languages for describing the circuit. The "compiled" design can then be imported into Mentor Graphics or another CAD design program. "HDL Chip Design: A Practical Guide for Designing, Synthesizing & Simulating ASICs & FPGAs Using Vhdl or Verilog" by Smith would be a good, but difficult starting point. A good understanding of the Physics behind electronics is also very helpful for understanding why you will run into certain problems with chip design.

Unfortunately, my experience has been more on the programming side than on the design side of the projects, and therefor I am not able to provide you with better references. Good Luck!

HAL 15?

[Lando]

Hmmm, So NASA is looking at a HAL computer system,,, Anyone know what Dave thinks?

Re:HAL 15?

[markmoss]

Just don't connect it to the pod doors. 8-)

Re:Nice usage scenario.

[Saurentine]

Yeah, that's exactly what springs to my mind when I try to come up with uses for a supercomputer the size of a PC. To run my coffee pot.

Finally I can actually make coffee at home; I've always wondered how they ran the coffee pot at 7-11 - where I buy all my coffee - but now I know: They use a supercomputer!

This also explains why Starbucks coffee is so expensive... they've been using these "hypercomputers" in a secret back room at each store.

Tks for the 2day old "news"

[ch-chuck]

A media briefing will be held at 9 a.m., Tuesday, March 27, at the Pearl Young Theater Newsroom, Bldg. 12

Geez, I coulda gone to see this in person.

Offtopic Msft bash seen on 3COM:

"The performance of the server connection depends heavily on the network operating system and underlying protocols. UNIX operating systems appear better adapted to handling Gigabit Ethernet speeds, while the TCP/IP protocol running under Microsoft NT 4.0 still has much room for improvement. TCP/IP is a connection-oriented and complex protocol that requires high CPU bandwidth to process packets at gigabit per second rates. "

Pic don't load and article has glaring errors.

[crovira]

There's no such thing as NT on the Alpha chip. Even if there was, I'm not sure I'd want to screw up the VMS machines over here.

Re:Pic don't load and article has glaring errors.

[Rupert]

NT at one time shipped in 4 flavours: x86, PPC, MIPS and Alpha. Only x86 continues to be developed.

--

Re:Pic don't load and article has glaring errors.

[Anoriymous Coward]

OK, I don't usually rant about moderation, but this has got me confused.

Why is this Informative, but this is Offtopic? Is it the lack of a link to microsoft.com? Would that make it on-topic?

--

Re:Pic don't load and article has glaring errors.

[Bobo the Space Chimp]

> NT at one time shipped in 4 flavours: x86, PPC,
> MIPS and Alpha. Only x86 continues to be
> developed.

That's because it accomplished its goal. It killed off other OS's on other platforms as serious corporate server contenders. If anything rises out of the ashes, NT will quickly be re-ported to it.

Re:So we learn a new skill

[FreeUser]

I am 36. I turn 37 in April. Birthdays don't necessarilly match year-end dates or OS anniversaries precisely. To clarify, I began playing with Linux early in 1992.

Re:So we learn a new skill

[FreeUser]

...and learning to write screenplays at 36 (are they going to suck as much as The Matrix?) doesn't dis-prove that you can learn easier when you are younger...

Point well taken. I wasn't trying to disprove anything, merely cite by example that learning a new skill as one grows older isn't a problem at all. As for it being easier to learn when young, that is true of some things (languages) at particularly early years (before six or eight years of age being the typical ages cited), but is certainly unproven for anything beyond that. For example, IFAIK it is unproven that learning German at 21 is easier than learning German would be at 31 or 41.

To answer your question, it is quite likely that my screenplays will suck far worse than the Matrix. :-)

So we learn a new skill

[FreeUser]

Somebody with years of experience in traditional programming probably won't find their skills translate too easily. The investment in layers of abstraction built on traditional processors is too big ever to throw away, but this kind of a machine is a nifty trick to have available.

It is extremely cool to have this technology emerging. As for our years of skills translating, or not, it isn't really all the important. We will simply learn how to program this new equipment, from scratch if necessary.

It is a myth that the young learn better than the less-young. As an example, I learned German at 21 (and am now very fluent), Linux at 26, how to fly a plane at 33, and am now learning to write screenplays at 36. (As an amusing counterpoint I will almost certainly never learn to spell, even at 60. Not because I cannot, but because I have better things to do with my time, and a spell checker when absolutely necessary, but most of all, because I take perverse pleasure in yanking the grammar nazis' chains). While I doubt I'll be performing any airshows, or attending the Oscars, anytime soon, the point remains: we have already been taught how to think and learn. Learning how to use and program FPGAs won't be that big of a problem, with or without years of programming experience behind us.

Re:So we learn a new skill

[WillWare]

It is a myth that the young learn better than the less-young.

I too have learned stuff as I've gotten older, but that wasn't what I meant. The history of computer science since the 40s and 50s really hasn't been as shallow as people like to think. Somebody else's comment to the effect that "things of an essentially linguistic nature can all be learned in 21 days" is short-sighted. Go to any computer science library in any university. Look at the shelves and shelves of books, journals, and papers. Stuff on compiler design, cache performance and optimization, several hundred decades-long debates percolating under the general heading of language design, relational databases and object databases and which is better...

It's easy to forget that five decades of very smart people have dedicated their careers to advancing this whole "computer science" thing. In our current historical situation, the entire field has been flattened down to "what can I do with web browsers and servers?" in the popular mind. People start to believe that something like J2EE represents all of human thought regarding computer science, or at least, all of it that's worth preserving.

Re:So we learn a new skill

[joekool]

actually, unless I am being usually dense, it's not august yet, and thus linux itself is not 10 years old, thus he did not learn linux 10 years ago, if he is 36, and was 26 at the time. Of course, that is just being picky, and I am sure that he meant 9.5, or whatever. Also,this does give rise to the idea that it is time to start the 10 year celebration planning--someone send me a ticket!

Re:So we learn a new skill

[joekool]

guess I am just used to my birthday, which as it happens, does match year end dates!(being the lst day of the year and all!

Re:So we learn a new skill

[maraist]

Logic gate programming is slightly more complex than syntactic abstraction. I know a good number of computer engineers that gave up and went back to traditional computer science (who's programming skills can apparently be learned "in 21 days").

Having gone completely through the process myself, it's as easy as skiing for me, so I can't objectively analyize it.

The biggest problem is in debugging; you have to trace through dozens, hundreds or thousands of "signals" on a simulator. Logging is also not always an option.

-Michael

Re:So we learn a new skill

[rawburt]

Somewhere along the way you seems to have picked up time-travel too. How could you else have learned Linux 10 years ago :)

Re:So we learn a new skill

[markmoss]

Learning how to use and program FPGAs won't be that big of a problem, with or without years of programming experience behind us. Except that with FPGA's you aren't programming, you are doing logic design. It's not a case of mental flexibility, it's a case of one job being inherently much harder. I've worked on microprocessors so new there wasn't even an assembler, we had to hand-translate to hex -- and even that's easier than the logic design tools I've worked with.

Re:Umm

[Delphis]

And jeez.. I know this might be a foreign idea to a lot of people, but THERE'S MORE TO LIFE THAN MONEY!

I know you're just trolling, but why is everything always money money money.

--
Delphis

Re:"I'm sorry NASA, I can't do that..."

[domc]

Oh my fsking god! You're right. I don't know how I could have missed that.

You're reading comprehension skills must be amazing. Please tell me -- what is your IQ?

d

programming FPGAs is different

[WillWare]

Programming a bunch of FPGAs (essentially an ocean of gates and flipflops) is necessarily pretty different from programming a general purpose sequential computer. It's interesting to see Star Bridge's thoughts on this, and why they're optimistic about this approach.

The VIVA project was initiated several years ago to bring high-level computer language capability to FPGA programming and to take advantage of the massively parallel capabilities of FPGAs. FPGAs are cheap to make, much cheaper than complex microprocessors such as the Intel Pentium III. The yield rate is higher because the deposition densities are much more uniform for FPGAs than for microprocessors. Furthermore, the entire chip surface can be dedicated to usable transistors, with the potential to provide orders of magnitude more computing capability on the same size chip.

They go on to describe a hierarchical GUI that connects functional block to make bigger functional blocks. Somebody with years of experience in traditional programming probably won't find their skills translate too easily. The investment in layers of abstraction built on traditional processors is too big ever to throw away, but this kind of a machine is a nifty trick to have available.

Re:programming FPGAs is different

[winse]

Many CS students will also latch on to this quickly. At least the program I am in had to do some FPGA work. We built a UART from scratch and did some other dinky little projects, but at least we've been introduced to the technology. To me its like programming in scheme . . . I've done it but I'm not that great at it.

Re:programming FPGAs is different

[DCheesi]

Programming FPGAs *is* different, but...

I can see where some pure CS types might have a problem with this, but anyone who has done any hardware development lately should feel right at home. Most EEs and CpEs have some training on FPGA and RTL design.

The real issue isn't the paradigm so much as the complexity. Getting this many device blocks to work together and do something useful, much less reliable, is rather a herculean task. It's like writing a 50,000 line program in assembly; maybe even worse. The average "script kiddie" isn't going to manage it.

Eventually, though, if this thing was useful enough, it would become popular, and lots more resources would be thrown into abstracting it. Once you had MPHC (Massively-Parallel Hyper-C) in place, things would get a whole lot easier.

Part of the reason that this hasn't happened already with hardware tools is that HW engineers are even more resistent to abstraction than the old-time assembly programmers were (except for the few hold-outs in the embedded world). As long as the size/number of the devices is below a certain level, there's no need to abstract, and plenty of reason not to. As the size and complexity of the design grows, though, at some point the task becomes unmanageable; that's when C-like programs become attractive.

Re:programming FPGAs is different

[dedsp_ce]

It seems that this "hypercomputer" is just vaporware that keeps getting dredged up. For what reason? http://www.countdown.org/end_articles/tec_new_comp uter_technology_the_hypercomputer.htm http://www.shmoo.com/mail/cypherpunks/feb99/msg001 17.html http://www.findarticles.com/m0NEW/1999_Feb_17/5391 0950/p1/article.jhtml

New amazing technology never comes around.

[UnkyHerb]

Wow, sound's like it could be usefull for CERTAIN things, but still amazing nonetheless. I always hear of this amazing new technology coming out, FPGA Supercomputers, solid state hard drives, REAL 3D monitor's that cost $5 to make from existing LCD displays, emulated gills to breathe under water, etc.

I just wish some of these things could make it to my house. Is it because of the ridicilous marketing and business planning that these inventions depend on to succeed, or is it just because they don't want to market these ideas and sell them to dead end companies?

I'm not totally sure, but i'd like to know whats stopping some of these things from making it to the end user.

Probably only faster for simple operations

[Erik Hensema]

I couldn't read the press release (MS Word - bah), but judging from the websites, the FPGA is dynamically programmed to perform very specific tasks in hardware.

Since these specific tasks can run in hardware, they will run 1000 times faster than a Pentium. There is no way in the world this machine is going to run general purpose applications at this speed. Only very specific, small, algorithms. Sorry, no 6000 fps for Quake ;-)

This makes the machine useless for everyday use in your home. However, I agree this machine may be very usefull for flight-control computers.

Re:Probably only faster for simple operations

[Anm]

Not true since the hardware can be reprogrammed thousands of times per second. This is where the FPGA has an advantage over a custom desinged chip.

Anm

Re:Probably only faster for simple operations

[andrewmc]

Sorry, no 6000fps for Quake ;-)

Why not? The algorithms may work best for small-grain problems, but what is any graphics program but something that computes thousands of pixels at the same time? I'd imagine image-processing (in general) is highly parallelisable at the pixel level.

Re:Probably only faster for simple operations

[buback]

on the contrary. i think that someday we might just see this type of technology in graphics cards.

Re:Probably only faster for simple operations

[bornie]

"Since these specific tasks can run in hardware, they will run 1000 times faster than a Pentium. There is no way in the world this machine is going to run general purpose applications at this speed. Only very specific, small, algorithms. Sorry, no 6000 fps for Quake ;-)"

Humm.. 1000 times faster, 6000fps in Quake with this, do you really mean to imply that you only get 6fps in Quake with current technology? :)

Re:Probably only faster for simple operations

[Shane Hathaway]

Actually Quake would be one of the *most* parallelizable applications. And nobody would want 6000 fps, instead they'd rather have 1024x768x100 voxels... for the real experience!

Re:Probably only faster for simple operations

[Sabol]

You've obviously never tried turning on 4X anti-aliasing on a Voodoo5500. :)

Re:Probably only faster for simple operations

[mchang]

You are correct on one count: highly-parallelizable code is great for FPGAs, since we can get much more done per clock cycle. But, you will get killed in performance on a few counts, at least as far as current FPGA technology is concerned: a) video processing is generally floating-point. not good for FPGAs since FPGAs are bad at variable-length shifts, which is at the core of floating-point math. b) integration between the general purpose CPU and the FPGA co-processor is not as tight as, say, a video card. Thus, you are limited a) by the PCI bus, and b) by any reconfiguration overhead that you may have if you have to time-multiplex configurations into your FPGA. So, in essence, for something that is very specialized and very performance demanding, such as graphics rendering, you'll most always go straight to regular silicon (ASIC implementation), as your volume will make up for the costs. Where FPGAs help out most is in their ability to morph into doing many different tasks, since it is reconfigurable. Video processing has a well-defined set of operations (shading, texture mapping, z-buffering, etc. etc..) that need to be supported, so flexibility is second to performance. Mark

Re:Probably only faster for simple operations

[markmoss]

Actually, gaming is one area where this might make a difference -- if there are enough gamers out there willing to spend over $10,000... Where FPGA computing shines is when you need to do a lot of repetitive computing, and much of it can be done in parallel. That is, this machine could do Quake with movie quality graphics as fast as human comprehension allows. Of course, maybe a P4 1.5GHz can do the same, and it costs less and is much, much easier to program...

Re:Probably only faster for simple operations

[markmoss]

Where did you get that it learns from its own successes and failures? Some of the links seem to be slashdotted, but that's not in the NASA press release. Nor was it in the press releases I vaguely remember from when HAL was starting.

What does it look like?

[shaka]

From the Daily Press article: "It looks like any other computer case (the rectangular part of a PC that contains all the chips and wiring to run it)".

But I looked at the pictures and that was simply not the case! The case being, it didn't look like a case. Uuuhh, should I be writing this in upper case?

Aargh, that damn coffee. How fast will it compile my kernel?

Re:Nice usage scenario.

[shaka]

Well, now when you comment on it, isn't that reversed? Or do you just lose all you points?

Nice usage scenario.

[shaka]

From the Daily Press coverage: "People could hook into central hypercomputers to run their entire households -- from the coffee pot to the television set, the shower to the garage door"

Yeah, that's exactly what springs to my mind when I try to come up with uses for a supercomputer the size of a PC. To run my coffee pot.
Finally I can actually make coffee at home; I've always wondered how they ran the coffee pot at 7-11 - where I buy all my coffee - but now I know: They use a supercomputer!

Re:Nice usage scenario.

[shren]

"Make me a cup of coffee."

"I'm afraid I can't do that, Dave."

Re:Nice usage scenario.

[bmongar]

Damn wheel mouse, didn't mean to moderate this offtopic. *sigh* Sorry/ /P?

Re:Nice usage scenario.

[bmongar]

It is reversed, and I loose the points spent on this artilce. Which is why I commented, to undo my mistake.

Re:Viva means Life??

[Raindog]

I belive that viva is latin for life....as in vivasect....I could be wrong though

Re:The emperor looks great in those new clothes

[ethereal]

HAL said it too near the end of the same movie.

Re:Erm.... The Name....

[ethereal]

I found it more disturbing that they're distributing press releases in .doc format, which is pretty much worthless for distribution over the web. Would it have killed them to export to HTML first?

as if that were new news...

[timerider]

Star Bridge Systems and their FPGA machine have been here 2 years ago...

Re:Press release

[Taurine]

One would have thought that the natural format to choose for a press release on a web site would be HTML, just like the rest of the web site it is hosted on. That way, 100% of the world's Internet users, who are the only ones that will be able to retrieve the file, will be able to read it, regardless of the operating systems and user software they choose to install and/or pay for.

Further, most of the 95% of the World that you believe use MS Word are not the people that will have any interest in reading about this. The people who are interested are mainly scientists and engineers, two groups who tend to be more likely than average to use a platform other than a PC running some version of Windows. These guys are more likely to write things in LaTeX than Word. But they will have an equal chance with everyone else of being able to read HTML.

I certainly don't have any software installed on my system that can read Word files. I know of several programs that could do an aproximate conversion, but why should I install extra software, using my time and computing resources, to read this, when its not even close to the format that any reasonable person would have expected it to be in anyway?

Re:WOW!! Joint NASA/Sony Announcement!!!

[BRock97]

Damn it. Don't post comments first thing in the morning without the proper ammount of coffee!

Bryan R.

WOW!! Joint NASA/Sony Announcement!!!

[BRock97]

So, NASA makes this announcement, and Sony goes right around and announces that they have been working closely with NASA to develop the Playstation 5 based on this technology. The PS5 which begat the Playstation 4 developed by the NSA which begat the Playstation 3 developed by IBM's super computer division will allow the game player to control the console from any NASA station in the world! Imagine playing Tekken Tag Tournament Hyper Z 2K10 Script Kiddie Edition with the folks on the International Space Station! From all that I have read, I think I will have to wait for the PS5 instead of the PS4 and PS3. Thanks Sony marketing engine!!!!!!!

Bryan R.

Re:This is over dramatized

[Mr. Piccolo]

How does a finite sized room become a "holodeck" of much larger(potentially infinite) size such as Yankee Stadium?

Heisenberg compensators, of course.

FPGA?

[toofast]

Enlighten my lack of knowledge... but what is a field programmable gate array (FPGA)? Is it another weird acronym like a Global Regular Expression Parser (grep) or Packet Internet Groper (PING)?

Re:FPGA?

[eric2hill]

It's actually a NAND gate. Every combination of NOT, AND, OR, XOR, and so on can be represented by combinations of NAND gates. Any [logic] circuit could be built with significant numbers of them. That seems to be what Altera and Xilinx do for a living. I know that Xilinx has some pretty great educational prices, and you can pick up a PCI board with FPGA onboard for around $270 if memory serves.

Re:FPGA?

[p3d0]

You can think of an FPGA as a digital circuit simulator. You can design any digital circuit, and an FPGA can simulate it roughly one or two orders of magnitude slower than the circuit would run if you made a real IC out of it.

Logic operations can be described with truth tables. FPGAs contain programmable truth tables (called lookup tables, or LUTs), so you can implement whatever logic operation you want. They also contain programmable interconnects that allow you to join your LUTs in any way you want.

Usually, they also contain some memory, because it takes a lot of LUTs and interconnects to build memory, and the resulting memory would be very slow and wasteful.

How is this faster than a CPU? Well, the win comes when you design a custom circuit to perform a certain task, rather than using a general-purpose CPU. For instance, if you could make a citcuit to do something at 100MHz when it would take, say, 100 Pentium instructions, then your FPGA would outperform a 10GHz Pentium!

Used in this way, FPGAs are the ultimate parallel computer. They have many thousands of very small processing units (LUTs).
--
Patrick Doyle

Re:FPGA?

[jovlinger]

One area where these babies ought to shine is in modern ciphers systems. DES, twofish, as DSPs, maybe even as CODECs (tho that might be a bit much for the gatebudget)... anything where you can partially evaluate the program into hardware. This would work very well on a daughter card, where you can set up DMA controllers to just pump data in and out of the FPGA.

The hard part is designing the circuit. Compilation down to silicon is a known hard job, with layout and drawing abstraction boundaries being two main stumbling blocks.

blue sky musing: On the horizon for mainstream acceptance are profiling feedback optimisers, which produce specialised versions of code that run very fast for a limited set of [common] inputs. These currently go from a higher level language to a lower level language (java JITs like HotSpot or transmeta's codemorphing) or from the lowlevel language to the same lowlevel language (HPs dynamo).

It would be really cool to see this technology applied to creating FPGAs, where the meta software notices that a certain basic block is taken often, and has mainly bittwidling operations. If it is taken often enough, and is long enough (this is where the specialisation of dynamo comes in -- it basically just creates optimised long basic blocks) it makes perfect sense to compile it to silicon.

Eventually, the Ghz race WILL pewter out, and we'll be forced to this sort of generalised specialisation for getting the 90/10 any faster.

Re:FPGA?

[Snoochie Bootchie]

An extremely important thing to remember about all programmable logic devices is that a tremendous amount of the die of a programmable logic device is wasted compared to an equivalent ASIC. Programmables require massic chip real estate for routing of signals. The routing structure is, arguably, the most important aspect of the device. You can put in all the whiz-bang specialized circuits you want, but you have to be able to use them (and, use more than one of them if they're tiled throughout the device). Routing is what enables that.

Also, the logic primitives in a programmable (e.g. a slice in a Xilxin Virtex FPGA) can run extremely fast. It is not the limiting factor in getting speed from an FPGA. The much bigger issue is routing.

In addition to the actual logic and routing, there's configuration bits (the SRAM/FLASH/antifuse bit that are used to actually cause the device to implement the logic you want) and the support logic to program the configuration bits. There are millions of configuration bits on larger FPGAs. And don't forget the fact that the IO cells in most FPGAs support multiple I/O standards and usually contain a flip-flop and a small amount of miscellaneous stuff (e.g. a couple muxes for the output enable and clock select).

On the software side, generating logic equations is well known. The issue is in taking advantage of the specific architecture of the targeted device and all it's special features. And the other issue is finding the optimal routing between the logic resources and memories you've used. Both of these issues have been and continue to be researched.

Re:FPGA?

[Necroman]

I am going to my Digital Design class in about 40 minutes, the lab to be more exact. Here we work with a FPGA device by http://www.altera.com/. They seem to be a large maker of devices like that. They can actually do some interesting things, but getting em to work right can suck.

Its not what it is, its something else.

Re:FPGA?

[maraist]

Well, nand isn't the fastest (active buffers, cheater-switches, and inverts fill that role). Plus most logic-design I've encountered provide macro-cells that perform efficient and often used functions. The one's I've worked with (in class) utilized a two-stage multi-AND / single-OR cell so as to provide generic combinational logic. And then they provide macro-cells such as Multiplexors, memory cells, or what-have-you.

The details are exploited or emulated by the synthesizer stage (if memory serves). Thus you can abstractly program with VHDL or what-have-you and not worry too much about what's really happening. I'm curious to learn what 'VIVA' adds to the development environment. Maybe it's Visual VHDL (tm) with drag and drop widgets. :)

-Michael

Re:FPGA?

[chrysrobyn]

We're kind of straying off topic here, but NANDs are often preferred because the p-channel transistors are in parallel. N-channel transistors switch faster than p-channel ones, and thus don't suffer as much from being placed in series. In practice, the NOR is typically twice (or more) as large as a NAND in CMOS. You're (practically) right about the N-channel switching faster than P-channel ones (due to electron/hole mobility), but out here, we double or triple the size of P-channel transistors, AKA PMOSFETs AKA PFETs so they perform much closer to the NFETs. Increasing the size of those PFETs increases the internal capacitance, which adds up, and can slow the circuit down when compared to a NAND configuration. Increased capacitance increases power dissipation. There's no space or cost benefit of a NAND over a NOR - they're both 2N transistors for N inputs. There is either no space or (almost) no speed benefit over a NOR. Either way, speed, space and power count into cost, so I need to disagree there.

Re:FPGA?

[DeeKayWon]

We're kind of straying off topic here, but NANDs are often preferred because the p-channel transistors are in parallel. N-channel transistors switch faster than p-channel ones, and thus don't suffer as much from being placed in series.

There's no space or cost benefit of a NAND over a NOR - they're both 2N transistors for N inputs.

Re:FPGA?

[Alatar]

I don't know where that unwieldy explanation for "ping" comes from. At any rate, "ping" an onomatopoeia of the sound old-time audible-range sonar makes, not an acronym. As Mike Muuss, the man who created ping says, "From my point of view PING is not an acronym standing for Packet InterNet Grouper, it's a sonar analogy."

Re:FPGA?

[df1m]

Yes and no. It is a weird acronym like 'grep', not a slang term like 'ping'.

You asked.
- dave f

Re:FPGA?

[markmoss]

75% right. "Field Programmable" means it is programmable in the field, rather than mask programmed at the factory. Some FPGA's are based on EEPROM (Electrically Eraseable) or Flash ROM technology, but obviously for this job you want the ones that are based on RAM. That means they have to read their program every time they power up -- that's a disadvantage when you are just using the FPGA as a permanent replacement for a bunch of hardwired logic chips, but perfect when you want to change the program every time you use it.

Re:FPGA?

[Claric]

And it's a NAND gate because they are (phyically) the easiest logic gate to build - and the cheapest I'd imagine.

Claric
--

Re:FPGA?

[hamish_moffatt]

Actually, most FPGAs are based on static RAM and are programmed each time you power them on, through a host microprocessor or external ROM. No EM fields are needed (nor welcome).

Specs for the HAL-15...

[The Fun Guy]

... and pictures, too.

HAL-15, desktop model (the one NASA is testing)
http://www.starbridgesystems.com/prod-hal1.html

HA-300, the rack-mounted, 12.8 TeraOp version
http://www.starbridgesystems.com/prod-hal3.html

The Star Bridge website seems strangely non-Slashdotted, considering how much trouble I had getting the NASA sites to load.

When I saw this one, I was sure it had to be an early April Fool's joke, but it looks like they're for real. The company's hype still sounds pretty pie in the sky, but if they can deliver even 10% of what they're promising, a hell of a lot of computational power could be available in a few years.

They cite cost savings in chip design (simpler, lower power, etc.) and chipfab retooling as a point in their favor (a single type of chip, customized for different applications). They cite it for speed of implementation, rather than reduced cost, but presumably that would come later. The HAL-300 is priced somewhere around $26 million, so don't bother to check E.bay for a few months yet.

Re:This just in...

[_Splat]

The card you heard about was a big hoax.

Isn't this kind of like Hotspot in hardware?

[IsleOfView]

From what I understand, the Hotspot JVM's (especially the server VM), "tune" and "retune" the compiled code they generate based on the task at hand to produce maximum performance. FPGA sounds similar, but is based in hardware. Is this true? What are the differences?

Re:Isn't this kind of like Hotspot in hardware?

[GooberToo]

A friend of mine and I, about 6-8 years ago were talking about doing this type of thing. Not actually us doing this, rather, it being done. Furthermore, we talked about arrays of FPGAs being programmed which would in turn, dynamically retune to work in concert. The FPGAs that we were looking at, at the time, were no where near fast enough, but I think it's cool that we were able to see so far into the future on something like this. We also assumed that one day this would be the basis of a dynamic NN for super cool AI. Now, if only the site were not being slashdotted so I can actually read the article....

Re:Press release

[Hast]

If you read his post instead of grepping for Microsoft and asuming it was derogatory you migth have seen that he wasn't really complaining about MS but about NASA using it to post a press realease on the net.

Any reason they couldn't do it in HTML? Or PS/PDF? Any reason at all to make me download the file and then open it in another program?

It reminds me of when I got a mail with no text, but an attached .DOC file. (No, there we not even any images in the file, only text.)

DOC files have their place, the net isn't it. (For gods sake, Word even saves files into a very mangled HTML version, why not use it?)

Re:Coming soon to a bedroom near you?

[Ranger Nik]

according to another poster here, it costs $1M. *slightly* more than a workstation.

Re:Press release

[cmg]

It is a "Press Release". They're giving easy to handle stuff so that a reporter can write a page of fluff telling you the same stuff in your local paper. NASA wants to get their news out and hopeufully get that "nasa does neat stuff - lets not cut their funding" thought flowing through the general public.

Re:The emperor looks great in those new clothes

[zmooc]

Go read http://www.starbridgesystems.com if you find this hard to believe. It's nothing really new and it's for real. But a 1000 times faster than a pentium 4 can most probably only be achieved on certain tasks. Probably tasks which can easily be done using dedicated hardware which can now be made instantaneous (difficult word) using these FPGA's.

Not that much of a big deal

[zmooc]

These systems have already been available for quite some time from Star Bridge Systems and have already been featured on /. a few times (search for `Star Bridge Systems'). But they're still reaaaaally cool. There's a lot of information about them on the Star Bridge Systems website (see link above).

I think the only real reason that NASA is going to be `one of the first', is simply the fact that nobody seems to buy these things. Which is a pity. What's really REALLY sad, is that their claim to have a $1000 version available by now (link to /. article) is still vaporware.

Re:The emperor looks great in those new clothes

[SpinyNorman]

Really? Wow! I wonder how close we are to DSP's being obsolete entirely, and people just compiling their designs to FPGAs? It'd be awesome if this technology became mass market and cheap.

Re:The emperor looks great in those new clothes

[SpinyNorman]

If this thing could be reconfigured to be a better hardware graphics accelerator than a dedicated hardware graphics accelerator like the GeForce 3, then I'd REALLY be impressed :-)

75 GFLOPS for the GeForce 3 - kinda hard to beat.

Re:All I know will be useless!

[SpinyNorman]

Yep, shuffle sort can be implemented in O(n) on a massively parallel computer.

What'd be neat would be if they sold this thing at a price reflecting it's cost (an FPGA chip) rather than the customers ability to pay...then we could all play with them.

Re:All I know will be useless!

[SpinyNorman]

Of course, but this is actually easy to do. I remember taking a VLSI design course (based on the Carver Mead/Lynn Conway book) back in college around 1980 and designing a "memory cell" with a built-in comparator that could swap the contents with the neighboring cell.... the "sort algorithm" then consists of loading the memory and clocking it N times! :-)

"Star Bridge" sounds familiar...

[Raetsel]

I rememeber an article in Discover magazine (online here) that talked about a "Star Machine." It was called "GRAPE," it was for the study of globular clusters, and one of it's iterations was the first teraflop system ever built.

It was used for calculating the gravitational interaction of thousands of bodies -- a very parallel and complex problem. The solution was many custom processors in parallel, and it was so successful (and cheap!) that it outperformed multi-million dollar supercomputers at a fraction of the cost.

The downside was that it was a single-use system -- it could only to the calculation it was hard-wired to do.

Since the site is slammed, I can't see what they're actually doing... but the name is sure close. The FPGA idea is neat, because it would relieve the single-use limitation.

I'm still not holding my breath waiting for one of these to appear under my desk, though...

Re:"Star Bridge" sounds familiar...

[MustardMan]

Starlab and grape are not commercial systems, but instead are a collaborative effort between many universities, each building and tweaking on the design. At the physics dept here at Drexel University, we have a several year old (GRAPE-4, I think?) system that can outperform our 64 Node beowulf cluster for the calculation it was instended for. Stick that in yer pipe and smoke it.

Re:See "The Economist"

[dhalgren]

I remember when I first saw this reported (in Discover or SciAm or something). Blew my mind--this machine, left to its own devices, redesigned itself in ways we still don't understand, making use of obscure physical attributes of the chip on which it was running.

Hmm. Hearkens back to Asimov's 'Nobody Here But--'. :)

Re:Umm

[winse]

Its always all about the benjamins. ***deep breath in**** ahhhhh don't you just love the smell of Capitalists in the morning.

Two companies have already taken delivery ...

[emeka]

These companies have already taken delivery of starbridge computers here are their URL's:

www.indranet-technologies.com

and

www.ceristar.com

Interesting stuff..........

Correction

[Talisman]

"There's no such thing as NT on the Alpha chip."

Actually, there is.

MS word only? are you kidding?

[linuxlover]

I hate when people release documents/press releases on web with proprietary (Sp?) format. It is NASA for crying out loud, even MS does their PRs in HTML.

I sent back any word resumes I receive and ask them to send me a txt/HTML format. Most realize there are people out there who don't have the latest word 2000, and will send a text version along with it next time. But some wheenies complain "but you will loose all the format". I tossed this guy's resume and replied to him, that I am looking to hire a programmer based on experience, not a secretary who can format docs.

We should stick to open standards, atleast when they are available for free and widely in use.

LinuxLover

Re:The emperor looks great in those new clothes

[p3d0]

FPGAs can't outperform custom hardware. They can outperform CPUs because CPUs are general-purpose hardware that run programs in serial, while FPGAs are general-purpose hardware that run programs in parallel. But special-purpose hardware will always win. (Whatever technology you make the FPGA out of, you could just make the custom hardware on the same process and get an order of magnitude improvement.)
--
Patrick Doyle

Re:All I know will be useless!

[p3d0]

No, nothing short of an infinitely-parallel machine can do O(n) for sorting. Remember, the big-O notation refers to asymptotic complexity, which means the problem size increases without bound. If your computer is not infinitely parallel, then there will exist some n which is too large to fit.
--
Patrick Doyle

HAL

[wiredog]

From the press release: HAL is programmed...

HAL, yeah, right, "Open the goatsex link HAL" "I'm sorry Dave, you know I can't do that"

And we're still 2 days from 01-04-01.

Re:Press release

[BigNachos]

Jesus, someone please mod this moron down.

Fig leaves are in fashion again

[jovlinger]

neato.

I wonder; would it be more useful to market these as reprogrammable CPUs? Ie, don't make the poor hardware designer design the whole CPU, but give them a few instructions that you'll take care of the decoding and commit-in-order and speculation, but they get to design the actual instruction.

Outlinish they'd declare: this instruction reads registers x,y,z, writes a,b,c, and will require so many cycles to complete after inputs.

Has this been tried and failed, is this what they do, or are there other reasons why It Would Never Work?

Oh my new toy has arrived

[patrik]

Goody, I work for this guy, and I have been hearing all about it for the past couple of weeks. If anyone wants to hear my thoughts about it let me know, pbutler@killertux.org. (Assuming I get I access to it, which is a pretty good assumption). Patrik (worrying if he'll get his email /.ed)
-------------
Just your ordinary BOFH :) http://pjbutler.dhs.org/me

Re:Oh my new toy has arrived

[olafva]

Welcome, you're so involved in robotics competitions lately you missed HAL's arrival. Yesterday five of us worked with HAL, testing algorithms etc. (I got home at 11pm). Looking forward to your joining us with your great ideas. William (high school) figured out VIVA programming and was testing algorithms in 30 minutes with Robert's help, so perhaps you'll be proficient in 10 minutes? At 1PM today HAL will be on our NASA Langley network accessible anywhere inside our firewall.

Re:Coming soon to a bedroom near you?

[patrik]

B) It's a s-o-b to program. You aren't writing software, you are designing a custom hardware circuit to solve the problem, which is then implemented by programming logic gates and connections in the chips. In other words, on a computing job where you could write a program in C in a week and it would run in 1 minute on a PC, on FPGA's it might take a year to design and run in a millisecond. So if reducing the run time is worth paying six figures for software development, go for it... Maybe the HAL people have found a way to ease the programming, but it's still going to be quite a lot harder than normal programming. Actually it looks pretty easy to program. It apparently uses a graphical programming interface, something like Labview I suppose. No real programming is done per se it's all done by dragging and dropping modules. Patrik
-------------
Just your ordinary BOFH :) http://pjbutler.dhs.org/me

Automated Gate Development

[tsetem]

I seem to recall that there was development on an application of AI to use it to find better ways to design logic gates & the such. They put it to the test and found it optimized a bunch of circuits that were hand-designed (something like 300 gates to 75 gates).

I guess what I'm getting at is that yeah, a programmer could design & layout the chip according to his needs, but wouldn't it be better to describe the chip (ala C-Program), and run it through another system that would program your chip most efficiently?

Yes, they do.

[TurkishGeek]

NSA has been a very heavy user of these for a long, long time now. Back when I was a fresh graduate student, a company in Annapolis, MD called Annapolis Micro Systems was hiring EE's with HDL/FPGA experience to work on their custom FPGA computing products. Needless to say, they were only looking for US citizens.

I don't see that company selling many FPGA custom computing boards to boat owners and Chesapeake Bay fishermen in Annapolis. NSA is only miles away, and I bet these boards have been developed specifically for their use.

Check out the company and their products, and you will see which products I'm taling about.

Re:Yes, they do.

[JohnDenver]

Thanks for the story and link...

It might work or ...

[mattcasters]

you guys are 3 days early...

Re:It might work or ...

[benwb]

Changes the border color

Re:It might work or ...

[JimPooley]

--- I still know what "POKE 53280,0" means ...
Not the poke that used to fry a particular model of Commodore PET's monitor, is it?

I agree with you about the three days early bit. I keep wondering if any of the names mean "April Fool" in some other language...


Hacker: A criminal who breaks into computer systems

Re:It might work or ...

[Cybrex]

Mmmmmm... flashback...

10 for x=1 to 16
20 poke 53280,x
30 poke 53281,x
40 next x
50 goto 10

It's so gratifying to know that I'm not the only one in the world who still remembers stuff like this! I used to use C-64 memory addresses for voice mail passwords 'till they increased the minimum password size to 6 digits. Sigh... I bet I can still type '64738' faster than anyone else on the planet! :)

Oh, on topic: I remember reading StarBridge's home page a while back, and wondered when these things were going to actually start showing up in the real world. It's about damned time!

-Cybrex

April fools?

[Jarvo]

After reading the press release document, this is starting to smell like an early April fools prank.

Anyone seen the movie / read the book of "2001: A Space Odyssey" ?

- This year happens to be 2001.
- The computer on board the ship sent to Jupiter was called HAL (NASA has built a HAL-15).
- The "space" NASA thing is a bit too scary.

(Insert twilight zone music)

I want one, and have for a long time!

[ka9dgx]

I've played with this idea since college back in the 80s... if you have a massively parallel grid of single bit computing cells with a delay of a single clock on ALL operations, almost all timing problems can be resolved and race conditions are only a matter of looking for circular references. If you use a graphical editor to lay out your data flows, you can program the thing in a fairly simple manner. You can get phenominal flow rates for data, searching for a data string could happen at the maximum transfer rate of the hard drive, for example. Doing pipelined operations at 100Mhz (a very conservative clock rate) could allow for all of the feature recognition that the human eye does in hardware, in real time, with more precision. The possiblities that fall out of abandoning the Von Neuman architecture are so varied and vast, it's like trying to describe what's possible when you switch from animal to steam power.

I want to see a grid of 1000x1000 single bit clocked cells that can be reprogrammed on the fly... I'll pay up to US$300 for one to play with, provided it does the clocking as I specified above. At a bare minimum I could do FFTS in real time on a 100Mhz 12 bit data stream with it.

--Mike--

Re:I want one, and have for a long time!

[ka9dgx]

Think of each cell in the array as a few bits of a fairly large SRAM block. The only difference is that the memory stored is actually the program for a 1,000,000 bit cpu. Data has to be piped in via the edges, I would probably bond out 32 bits from each corner to make a reasonable package size.

As far as "storage" (RAM) in the traditional sense, there is none... just the states of the individual bit computers. Taken in combination, you can program anything from a pipeline multiplier through string comparison, etc. Pipe the data in one corner, and out the other, using DMA to feed it from the main system bus.

I hope that all makes sense... I'm tired, and need my bandwidth fix, thanks to NorthPoint's demise.

--Mike--

Re:I want one, and have for a long time!

[pointym5]

if you have a massively parallel grid of single bit computing cells with a delay of a single clock on ALL operations, almost all timing problems can be resolved and race conditions are only a matter of looking for circular references.

And if pigs had wings ...

Seriously, the electrical problems around creating such a device are pretty daunting. And once you've got your million one-bit cells out there computing away, how exactly do you get the answers out? What's going to synchronize and arbitrate the communication system? What about storage? How do you arbitrate access to storage? And if you just plan on using the array itself for storage, with only a small minority of the processors connected to actual storage, then suddenly you've constrained the throughput considerably.

People have been looking for the Holy Grail of CPU architecture for quite some time. It seems to be the case that straightforward applications of COTS hardware will win every time. Note that in the case of Starbridge, pretty much everything is vaporware. Their web site has been trying to create a developer base of Viva programmers for a couple years now. Well where are they? Surely there'd be at least a few out there who could testify to the veracity of their claims. They've also been promising their various billion gigaflop configurations for a long time; where are they? At least a couple of the companies who've signed up to use the technology have vague connections right back to Starbridge.

Basically, the whole thing looks like a scam to me.

Re: Press release contained a virus?

[rkent]

Um... that Word file tried to change my normal.dot template. Did anyone else encounter this? Is NASA spreading infected Word files?

Scary....

[supz]

It's scary when someone can reference a (Slashdot) post, that was made nearly two years ago, and you remember it like it was yesterday.

great quote from press release

[gonar]

"Within 10 years, we should use this machine in various places, handling various problems," Singleterry said.

Re:Press release

[stevens]

Well I would have taken a look at the press release... if it wasn't in fscking MS Word format. Sigh.

Abiword runs on just about any platform you can use on a PC and reads MS Word files pretty well. It reads this press release just fine.

Steve

Re:Erm.... The Name....

[Borealis]

Starbridge systems named it hal, nasa bought it from them.

Rehash of Starbridge systems

[Borealis]

This story is slightly misleading in it's references to NASA. The computer system is the FPGA system designed by Starbridge Systems. There were were previous mentions of the HAL system in the following articles:

What Happened To Starbridge's Supercomputer

Reconfigurable Supercomputers

Re: Grep expansion

[kevin805]

"Global Regular Expression Parser" sounds like a ret con'd acronym. It actually stands for the ed command form g/RE/p where RE is a regular expression. I don't think ping is a real acronym. I would guess that the word comes from the sound sonar equipment makes.

Oh, an FPGA is essentially a piece of hardware that can be programmed to simulate another piece of hardware. Wait, that didn't come out right. An FPGA is like a blank chip. They are used for prototyping chips and also for implementing things that aren't big enough volume to be worth doing in real silicon. They're faster than software, but slower than dedicated hardware. You could implement a Pentium in a set of FPGAs, but it wouldn't be running at 1 gigahertz. It would be faster than a software simulation, though.

Re:All I know will be useless!

[kevin805]

Praise the Lord! At last my hard core symbolic logic skills will lead me to the top. Some may say that taking five separate classes that require you to prove De Morgan's laws is pointless, but who will be laughing, when ALL our programs look fleets of 1950's rocket ships?

Actually, I suppose we'll all be laughing. But I'll be laughing more than the others.

Re: Grep expansion

[kevin805]

Oh, whoops. No one around here pronounces it correctly, so I didn't know the spelling. I think I deleted it anyway.

Not NAND but LUT

[Savant]

I'm a programmer at Xilinx working on an internal tool our IP developers use, and I have to say that that's not how FPGAs work. The boards have flipflops and LUTs (Look Up Tables) in a regular matrix; the LUTs hold 16 values and act essentially as truth tables indexed by 4 inputs. Hence they can imitate any gate with the same number of inputs, be it XOR or NAND or any other gate (or even some combination of 2-input gates which has 4 inputs and a single output). This is, of course, a very simplified explanation, but the principle is the same even with the more advanced FPGAs.

'Gates' figures on FPGAs are thus rough estimates of how many NAND gates would be needed to provide similar functionality.

Savant

Re:Parallel loading and partial reconfig

[cheese_wallet]

Virtex parts have on board block ram in addition to the look up tables in each slice. So that million gate figure isn't terribly accurate.

What FPGA computers are (and arn't good at.)

[VC]

Obviously the're not much good at web serving.

-VC-

In case anyone was wondering...

[naasking]

The homepage of the company building these thing is starbridgesystems.com

-----
"People who bite the hand that feeds them usually lick the boot that kicks them"

No April Fools

[ahde]

Starbridge is no April Fools joke. They're perpetrating a very real scam.

NASA Press Release.

Re:The emperor looks great in those new clothes

[evilWurst]

I wouldn't be so quick to say that. Continuing with the GeForce 3 as our example, the GF3 has more transistors than my celeron 500!

theoretically, you could have a FPGA graphics card be aware of which features it is being called on to use and then optimize its free gates to do higher-quality rendering of those options. Run quake3 with all the normal goodies on, but when you run quake1 the card does super high quality full screen antialiasing for you.

I do see your point though. For simpler things like an ethernet or sound card, normal chips will be faster.

What use...

[mindriot]

...is such a fast computer if all it does is say "I can't do that, Dave" ??

seems like a beauthiful april's fool

[Vinz]

just look at HAL :) and other things. My dog is fully self-reprogrammable, more than twice a day (sleep/eat). Except that I have no dog. vincent

connection machine?

[daevt]

this summer i read a book called "the connection machine", has anybody else read this book? if so, does this sound like it qualifies? wasn't FPGA one of the example models as to how a connection machine could be built?

Re:This just in...

[haystor]

Naw, if NASA really wanted to screw with the SETI@Home crowd they could plant some false positives.

All I know will be useless!

[Domini]

Hehe..

Suddenly Quicksort is not the best sort algorythm, and the traveling salesman becomes possible to solve!

Even though we touched on hypercomputing at university, some of the basic premises I have, and rule-of-thumb knowledge I have will be outdated.

I have to learn anew to program using logic, and logic blocks, at least I'll get back to my scientific (mathemetic) roots!

Whee...

For once Computer Science may actually become more of a Science!

Re:All I know will be useless!

[pointym5]

Well, surprise, but in many (if not most) real code situations, quicksort is not the fastest sort to use. The best thing it's got going for it is the fact that the space overhead is constant. But when you're sorting lists of objects, and the comparison involves something expensive (like a function call) while interchanges are cheap (like exchanging a couple of pointers in an array), then a merge sort is going to be better.

Try it for yourself. Code up both, and keep track of how many comparisons are done. You'll find that merge sort does about 40% fewer comparisons than quicksort. I'll gladly trade the space (on my ridiculously memory-loaded server) for speed.

Check the javadocs for the sort routines in java.util.Arrays. You'll note that the ones not sorting simple arrays of primitive types do not use quicksort.

Re:All I know will be useless!

[pointym5]

Maybe, but they have no qualms about using quicksort for simple arrays of primitive types.

That 40% makes a significant difference if the comparison function is complicated. Clearly, the fact that the comparison involves a function call already makes it way more expensive than a simple comparison of two primitive values.

Re:All I know will be useless!

[clary]

Yep, shuffle sort can be implemented in O(n) on a massively parallel computer.

Only if you assume the size of the machine increases with the size of the collection to be sorted.

Re:Traveling salesman tractable? Not.

[Domini]

Hehe... I realise this.

It does get easier... this machine's design gives it an order of improvement, and not just N times faster. This is, sadly, still below the factorial scale of most NP-complete problems.

Just making a point that what we have been taught may be nullified by advances in technology. Things like quantum computers may however approach that computing capacity, and I see this machine as a step in the right direction.

Persistant RAM?

[Cullpepper]

How about bolting one of these suckers onto a "normal" mainframe, and use it to store the ram as a pattern of gates? Reboot in .01 seconds!

Persistant Ram!

Bwhahahahahah.....

...of course writing a RAM-to-Logic-Gate interpreter might be tricky....

Computing Faster Than Astronauts Can Run

[SmokeSerpent]

NewsRelease
National Aeronautics and
Space Administration
Langley Research Center
Hampton, Virginia 23681-2199

Bill Uher
NASA Langley Research Center, Hampton, Va.
(757) 864-3189

For Release: March 26, 2001
RELEASE NO. 01-021

NASA Langley to test New Hyper Computer System
Computing Faster Than Astronauts Can Run

Via a Space Act Agreement, NASA Langley Research Center will receive a HAL (Hyper Algorithmic Logic)-15 Hypercomputer from Star Bridge Systems, Inc. of Midvale, Utah. The system will change the way we think about astonaut survival.

Taking up no more space than a standard desktop computer, the HAL-15 is the first of a new breed of high performance computer that can reconfigure itself hundreds or thousands of times a second. This makes it possible for multiple murderous thoughts to run at the same time on the same chips.

HAL is programmed graphically using the company?s proprietary programming language, VIVA. This language facilitates rapid custom software development by the system?s users.
NASA Langley is among the first in the world to get "hands on" experience with the new system. It will be implemented to explore:
-Solutions for structural, electromagnetic and fluid analysis
-Atmospheric science analysis
-Digital signal processing
-Lip reading
-Astronaut elimination
Future versions of the HAL technology are expected to include large, spooky wide-angle lensed "eyes" and a disturbingly uninflected voice output option. "We fully expect the HAL sytem to be capable of prolonged space missions and the massacre of crews of up to 4 astronauts within ten years," says an engineer from Star Bridge Systems.

Re:programming FPGAs... It's not that hard

[coyul]

They go on to describe a hierarchical GUI that connects functional block to make bigger functional blocks. Somebody with years of experience in traditional programming probably won't find their skills translate too easily.

In my digital logic class in university we had FPGA boards from Altera in the lab. To program them, you defined your components in VHDL, then connected them in a GUI that resembled that of any other visual object-oriented IDE (which I admittedly don't use). If you want the output of one component to feed into the input of another component, you just draw a line between them. This is not difficult. From this GUI you can easily pull up the VHDL description of any component and edit it if you need to. Reading the 'Programming VIVA' section on Star Bridge's homepage, they're environment is remarkably similar. Trust me: if some of the folks in my class could make things work in this kind of environment, no programmer worth the name should have any difficulty adapting...

Re:The emperor looks great in those new clothes

[stixman]

"Dr. Chandra, will I dream?"
"No, but you will be sued to oblivion over your name."

Just fyi, that's something HAL's sister computer, SAL said in 2010: Odyssey Two.

Tschuess, Mike
==================

Re:programming FPGAs... It's not that hard

[geodejo]

There is a C like programming langage for Xilinx FPGAs developed at CSIRO. Here's an example .

2001

[ostawookiee]

They're calling it HAL. Mommy.

Another use?

[shren]

I wonder if you could make a specialized machine, with a bunch of FPGAs, solely for the purpose of AI for massive scale online games. Most MMORPGs have famously stupid AI because making smart creature AI takes both lots of cycles and very good code. Could a specialized box designed for these computations be a salable device?

Ball And Chain

[zxc132]

Why I am not fond of Starbrige Systems: http://www.starbridgesystems.com/abou-rela.html

Traveling salesman tractable? Not.

[clary]

Suddenly Quicksort is not the best sort algorythm, and the traveling salesman becomes possible to solve!

No known exact algorithm for traveling salesman is polynomial, and FPGA does not change that. For a large enough number of cities, the problem is still intractable. And that number of cities (N) is not very large, since the number of possible routes is on the order of N factorial.

this is old hat

[aminorex]

Way back in '90 when I was a Thinking Machines, there was a project to replace the floating-point chipd in a CM-2 (2048 of them) with FPGAs to do crypto for NSA.

Make video games like the holodeck?

[HerrGlock]

Alright, count me in. One problem, though. I don't think I will be asking for it to open the pod bay doors any time soon.

DanH
Cav Pilot's Reference Page

It looks like an Indigo

[HerrGlock]

Can I get it in Teal?

DanH
Cav Pilot's Reference Page

Re:Press release

[Kronovohr]

vi document.doc
:%s/[ctrl-V][ctrl-@]//g
:wq
strings document.doc | fold -w 75 -s > document.txt

Works most of the time

No, it is way diffrent

[DaGrilling]

Hey, good for you.
But it isn't that easy if you want to make a high speed process. And the way you need to think is way different. The problem is that you CAN program. That will screw up your way of thinking.

You could probably learn it - but you need a couple of years to perfect it beyond the easy stuff - like
serial communication
display drives
control devices (moore and mealy machines) syncron and asyncron.

Basicly you need knowledge of digital electronics and experiance.

Robert Christiansen
--
Student at the Technical University of Denmark,
Department of Applied Electronics,
Datacommunication Section

Erm.... The Name....

[John_Booty]

Does anyone else find it slightly disturbing that NASA would name a computer "HAL"? 2001 anyone?


http://www.bootyproject.org

Re:Erm.... The Name....

[John_Booty]

Yes. The book will become a reality.. or maybe April 1st will be... /Geggibus "Ignore him"

Yeah, after I saw the headline my first thought was to check the date and make sure it wasn't April 1st! :)
http://www.bootyproject.org

Re:Erm.... The Name....

[JimPooley]

Yeah, but HAL in 2001 was "Heuristic Algorithmic Logic" and this is "Hyper Algorithmic Logic". So that's all right then...


Hacker: A criminal who breaks into computer systems

Re:Erm.... The Name....

[Bobo the Space Chimp]

And HAL was, supposedly, created by subtracting one letter from IBM.

Let's add one letter to MS. Hmmmmm. NT.

Re:Erm.... The Name....

[oooga]

Well, at least it's not HAL 95. Or HAL XP. Then we'd know who's really controlling the government.

Re:Erm.... The Name....

[geggibus]

Yes. The book will become a reality.. or maybe April 1st will be... /Geggibus "Ignore him"

Re:Erm.... The Name....

[Vintermann]

Ok it's not first of april, but it's close enough. Maybe their 1. april joke they planned accidentaly got leaked early or something (if we find out that in a couple of days, then please moderate my post to heaven, you hear me!! :-) :-) )

Re:Erm.... The Name....

[eekDude]

Just be glad it's not called the T-800!

Re:1000 times paster than a pentium 4?...

[SuperCujo]

Faster... not 1000 times better at heating your home...

Re:Umm

[bornie]

Reason: This is _not_ an general purpose machine.

stuff one for me

[b4upoo]

I'll take mine as a portable chess machine.

Roblimo?

[NewbieSpaz]

At first glance, the guy in the picture looked like Roblimo to me...

LPGA?

[Sir_Real]

What does Women's Golf have to do with Nerd News?

Re:FPGA

[olafva]

Apparently you overlooked the all the photos of box, inerds, boards, screenshots etc. (click last line of first 2 links)

Re:Imagine...

[dynoman7]

That was funny. Thanks for making my day.

Old News really

[TooTechy]

Was this not covered on /. last year? This is not new news but old news. The fact that NASA is getting a box is darn cool tho. Can I have one?

This just in...

[TheOutlawTorn]

NASA's SETI@Home team has unexpectedly jumped ahead of all other teams, with 3.74 billion work units processed over the last three days. A NASA spokesperson has been quoted as saying "Up yours, Sun Micro!"

Re:This just in...

[ljaguar]

Oh my god. That was _the_ most hilarious thing I've heard in last 5 monthes or so. Thanks for making my day.

Re:This just in...

[belthezar]

Hahahah! That's what I would do with one of these (well, after "playing" in the holodeck for a couple years. buwwahahahaha)

Re: Press release contained a virus?

[achurch]

Um... that Word file tried to change my normal.dot template. Did anyone else encounter this? Is NASA spreading infected Word files?

For some reason, Word always does that to me whenever I try to open two or more documents at the same time. I don't know why and I wish it would stop, but it doesn't seem to be a virus. (I just scanned with NAV and the document came up clean.)

--
BACKNEXTFINISHCANCEL

Imagine...

[NiceBacon]

... a Beowulf cluster of these. *punch* *ow* *sorry, sorry!* *ow*

Re:Coming soon to a bedroom near you?

[Jaysyn]

you are right...they are very expensive....I think the HAL-300 cost upwards of a cool mil

Jaysyn

We just need better compilers ;)

[PinkyAndThaBrain]

Things like Handel-C and Esterel will allow ordinary programmers to have something up and running relatively quickly though.

Although explicitly parallel programming occam style is not something most programmers are very good at either.

NASA Press Release

[slutdot]

NewsRelease National Aeronautics and Space Administration Langley Research Center Hampton, Virginia 23681-2199 Bill UherNASA Langley Research Center, Hampton, Va.(757) 864-3189 For Release: March 26, 2001 RELEASE NO. 01-021 NASA LANGLEY TO TEST NEW HYPER COMPUTER SYSTEM Computing Faster Than Engineers Can Think NASA Langley engineers are exploring new tools and techniques that may move them and the projects they develop beyond the serial world into a parallel universe. Via a Space Act Agreement, NASA Langley Research Center will receive a HAL (Hyper Algorithmic Logic)-15 Hypercomputer from Star Bridge Systems, Inc. of Midvale, Utah. The system is said to be faster and more versatile than any supercomputer on the market and will change the way we think about computational methods. Taking up no more space than a standard desktop computer and using no more electrical current than an hair drier, the HAL-15 is the first of a new breed of high performance computer that replaces the traditional central processing units with faster Field Programmable Gate Arrays (FPGAs). These are specialty chips on a circuit board that can reconfigure themselves hundreds or thousands of times a second. This makes it possible for multiple applications to run at the same time on the same chips making them 1000 times faster than traditional commercial CPUs. This maximizes the use of millions of transistors (gates) on each silicon array. Traditional processors, because of their general purpose design, are wasteful, since for most applications they use only a small fraction of their silicon at any time. HAL is programmed graphically using the company's proprietary programming language, VIVA. This language facilitates rapid custom software development by the system's users. Besides NASA Langley, other users will include the San Diego Supercomputer Center, Department of Defense, Hollywood film industry and the telecommunications industry. NASA Langley is among the first in the world to get "hands on" experience with the new system. It will be implemented to explore: -Solutions for structural, electromagnetic and fluid analysis -Radiation analysis for astronaut safety -Atmospheric science analysis -Digital signal processing -Pattern recognition -Acoustic analysis Media Briefing: A media briefing will be held at 9 a.m., Tuesday, March 27, at the Pearl Young Theater Newsroom, Bldg. 1202, 5 North Dryden Street at NASA Langley Research Center. There will be a news briefing and short demonstration at 9 am followed by a demonstration and discussion for scientists and engineers. HAL developer Kent Gilson and Star Bridge Systems, Inc. CEO Brent Ward will conduct the demonstration. Two Langley researchers, Dr. Robert Singletarry and Dr. Olaf Storaasli, trained on the new system and will report on their first-hand experiences with the hypercomputer. -end-

Re:The emperor looks great in those new clothes

[Atlantix]

Well along those lines, the newest FPGAs from Xilinx (the Virtex II series) have special features built-in to support DSP applications. And they actually outperform dedicated DSP chips from TI, etc. I could go get the numbers to back that up if you'd like but it could take a while to find in this messy office.

Re:Not Truly 1000 Faster

[Atlantix]

I'm certainly not misled by marketing info and my design group at Argonne National Laboratory extensively uses FPGAs from Xilinx and Altera in our work. We use them to create special purpose systems for use in detector grids and particle accelerators. They are MUCH better than any standard computer system when it comes to processing and storing the massive quantities of data the scientists around here generate with their experiments. The ability to reprogram the FPGAs rather than designing a new piece of hardware for each experiment saves lots of time and keeps our design costs low. As for the clock distribution, I can't speak for Altera, but Xilinx's newest chips (the Spartan II and Virtex II series) defeat this problem with several high performance DLLs (Delay Lock Loops) and special routing networks that provide clocks with essentially zero delay. (+/-60ps jitter for those that care.) So clock skew isn't even something I have to worry about as a designer anymore. Of course, performance is only as good as the quality of the design that is downloaded to the FPGA. So simple playing probably isn't the best way to judge the speed. You have to really know how to fine tune your code to show the true horsepower in these things.

Re:FPGAs

[Atlantix]

Yeah, I laughed at the reconfiguring 1000s of times per second thing too. In fact, I can't think of a single instance where I've heard of anyone dynamically reprogramming the FPGAs while the system is running. In real life, it's much more comparable to flashing the BIOS on a computer. You just don't do it all that often. But the fact that you can just might save your project from failure if you find a bug.

Do the newer Xilinx chips really take that long to load? I'm still waiting for my new boards with Spartan IIs on them to be assembled. I've got plenty of designs with 5200 series parts that take about a quarter of a second / FPGA to load since I chain them together in series.

The emperor looks great in those new clothes

[tenzig_112]

A chip that re-configures itself? 1000 times paster than a pentium 4?

But what are its specs on the dreaded Q3 fps test?

"Dr. Chandra, will I dream?"

"No, but you will be sued to oblivion over your name."

These guys jumped the gun. April 1 is a couple of days off.

"I'm sorry NASA, I can't do that..."

[Bahumat]

Am I the only one who noticed it was called HAL-15?

Bahumat

> Via a Space Act Agreement, NASA Langley Research Center will receive a HAL (Hyper Algorithmic Logic)-15 Hypercomputer from Star Bridge Systems, Inc.

Re:FPGAs

[mchang]

The Virtex can do slice reconfiguration which is a form of partial reconfiguration. But I don't know of any available boards that support that feature. Virtex-II will probably be better supported. The reconfiguration time of our XCV2000E is around a second through the PCI bus.

The other option is the now-defunct Xilinx XC6200. That was much finer-grained and allowed single cell reconfiguration. Unfortunately, it was too small to be useful, and was really just an experiment by Xilinx.

As far as 1000s of reconfigurations per second... not so, unless they have 1000s of FPGAs.

Re:Coming soon to a bedroom near you?

[wanderung]

I've been watching this company since 1999 or so. Back then they were claiming they would have a box on the market priced in PC-range within 18 months. Looks like that's going to remain vaporware for the foreseeable future. Now the only mention I can find on their website about it is this:

Personal computers. The company believes that some day PCs will come equipped with the same supercomputer technology found in the company's Hypercomputers.

Handy 21

[devnullkac]

In August 1999, Scientific American covered a similar technology being developed at MIT, but in this case, the reconfigurable computation was targeted at a handheld device dubbed the "Handy 21" which could act as a cell phone or PDA or FM radio by changing its circuitry.

Timing issue?

[Spackler]

"bringing things that could take many hours down to seconds," said Olaf O. Storaasli, senior research scientist in Langley's analytical and computational methods branch.

Sure, you will now be able to do 3 hours of computer work in only 10800 seconds!
Thanks goodness!

This is over dramatized

[sheetsda]

The real HAL might make all kinds of science fiction come true. People could hook into central hypercomputers to run their entire households -- from the coffee pot to the television set, the shower to the garage door -- like something out of "The Jetsons." They could tap into video games that look like a "holodeck" -- a la "Star Trek" -- a 360-degree environment, another place in real time, to play baseball in Yankee Stadium, for instance.

HAL alone can't cause this to happen. Where are all the holographic 3 projectors that allow you to stand within the scenery? How does a finite sized room become a "holodeck" of much larger(potentially infinite) size such as Yankee Stadium? Why would you need to connect to a central computer to control your house? Any PC could do that.

This article is just over dramatizing what is just a neat new computer technology. It may be a breakthrough in speed, but its not going to bring us to a real life Star Trek.

"// this is the most hacked, evil, bastardized thing I've ever seen. kjb"

For those unfamiliar with the story of the emperor

[Kalabajoui]

The Emperor's New Clothes
by Hans Christian Anderson
http://www.deoxy.org/emperors.htm

Once upon a time there lived a vain Emperor whose only worry in life was to dress in elegant clothes. He changed clothes almost every hour and loved to show them off to his people.

Word of the Emperor's refined habits spread over his kingdom and beyond. Two scoundrels who had heard of the Emperor's vanity decided to take advantage of it. They introduced themselves at the gates of the palace with a scheme in mind.

"We are two very good tailors and after many years of research we have invented an extraordinary method to weave a cloth so light and fine that it looks invisible. As a matter of fact it is invisible to anyone who is too stupid and incompetent to appreciate its quality."

The chief of the guards heard the scoundrel's strange story and sent for the court chamberlain. The chamberlain notified the prime minister, who ran to the Emperor and disclosed the incredible news. The Emperor's curiosity got the better of him and he decided to see the two scoundrels.

"Besides being invisible, your Highness, this cloth will be woven in colors and patterns created especially for you." The emperor gave the two men a bag of gold coins in exchange for their promise to begin working on the fabric immediately.

"Just tell us what you need to get started and we'll give it to you." The two scoundrels asked for a loom, silk, gold thread and then pretended to begin working. The Emperor thought he had spent his money quite well: in addition to getting a new extraordinary suit, he would discover which of his subjects were ignorant and incompetent. A few days later, he called the old and wise prime minister, who was considered by everyone as a man with common sense.

"Go and see how the work is proceeding," the Emperor told him, "and come back to let me know."

The prime minister was welcomed by the two scoundrels.

"We're almost finished, but we need a lot more gold thread. Here, Excellency! Admire the colors, feel the softness!" The old man bent over the loom and tried to see the fabric that was not there. He felt cold sweat on his forehead.

"I can't see anything," he thought. "If I see nothing, that means I'm stupid! Or, worse, incompetent!" If the prime minister admitted that he didn't see anything, he would be discharged from his office.

"What a marvelous fabric, he said then. "I'll certainly tell the Emperor." The two scoundrels rubbed their hands gleefully. They had almost made it. More thread was requested to finish the work.

Finally, the Emperor received the announcement that the two tailors had come to take all the measurements needed to sew his new suit.

"Come in," the Emperor ordered. Even as they bowed, the two scoundrels pretended to be holding large roll of fabric.

"Here it is your Highness, the result of our labour," the scoundrels said. "We have worked night and day but, at last, the most beautiful fabric in the world is ready for you. Look at the colors and feel how fine it is." Of course the Emperor did not see any colors and could not feel any cloth between his fingers. He panicked and felt like fainting. But luckily the throne was right behind him and he sat down. But when he realized that no one could know that he did not see the fabric, he felt better. Nobody could find out he was stupid and incompetent. And the Emperor didn't know that everybody else around him thought and did the very same thing.

The farce continued as the two scoundrels had foreseen it. Once they had taken the measurements, the two began cutting the air with scissors while sewing with their needles an invisible cloth.

"Your Highness, you'll have to take off your clothes to try on your new ones." The two scoundrels draped the new clothes on him and then held up a mirror. The Emperor was embarrassed but since none of his bystanders were, he felt relieved.

"Yes, this is a beautiful suit and it looks very good on me," the Emperor said trying to look comfortable. "You've done a fine job."

"Your Majesty," the prime minister said, "we have a request for you. The people have found out about this extraordinary fabric and they are anxious to see you in your new suit." The Emperor was doubtful showing himself naked to the people, but then he abandoned his fears. After all, no one would know about it except the ignorant and the incompetent.

"All right," he said. "I will grant the people this privilege." He summoned his carriage and the ceremonial parade was formed. A group of dignitaries walked at the very front of the procession and anxiously scrutinized the faces of the people in the street. All the people had gathered in the main square, pushing and shoving to get a better look. An applause welcomed the regal procession. Everyone wanted to know how stupid or incompetent his or her neighbor was but, as the Emperor passed, a strange murmur rose from the crowd.

Everyone said, loud enough for the others to hear: "Look at the Emperor's new clothes. They're beautiful!"

"What a marvellous train!"

"And the colors! The colors of that beautiful fabric! I have never seen anything like it in my life!" They all tried to conceal their disappointment at not being able to see the clothes, and since nobody was willing to admit his own stupidity and incompetence, they all behaved as the two scoundrels had predicted.

A child, however, who had no important job and could only see things as his eyes showed them to him, went up to the carriage.

"The Emperor is naked," he said.

"Fool!" his father reprimanded, running after him. "Don't talk nonsense!" He grabbed his child and took him away. But the boy's remark, which had been heard by the bystanders, was repeated over and over again until everyone cried:

"The boy is right! The Emperor is naked! It's true!"

The Emperor realized that the people were right but could not admit to that. He though it better to continue the procession under the illusion that anyone who couldn't see his clothes was either stupid or incompetent. And he stood stiffly on his carriage, while behind him a page held his imaginary mantle.

Viva means Life??

[gwizah]

"Star Bridge created an operating system called Viva (meaning "life") "
Okay since when? "Viva" an exclamation, means to live, or Hurrah! from the word "Viver". At least that's what it means in spanish. Maybe the meant "vida" which means "life"

Sun was smart about this one

[AKAImBatman]

Sun Microsystems purchased an exclusive license to develop NT on the Sparc platform, then sat on it. Smart bastards. :-)

Does the NSA already have a poop load of these?

[JohnDenver]

For some reason, I don't the fundamental idea is something new under the sun, as I when I was first introduced to FPGAs, as the first killer application I thought of was creating an array of these to solve otherwise CPU intensive, but memory limited problems.

I always thought that if the NSA was serious about finding prime numbers, they would get thier EE's to write up some HDL (Hardware Definition Language) and code up an array of LPGA. I always thought LPGAs would be great for this, however I could be wrong.

I never considered a commercial market for a FPGA arrays outside of board logic though. Maybe this could start a micro-industry that may prove invaluable to research in 5 to 10 years???

Of course, this may inspire a brash young EE to design a lightweight version of this on a single PCI board for general research use.

Question: Why would they choose LPGAs over CPLDs?

April Fools joke?

[ratguy]

Surely this is some sort of April Fools joke, right? I mean, the damn thing is called HAL. Also.. I'm sure were all aware that the current year is 2001, which would make this sort of joke much more likely. Ratguy

Check their claimed speeds

[dirtyrat]

I saw an early announcement some years ago referring to this machine. Their performance claims were something like a sustained speed of 13 trillion operations per second executing 4-bit adders. The speed quarters when you use 16-bit adders instead; imagine what happens when you try to implement something complex.

I emailed them about this at the time, but didn't receive a reply 8o)

See "The Economist"

[doctorfun]

There's an article that talks about FPGA computing in this week's Economist.

Scroll down to the "Machines that Invent" heading for the really interesting part. David

http://www.economist.com/printedition/displayStory .cfm?Story_ID=539808

Re:Modded Funny

[crontab]

Ya gotta love it when someone quotes the press release verbatim and it gets modded "funny."

Now that's funny!

Commercial FPGA solutions used in bioinformatics

[airuck]

Acceleration with FPGA has been around for a while. I am currently evaluating TimeLogic's commercially available FPGA accelerated system for gene homology searching (http://www.timelogic.com) The system is composed of either NT or Sun boxes with FGPAs on PCI boards. It is a specialty product that runs several bioinformatic algorithms at very, very high speeds.

Re:Adaptive silicon?

[markmoss]

No, it's not adaptive technology. It's pre-programmed.

Re:Can I use this as a compiler?

[markmoss]

Only if someone can parallelize the compiler. I expect compilers to be among the programs which are NOT run by a system like this as well as by a good CPU. And worse, judging from the FPGA design software I know of, the compiler for the HAL is bound to be much larger and many times slower than any normal compiler.

Re:Coming soon to a bedroom near you?

[markmoss]

I hadn't been able to open the page with pictures when I wrote this, and I don't think I'll bother now. It does sound like Labview. I program in Labview. It's a good way to design a screen form, but a terrible way to code. I'd rather code in C (or better yet, some higher-level text-based language) with some tool to allow what-you-see-is-what-you-get screen designs, but our biggest customer made the choice of LabView... (I'm not prejudiced against graphic design in general -- when I'm doing circuit designs, I prefer drawing a schematic to coding in VHDL or Verilog. But if you are coding software, text does work better.)

Besides that, I wonder how well their software really works. From what I've heard about conventional FPGA design software, you code in a C-like language (Verilog or VHDL), then run a simulation to verify the code, then you try to compile it to a physical layout -- and try, and try, and try. If fast operation is needed, you've got to intervene manually to arrange the layout so connections on critcal paths are short. If you want to use even half the gates on the chip, you've got to intervene manually in the layout so it doesn't run out of connection paths in the densest areas. I don't think it likely that these people have found a magic way around that. More likely, their system will only work if you never try to use more than 1/4 of the possible gates or speed...

Re:Coming soon to a bedroom near you?

[markmoss]

"why aren't we all ditching our amd's/pentiums and buying one of these little babies?"
A) It's only faster on certain problems where the computations can be performed massively in parallel. And most CPU's already spend 99% of their time waiting for data to arrive from memory or the hard drive, or for the operator to click the mouse.

B) It's a s-o-b to program. You aren't writing software, you are designing a custom hardware circuit to solve the problem, which is then implemented by programming logic gates and connections in the chips. In other words, on a computing job where you could write a program in C in a week and it would run in 1 minute on a PC, on FPGA's it might take a year to design and run in a millisecond. So if reducing the run time is worth paying six figures for software development, go for it... Maybe the HAL people have found a way to ease the programming, but it's still going to be quite a lot harder than normal programming.

Just guessing this box might hold 100 FPGA's at $25 each. Plus it has to have a normal computer in there to hand the programs and data out to the FPGA's. So it costs more than a PC, but maybe not as much as a top-end workstation (depending on how big a profit margin they are taking). It's great for a rocket navigational system, but the only down to earth applications I can think of for a machine this big are professional video processing, weather prediction, and some really heavy engineering simulations.

On a smaller scale, cell phones and future modems are likely to include some FPGA-like circuits, probably as a small part of a custom chip rather than as a separate FPGA. When a new protocol comes out requiring revised circuit design, you do the changes in the FPGA program and distribute it to be downloaded.

No government could stop this; FPGA's are sold worldwide and used extensively for prototyping and occasionally for production. Maybe they'll try to restrict the HAL programming language.

ummmm

[crudmonky]

If you actually knew what you were talking about, you'd know that both NAND and NOR can implement any form of combinational logic. There is no real advantage over one than the other.

Nothing new - just hype

[user_used]

The use of FPGAs to create Hyper/Super Computers is only applicable to highly specific application based machines. For the computer descried in the article to be a truly general-purpose super computer one would have to change the logic in the FPGAs rather frequently. It should be know that reloading logic into FPGAs to meet the current needs of a software app is a time consuming progress. Also compilers do not exist that can take a standard C program and convert it in to HDL (Hardware Design Language) that is loaded into FPGAs. The cool stuff that is being done is to merge FPGAs with processing cores (such as the SPARC ALU) into one chip thus giving you the speed of FPGA logic for a specific ask and the ALU core tailored to more general apps. Yet no mater what until a compiler comes out that can convert Software code into HDL, as I stated, in an efficient manner then it's just a toy.

Alternative links

[Glog]

Well the image page seems to be either /.ed or not there at all so here are alternative links from the Star Bridge Systems site:

HAL 300
HAL 15

Re:Can I use this as a compiler?

[Bobo the Space Chimp]

Well, if you could write a tight compiler that could be cloned across the surface of this chip, you might very well be able to compile every single one of the thousands of files in a large project simultaneously.

Re:Traveling salesman tractable? Not.

[Bobo the Space Chimp]

Quicksort would actually be very convertable to such a system, since every time you split the data and recurse, you naturally find a place to use further processors.

Or course, a sort algorithm that started out with a massive number of processors, merging later, would be better. "Unrolling," i.e. parallelizing, the merging of many subsections would speed things up quite a bit, too.

alternative home heating?

[Anonymous Admin]

"It uses no more energy than a hair dryer" That is 1500 watts. My apartment is small enough that I would have to keep the windows open in the wintertime to keep from roasting in here...

Re:Press release

[banuaba]

I wish I had some mod points. Then it would be -1, troll... NEXT STOP! Get on board the just-because-it-bashes-MS-doesn't-make-it-a-good-p ost train.

okay, so sure, they should have used PDF or HTML, get over it.


Brant

Can I use this as a compiler?

[Ayende Rahien]

Think of this, instead of waiting all night for the compiler to finish, you got to get some coffee (using the super computer, of course), and get back in time to see it finish.

Re:Umm

[jayhole]

Because it is in our genes.

Umm

[whanau]

Is the guy who made this retarded? If his new computer is so great, why isn't he out selling it and killing IBM and Sun in the process?

Reason = It doesn't exist.

Things too Note!!

[garns]

I attended the press briefing. First I would like to note that the presentor was a very likable guy who was open to questions and very knowledgeable. He had an example with the HAL computer calculating the Julian set vs. a PIII 850. The difference was amazing. You could zip around the set on the HAL, where the PIII kinda skipped around about 1/3 fps. Finally the price that was quoted 1 millllion dolllars!!! Worth it?? Time will tell.

Yeah, but will it run *nix? (ducking) ~EOM~

[RoninAdmin]

>: P

Adaptive silicon?

[Tricolor Paulista]

This is really weird (I wonder how this is achieved), but if it works I'm all for it.

Adaptive technology often is capable of adapting to unknown situations by having a general model and "guessing" the parameters. That is, if the parameters don't keep changing, as in real-world general applications... But I wish all the luck for them, they should be able to run pretty fast specialist systems!

BTW, linking to a Word document in a /.ed page isn't nice!

Coming soon to a bedroom near you?

[MDCore]

If these machines are 1000x faster than my current system but look the same, why aren't we all ditching our amd's/pentiums and buying one of these little babies? I know the obvious is that, duh, it doesn't run windoze and I can't fit the trusty old graphics card in... oh and it probably costs one billion dollars!!! but why exactly isn't desktop technology heading in this direction?

p.s. I dig the buttons on that case! reminds me of my XT :)

FPGAs

[hamish_moffatt]

Current FPGAs don't run faster than general purpose CPUs, Megahertz-wise; actually, nowhere near it. The advantage is that you can do lots of things in parallel, though eg build a massively parallel machine. It's a huge task to take a machine like this (effectively a bunch of empty chips) and make it do something useful.

The company who makes these computers has been around for a few years.

As to reconfiguring 1000s of times per second, that seems a bit unlikely. Typically programming time on a Xilinx FPGA is at least a second, in my experience.

Hamish

Disclaimer: I work with FPGAs for a living.

Modded Funny

[Canonymous Howard]

Ya gotta love it when someone quotes the press release verbatim and it gets modded "funny."

I wonder what this would do for my RC5 keyrate?

[PlausibleDeniability]

This would be a fun toy to use in attacking RC5. I wonder if the NSA already has one (or a whole room full)?

Four days early (April 1)

[borg3of27]

If I believed every self-published press release from an obscure startup ...

can it do double-precision floating point?

[borg3of27]

Virtually every important scientific program wants floating point. I've been in the business for some time, and boolean, integer, or ratios doesn't cut it. So the game is (1) build the fastest FPUs you can and (2) figure out how to feed it data and sequence it fast enough.

Not Truly 1000 Faster

[adamjone]

I used to work for a company that manufactures a very similar device as an add on card for PCs. True enough, a single transistor on the FPGA in each of these devices is capable of firing much faster than the clock speed of available processors. However, this is the switching speed of a single transistor on the device. When transistors are chained together, you get a phenomenon called gate delay, which is the amount of time each transistor takes to react to its inputs before the output level is changed. So if a single transistor is 1000 times faster than the clock speed of a PII, and we chain 1000 of these transistors together, our usable clock speed is now the same as the PII. Another item of worry for the designers of the image to go on the FPGA is clock tree generation. The clock signal for the FPGA must be generated in such a way that all areas of the chip are synchronized. Very often, the clock tree is the biggest problem in the design as it skews as each route gets longer.

These devices are fantastic if you have a very specific application that you wish to design them for (e.g. Image processing, voice analysis, SETI@Home). With the ability to be reconfigured at a moments notice, they are also much more reusable than an ASIC. But don't be misled by the speeds given in the marketing info. Get a demo chip from Altera or Xilinx and play with it for a while. Then make your own judgements about speed.

April Fools

[Posthour]

A little early for april fools jokes, dont ya think?

PLDs and GT

[Malluck]

This is rather neat. We've been using PLDs, a different form of FPGAs, in our digital design class here at Georgia Tech. Basicly you can draw up a componet using VHDL or Verilog coding, download it to the PLD and the PLD will act as that componet. We've been using Altera's MAX+PLUS II software and boards to do our lab work. It would be really intresting to see a computer incorperate this into it's architechture. Imaging Q3 running off pure silicon. No more wizzing Hard drive. Now all we need is a VHDL coded version....

FPGA

[soulsurf]

Yeh, right and tommorrow isn't 01.04.2001 right?
Show me the a picture of the hardware and not the box.